On Sat, Nov 12, 2016 at 11:00 PM, Ilia Mirkin wrote:
> On Sat, Nov 12, 2016 at 6:00 PM, Ilia Mirkin wrote:
>> There are a handful of regressions as a result of this change:
>> - fbo-generatemipmap-formats on compressed textures with irregular
>>sizes fails. The 2+ levels appear as if their o
On Sat, Nov 12, 2016 at 6:00 PM, Ilia Mirkin wrote:
> There are a handful of regressions as a result of this change:
> - fbo-generatemipmap-formats on compressed textures with irregular
>sizes fails. The 2+ levels appear as if their offsets were off by a
>bit. No idea why, despite a lot o
After looking into how optimization passes are run, it became apparent
that most glsl optimization passes only show benefit of one run.
My idea was that some optimization passes will snowball on each other,
while others that provide no initial benefit probably never will.
Therefore, rework so that
It turns out that only 8% of shaders benefit from more than one run
of the do_common_optimization function, now that it has the loop.
Doing only one run makes no difference to instruction count with NIR.
8324 shaders were run
8128 benefit from 1 calls to do_common_optimization
679 benefit from 2
This is based on the assumption that some optimization passes
will snowball on each other, allowing for further optimizations,
while optimizations that does not give any benefit initially, likely
will not show any benefit at all and therefore can be skipped.
So instead of looping over all passes ag
From: Roland Scheidegger
vsplit_get_base_idx explicitly returned idx 0 and set the ofbit
in case of overflow. We'd then check the ofbit and use idx 0 instead of
looking it up. This was necessary because DRAW_GET_IDX used to return
DRAW_MAX_FETCH_IDX and not 0 in case of overflows.
However, this i
From: Roland Scheidegger
lp_build_any_true_range is just what we need, though it will only produce
optimal code with sse41 (ptest + set) - but even without it on 64bit x86
the code is still better (1 unpack, 2 movq + or + set), on 32bit x86 it's
going to be roughly the same as before.
While here
From: Roland Scheidegger
Instead of doing all the math with scalars, use vectors. This means the
overflow math needs to be done manually, albeit that's only really
problematic for the stride/index mul, the rest has been pretty much
moved outside the shader loop (albeit the mul could actually be o
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/swr/swr_screen.cpp | 126 -
1 file changed, 126 deletions(-)
diff --git a/src/gallium/drivers/swr/swr_screen.cpp
b/src/gallium/drivers/swr/swr_screen.cpp
index 73deb03..98f5e44 100644
--- a/src/gallium/drivers/sw
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/swr/.gitignore | 4
1 file changed, 4 insertions(+)
diff --git a/src/gallium/drivers/swr/.gitignore
b/src/gallium/drivers/swr/.gitignore
index 6b4de9e..172f3bf 100644
--- a/src/gallium/drivers/swr/.gitignore
+++ b/src/gallium/drivers/swr/.
Rendering could still be ongoing (or have yet to start) when the shader
is deleted. There's no refcounting on the shader text, so insert a
pipeline stall unconditionally when this happens.
[Note, this commit should instead introduce a way to attach work to
fences, so that the freeing can be done i
The EXT_texture_integer test says that blending and alphatest should
all be disabled. st/mesa takes care of alphatest already.
Fixes the ext_texture_integer-fbo-blending piglit test.
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/swr/swr_state.cpp | 3 +++
1 file changed, 3 insertions(+)
d
Fixes the texsubimage piglit and lets the copyteximage one get further.
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/swr/swr_context.cpp | 5 +++--
src/gallium/drivers/swr/swr_screen.cpp | 5 +++--
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/swr/swr_
The support in swr requires shaders to output the components as UINTs.
This is not how GL or Gallium work, and since this is not a
required-renderable format, just leave it out.
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/swr/swr_screen.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deleti
This table exists for the purpose of determining renderable formats.
Without a StoreTile implementation, that can't happen.
This basically removes rendering support to all L/LA/I formats. They can
be re-added when/if StoreTile implementations are added.
Signed-off-by: Ilia Mirkin
---
src/galliu
Noticed by inspection.
Signed-off-by: Ilia Mirkin
---
Entirely untested. Just happened to jump out at me that the two tiling modes
didn't match, whereas every other instance in this file matches.
src/gallium/drivers/swr/rasterizer/memory/StoreTile.h | 2 +-
1 file changed, 1 insertion(+), 1 de
This is the format used for the primary surface of a
PIPE_FORMAT_Z32_FLOAT_S8X24_UINT resource.
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/swr/rasterizer/memory/LoadTile.h | 1 +
src/gallium/drivers/swr/rasterizer/memory/StoreTile.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/
This is a bit of a mega-commit, but unfortunately there's no great way
to break this up since a lot of different pieces have to match up. Here
we do the following:
- change surface layout to match swr's Load/StoreTile expectations
- fix sampler settings to respect all sampler view parameters
- f
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/swr/swr_state.cpp | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/swr/swr_state.cpp
b/src/gallium/drivers/swr/swr_state.cpp
index 65327f3..526d7e7 100644
--- a/src/gallium/drivers/swr
This is a bit of a hodge-podge, but largely related to improving texture
resource manipulation - mapping, texturing, rendering, etc. There's a WIP
commit at the end which was required to make swr not crash on piglit exit
half the time, but I think it needs to be redone in a proper way.
The meat is
There's no guarantee that mip width/height will be a multiple of the
compressed block size. Make sure to round up when dividing.
Signed-off-by: Ilia Mirkin
---
Note - I don't actually need this. An earlier version of my patches needed
something like this. However since it's a real fix, I figured
In a BGR10X2 or BGR5X1 situation, there's no need to try to quantize the
X channel - the default will have the proper quantization required.
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/swr/rasterizer/jitter/blend_jit.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/swr/swr_screen.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/swr/swr_screen.cpp
b/src/gallium/drivers/swr/swr_screen.cpp
index 16a8bcf..c694457 100644
--- a/src/gallium/drivers/swr/swr_screen.cpp
+++
On Sat, 2016-11-12 at 13:34 -0800, Jason Ekstrand wrote:
I have two questions and two suggestions below.
With the suggestions addressed and assuming the answer to both
questions is yes, Patch 7-8 are:
Reviewed-by: Timothy Arceri
> ---
> src/intel/vulkan/gen7_pipeline.c | 48 +---
On Sat, 2016-11-12 at 13:34 -0800, Jason Ekstrand wrote:
> ---
> src/intel/vulkan/gen7_pipeline.c | 29 +---
> src/intel/vulkan/gen8_pipeline.c | 57 ++-
> src/intel/vulkan/genX_pipeline_util.h | 85
> +++
> 3 files changed, 89
With the commit message fixed in patch 2, patches 1-4 are
Reviewed-by: Timothy Arceri
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On Sat, 2016-11-12 at 13:34 -0800, Jason Ekstrand wrote:
> Now that we have anv_shader_bin, they're completely redundant with
> other
> information we have in the pipeline. For vertex shaders, we also to
^-
go
> through way too
https://bugs.freedesktop.org/show_bug.cgi?id=98699
Bug ID: 98699
Summary: "float[a+4 ? 1:1] f;" crashes glsl_compiler
Product: Mesa
Version: git
Hardware: Other
OS: All
Status: NEW
Severity: normal
---
src/intel/vulkan/Makefile.sources |1 -
src/intel/vulkan/genX_pipeline.c | 1273 +++-
src/intel/vulkan/genX_pipeline_util.h | 1300 -
3 files changed, 1272 insertions(+), 1302 deletions(-)
delete mode 100644 src/intel/vu
This commit makes both gen7 and gen8 pipeline setup emit state packets
in exactly the same order.
---
src/intel/vulkan/gen7_pipeline.c | 7 ++-
src/intel/vulkan/gen8_pipeline.c | 6 +++---
2 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/int
---
src/intel/vulkan/Makefile.sources | 4 --
src/intel/vulkan/anv_genX.h | 7 ---
src/intel/vulkan/gen7_pipeline.c | 110 --
src/intel/vulkan/gen8_pipeline.c | 92 ---
src/intel/vulkan/genX_pipeline.c | 80
---
src/intel/vulkan/gen7_pipeline.c | 56 +--
src/intel/vulkan/gen8_pipeline.c | 19 +---
src/intel/vulkan/genX_pipeline_util.h | 53 +
3 files changed, 55 insertions(+), 73 deletions(-)
diff --git a/src/intel/vulk
---
src/intel/vulkan/gen7_pipeline.c | 57 +---
src/intel/vulkan/gen8_pipeline.c | 38 +--
src/intel/vulkan/genX_pipeline_util.h | 70 +++
3 files changed, 72 insertions(+), 93 deletions(-)
diff --git a/src/intel/vu
It gets a new name and moved to genX_pipeline_util.h.
---
src/intel/vulkan/gen8_pipeline.c | 12 +---
src/intel/vulkan/genX_pipeline_util.h | 8
2 files changed, 9 insertions(+), 11 deletions(-)
diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.
There are a few dynamic bits, namely binding table and sampler addresses,
but most of it is static and really belongs in the pipeline. It certainly
doesn't belong in flush_compute_descriptor_set. We'll use the same state
merging trick we use for gen7 DEPTH_STENCIL.
---
src/intel/vulkan/anv_priva
---
src/intel/vulkan/genX_pipeline.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 0af37e4..a1beb81 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
---
src/intel/genxml/gen6.xml| 4 ++--
src/intel/genxml/gen7.xml| 4 ++--
src/intel/genxml/gen75.xml | 4 ++--
src/intel/genxml/gen8.xml| 2 +-
src/intel/genxml/gen9.xml| 2 +-
src/intel/vulkan/gen7_pipeline.c | 4 ++--
src/intel/vulkan/gen8_pipeline.c | 2 +-
Now that we have anv_shader_bin, they're completely redundant with other
information we have in the pipeline. For vertex shaders, we also to
through way too much work to put the offset in one or the other field and
then look at which one we put it in later.
---
src/intel/vulkan/anv_pipeline.c
---
src/intel/blorp/blorp_genX_exec.h | 4 ++--
src/intel/genxml/gen6.xml | 16 +---
src/intel/genxml/gen7.xml | 16 +---
src/intel/genxml/gen75.xml| 16 +---
src/intel/genxml/gen8.xml | 6 +++---
src/intel/genxml/gen9.xml
---
src/intel/vulkan/gen7_pipeline.c | 5 +
src/intel/vulkan/gen8_pipeline.c | 3 +--
src/intel/vulkan/genX_pipeline_util.h | 8
3 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c
index 52577f5.
---
src/intel/blorp/blorp_genX_exec.h | 8
src/intel/genxml/gen6.xml | 6 +++---
src/intel/genxml/gen7.xml | 6 +++---
src/intel/genxml/gen75.xml| 6 +++---
src/intel/vulkan/gen7_pipeline.c | 6 +++---
5 files changed, 16 insertions(+), 16 deletions(-)
diff --git
---
src/intel/vulkan/gen8_pipeline.c | 28 +---
src/intel/vulkan/genX_pipeline_util.h | 32
2 files changed, 33 insertions(+), 27 deletions(-)
diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c
index 78514
We use the names from gen8+
Signed-off-by: Jason Ekstrand
---
src/intel/genxml/gen6.xml| 6 +++---
src/intel/genxml/gen7.xml| 6 +++---
src/intel/genxml/gen75.xml | 6 +++---
src/intel/vulkan/gen7_pipeline.c | 6 +++---
4 files changed, 12 insertions(+), 12 deletions(-)
di
---
src/intel/vulkan/gen7_pipeline.c | 24 ++--
src/intel/vulkan/gen8_pipeline.c | 21 +++--
src/intel/vulkan/genX_pipeline_util.h | 12
3 files changed, 49 insertions(+), 8 deletions(-)
diff --git a/src/intel/vulkan/gen7_pipeline.c b/src
---
src/intel/vulkan/gen7_pipeline.c | 29 +---
src/intel/vulkan/gen8_pipeline.c | 57 ++-
src/intel/vulkan/genX_pipeline_util.h | 85 +++
3 files changed, 89 insertions(+), 82 deletions(-)
diff --git a/src/intel/vulkan/gen7_pi
---
src/intel/vulkan/gen8_pipeline.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c
index 40cfe3f..f023d6c 100644
--- a/src/intel/vulkan/gen8_pipeline.c
+++ b/src/intel/vulkan/gen8_pipeline.c
@@ -209,7 +209,7
From the Vulkan spec version 1.0.32 docs for vkCreateGraphicsPipelines:
The stage member of one element of pStages must be
VK_SHADER_STAGE_VERTEX_BIT
Since a vertex shader is always required, this hasn't been used since we
deleted meta. Let's get rid of the complexity.
---
src/intel/vul
---
src/intel/vulkan/gen7_pipeline.c | 48 +--
src/intel/vulkan/gen8_pipeline.c | 62 +
src/intel/vulkan/genX_pipeline_util.h | 73 +++
3 files changed, 75 insertions(+), 108 deletions(-)
diff --git a/src/in
This series started off as me thinking that we should set the correct
sampler and binding table entry counts because maybe caching those things
would improve performance. Then it turned into spring cleaning. The end
result is that gen7_pipeline.c, gen8_pipeline.c, and genX_pipeline_util.h
are all
> We'd really want to do:
>
> git rm src/amd/common/Makefile.sources
> git mv src/amd/common/Makefile.am src/amd/Makefile.common.am
> sed -i s|common/||g src/amd/Makefile.common.am
> + fix the odd piece throughout.
>
> As-is we have the sources lists duplicated and makefiles async from
> one anothe
Both patches are:
Reviewed-by: Timothy Arceri
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https://bugs.freedesktop.org/show_bug.cgi?id=98694
Kenneth Graunke changed:
What|Removed |Added
Assignee|mesa-dev@lists.freedesktop. |kenn...@whitecape.org
https://bugs.freedesktop.org/show_bug.cgi?id=97422
Kenneth Graunke changed:
What|Removed |Added
Assignee|mesa-dev@lists.freedesktop. |kenn...@whitecape.org
Karol Herbst's fuzzing efforts noticed that we would segfault on:
void bug() {
2(0);
}
We just need to bail if the function name isn't an identifier.
Based on a bug fix by Karol Herbst.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97422
Signed-off-by: Kenneth Graunke
---
Karol Herbst's fuzzing efforts discovered that we would hit the
following assert:
assert(dummy_instructions.is_empty());
when processing an illegal array size expression of
float[(1=1)?1:1] t;
In do_assignment, we realized we needed an rvalue for (1 = 1), and
generated a temporary variabl
On Wed, Nov 2, 2016 at 10:33 PM, Marek Olšák wrote:
> On Wed, Nov 2, 2016 at 3:02 PM, Nicolai Hähnle wrote:
>> Patches 1, 2, 4 - 6:
>>
>> Reviewed-by: Nicolai Hähnle
>
> Thanks.
>
>>
>> I have one pending LLVM patch related to indirect addressing. Not sure if
>> that's related to the regressions
Am 08.11.2016 21:16, schrieb Serge Martin:
On Sunday 06 November 2016 17:02:26 Dieter Nützel wrote:
After latest clover commit 'luxmark-v3.0' sigfault immediately:
Hello
Did you bisect it? Luxmark seems to crash just the same here without
this
commit.
Serge
Hello Serge,
yes, of course (
--
Christian Gmeiner, MSc
https://soundcloud.com/christian-gmeiner
2016-11-10 19:25 GMT+01:00 Emil Velikov :
> On 9 November 2016 at 14:50, Christian Gmeiner
> wrote:
>> Changes since v1:
>> - removed not needed includes
>>
> They are needed actually, although transitively resolved via the
> r
2016-11-10 19:23 GMT+01:00 Emil Velikov :
> On 9 November 2016 at 14:50, Christian Gmeiner
> wrote:
>> Changes since v1:
>> - renamed function to loader_get_extensions_name
>> - moved function into loader
>>
>> Signed-off-by: Christian Gmeiner
>> ---
>> src/loader/loader.c | 14 ++
2016-11-12 15:02 GMT+01:00 Daniel Vetter :
> On Sat, Nov 12, 2016 at 3:01 PM, Rob Clark wrote:
>> On Sat, Nov 12, 2016 at 8:30 AM, Daniel Vetter wrote:
>>> On Fri, Nov 11, 2016 at 05:57:54PM +0100, Wladimir J. van der Laan wrote:
Vivante GPUs with HALTI0 feature support a DRAW_INSTANCED comm
On Sat, Nov 12, 2016 at 3:01 PM, Rob Clark wrote:
> On Sat, Nov 12, 2016 at 8:30 AM, Daniel Vetter wrote:
>> On Fri, Nov 11, 2016 at 05:57:54PM +0100, Wladimir J. van der Laan wrote:
>>> Vivante GPUs with HALTI0 feature support a DRAW_INSTANCED command in the
>>> command stream to draw a number o
https://bugs.freedesktop.org/show_bug.cgi?id=98694
--- Comment #1 from Karol Herbst ---
backtrace:
#0 0x76d794eb in __GI_raise (sig=sig@entry=6) at
../sysdeps/unix/sysv/linux/raise.c:54
#1 0x76d7aa71 in __GI_abort () at abort.c:89
#2 0x76d72309 in __assert_fail_base (f
https://bugs.freedesktop.org/show_bug.cgi?id=98694
Bug ID: 98694
Summary: "(5=2)?1:1" as array size decleration crashes
glsl_compiler
Product: Mesa
Version: git
Hardware: Other
OS: All
Status: NE
https://bugs.freedesktop.org/show_bug.cgi?id=97422
--- Comment #4 from Karol Herbst ---
Created attachment 127929
--> https://bugs.freedesktop.org/attachment.cgi?id=127929&action=edit
possible patch
would something like that be okay to fix this or is it actually the wrong
place?
--
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