[Mesa-dev] [PATCH] i965: do not release GLSL IR for SSO programs

SSO shader programs can be later modified by attaching/detaching shaders and relinked, this requires IR. This patch fixes regression caused by 4542c7ed5fc6d8cb2495d322b4f06d802d7292cc. Signed-off-by: Tapani Pälli Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97715 Cc: "12.0 13.0" --- s

Re: [Mesa-dev] [PATCH 1/3] vl/dri3: use external texture as back buffers

Hi Leo, On Mon, Oct 24, 2016 at 03:18:19PM -0400, Leo Liu wrote: > There are a couple of other issues from a brief test: > > 1. Compile warnings for presentation.c. I will fix this in v2 with the changes that christian suggested, it might be because of the use of #if which would anyway be remove

[Mesa-dev] [Bug 98245] GLES3.1 link negative dEQP "expected linking to fail, but passed."

https://bugs.freedesktop.org/show_bug.cgi?id=98245 --- Comment #2 from Iago Toral --- (In reply to Iago Toral from comment #1) > These seem to be two different issues so I think it is probably best to > create two different bug reports. > > I have sent a patch for review that fixes the first one

[Mesa-dev] [Bug 98134] dEQP-GLES31.functional.debug.negative_coverage.get_error.buffer.draw_buffers wants a different GL error code

https://bugs.freedesktop.org/show_bug.cgi?id=98134 Tapani Pälli changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Mesa-dev] [Bug 97524] Samplers referring to the same texture unit with different types should raise GL_INVALID_OPERATION

https://bugs.freedesktop.org/show_bug.cgi?id=97524 --- Comment #11 from Tapani Pälli --- > All other GPU drivers I tested with handle this gracefully by raising a > GL_INVALID_OPERATION error and continuing rendering the rest normally. For which command in the sample program should GL_INVALID_OP

[Mesa-dev] [Bug 98345] dEQP EGL: negative test failed w/ invalid return

https://bugs.freedesktop.org/show_bug.cgi?id=98345 Tapani Pälli changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Mesa-dev] [PATCH v2 4/6] i965/blit: Break blits into chunks in set_alpha_to_one

v2: Properly handle linear blit alignment restrictions Signed-off-by: Jason Ekstrand --- src/mesa/drivers/dri/i965/intel_blit.c | 88 -- 1 file changed, 73 insertions(+), 15 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/

[Mesa-dev] [PATCH v2 5/6] i965/blit: Break blits into chunks in intel_miptree_blit

This allows us to blit much larger images than if we use the blitter directly. In particular, it gives us an almost infinite image height compared to the fairly limiting 32k. We do, however, still have a restriction on stride of the image because handling larger strides, while possible, is fairly

[Mesa-dev] [PATCH v2 2/6] i965/miptree: Break miptree -> ISL tiling conversion into a helper

Signed-off-by: Jason Ekstrand --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 56 +++ src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 3 ++ 2 files changed, 34 insertions(+), 25 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drive

[Mesa-dev] [PATCH v2 6/6] i965/miptree: Remove the width/height < 32768 restrictions

These restrictions existed because intel_miptree_blit couldn't handle surfaces bigger than 32k. How that we're chopping blits up into chunks, it can handle any size we throw at it so we can get rid of this restriction. This improves the terrain tests in synmark by 25-30% on my Sky Lake gt3. Signe

[Mesa-dev] [PATCH v2 3/6] i965/blit: Remove a bogus assertion

This assertion, while valid for linear buffers, doesn't work properly for tiled memory. It used to work most of the time because the offset provided was always to the left-hand edge of the image. However, if you use a byte offset to get to the inside of the image, the height * stride calculation

[Mesa-dev] [PATCH v2 1/6] i965/miptree: Remove the stencil_as_y_tiled parameter from get_aligned_offset

The only actual user of this parameter was blorp and, since the conversion to ISL, it no longer uses this function. Signed-off-by: Jason Ekstrand --- src/mesa/drivers/dri/i965/brw_blorp.c | 3 +-- src/mesa/drivers/dri/i965/brw_misc_state.c| 6 ++ src/mesa/drivers/dri/i965/gen6_

[Mesa-dev] [PATCH v2 0/6] i965: Remove width/height restrictions on tiled images

Sorry for the quick re-send, but I realized after sending that there were a couple of issues (including a patch ordering problem) in the original version. Sadly, a full piglit run on Haswell (which makes pretty good use of the blitter) didn't show any of these issues so it wasn't caught earlier.

Re: [Mesa-dev] Proposal of date-based Mesa versioning for 2017

folks, are you looking for ways to make simple things complicated ? date-based versioning (eg. -MM) only makes sense, when you have an appropriate release schedule. I'd really prefer semantic versioning - especially for stable distros and embedded systems (here you dont wanna do arbitrary up

Re: [Mesa-dev] [PATCH] scons: Require libdrm >= 2.4.65 for DRM.

On 25/10/16 11:01 AM, Michel Dänzer wrote: > On 25/10/16 09:17 AM, Vedran Miletić wrote: >> On 10/25/2016 01:41 AM, Vinson Lee wrote: >>> Fix SCons build. drmDevicePtr is not available until libdrm 2.4.65. >>> >>> Compiling src/loader/loader.c ... >>> src/loader/loader.c:111:40: error: unknown ty

Re: [Mesa-dev] [PATCH] scons: Require libdrm >= 2.4.65 for DRM.

On 25/10/16 09:17 AM, Vedran Miletić wrote: > On 10/25/2016 01:41 AM, Vinson Lee wrote: >> Fix SCons build. drmDevicePtr is not available until libdrm 2.4.65. >> >> Compiling src/loader/loader.c ... >> src/loader/loader.c:111:40: error: unknown type name ‘drmDevicePtr’ >> static char *drm_constr

[Mesa-dev] [Bug 98406] [vulkan, radv] with Intel iGPU and AMD dGPU coruptions on display

https://bugs.freedesktop.org/show_bug.cgi?id=98406 Mike Lothian changed: What|Removed |Added CC||m...@fireburn.co.uk -- You are receiving

Re: [Mesa-dev] [PATCH] scons: Require libdrm >= 2.4.65 for DRM.

On 10/25/2016 01:41 AM, Vinson Lee wrote: Fix SCons build. drmDevicePtr is not available until libdrm 2.4.65. Compiling src/loader/loader.c ... src/loader/loader.c:111:40: error: unknown type name ‘drmDevicePtr’ static char *drm_construct_id_path_tag(drmDevicePtr device)

[Mesa-dev] [PATCH] nir: stop adjusting driver location for varying packing

As of 59864e8e020 we just use the location assigned by the front-end and no longer need this for i965. Since there were some issues in the logic with assigning arrays the same driver location if they didn't start at the same location just remove it and let other drivers implement a solution if nee

Re: [Mesa-dev] [PATCH mesa] egl/dri2: swap_buffers_with_damage falls back to swap_buffers

On Mon, Oct 24, 2016 at 5:41 PM, Eric Engestrom wrote: > CC: Rob Herring > CC: Rob Clark > Suggested-by: Emil Velikov > Signed-off-by: Eric Engestrom Good, you beat me to it. Reviewed-by: Rob Herring > --- > src/egl/drivers/dri2/egl_dri2_fallbacks.h | 3 ++- > 1 file changed, 2 insertions

Re: [Mesa-dev] [PATCH] scons: Require libdrm >= 2.4.65 for DRM.

Reviewed-by: Edward O'Callaghan On 10/25/2016 10:41 AM, Vinson Lee wrote: > Fix SCons build. drmDevicePtr is not available until libdrm 2.4.65. > > Compiling src/loader/loader.c ... > src/loader/loader.c:111:40: error: unknown type name ‘drmDevicePtr’ > static char *drm_construct_id_path_tag(

[Mesa-dev] [PATCH] scons: Require libdrm >= 2.4.65 for DRM.

Fix SCons build. drmDevicePtr is not available until libdrm 2.4.65. Compiling src/loader/loader.c ... src/loader/loader.c:111:40: error: unknown type name ‘drmDevicePtr’ static char *drm_construct_id_path_tag(drmDevicePtr device) ^ Fixes: 4a183f4d06f8 ("

Re: [Mesa-dev] [PATCH 6/6] i965/miptree: Remove the width/height < 32768 restrictions

On 16-10-24 15:36:59, Jason Ekstrand wrote: Even though this patch series is from-scratch, Ben deserves most of the credit for tracking this down. He had a series some time ago to fix the issue for the terrain tests but it never ended up landing for a variety of reasons (many of which were stupi

[Mesa-dev] [Bug 98421] src/loader/loader.c:111:40: error: unknown type name ‘drmDevicePtr’

https://bugs.freedesktop.org/show_bug.cgi?id=98421 Bug ID: 98421 Summary: src/loader/loader.c:111:40: error: unknown type name ‘drmDevicePtr’ Product: Mesa Version: git Hardware: x86-64 (AMD64) OS: Linux (Al

[Mesa-dev] [PATCH] st/omx/enc Raise default encode level

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=91281 Signed-off-by: Andy Furniss --- src/gallium/state_trackers/omx/vid_enc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/state_trackers/omx/vid_enc.c b/src/gallium/state_trackers/omx/vid_enc.c index 0d7ab2

Re: [Mesa-dev] [PATCH V3] i965: rewrite brw_setup_vue_interpolation()

On Fri, Oct 21, 2016 at 5:13 PM, Timothy Arceri < timothy.arc...@collabora.com> wrote: > Here brw_setup_vue_interpolation() is rewritten not to use the > InterpQualifier > array in gl_fragment_program which will allow us to remove it. > > This change also makes the code which is only used by gen4/

[Mesa-dev] [PATCH mesa] egl/dri2: swap_buffers_with_damage falls back to swap_buffers

CC: Rob Herring CC: Rob Clark Suggested-by: Emil Velikov Signed-off-by: Eric Engestrom --- src/egl/drivers/dri2/egl_dri2_fallbacks.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/egl/drivers/dri2/egl_dri2_fallbacks.h b/src/egl/drivers/dri2/egl_dri2_fallbacks.h inde

[Mesa-dev] [PATCH] radeon/vce Handle H.264 level 5.2

For gstreamer Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=91281 Signed-off-by: Andy Furniss --- src/gallium/drivers/radeon/radeon_vce.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c i

Re: [Mesa-dev] [PATCH 6/6] i965/miptree: Remove the width/height < 32768 restrictions

Even though this patch series is from-scratch, Ben deserves most of the credit for tracking this down. He had a series some time ago to fix the issue for the terrain tests but it never ended up landing for a variety of reasons (many of which were stupid). Ben, would you like me to credit you some

[Mesa-dev] [PATCH 19/24] winsys/amdgpu: allocate FMASK properly

From: Marek Olšák I expect no change in behavior, because r600_texture.c forces the same tile mode as the base texture has. --- src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c

[Mesa-dev] [PATCH 04/24] gallium/radeon: fold radeon_winsys::surface_best into radeon/winsys

From: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 6 ++ src/gallium/drivers/radeon/radeon_winsys.h | 10 + src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 7 --- src/gallium/winsys/radeon/drm/radeon_drm_surface.c | 24 ++

[Mesa-dev] [PATCH 18/24] gallium/radeon: print tiling index when printing texture info

From: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index ca82a74..2f2c17c 100644 --- a/src/gallium/drivers/radeon/r60

[Mesa-dev] [PATCH 20/24] gallium/radeon: don't force the same tiling parameters for FMASK

From: Marek Olšák GCN can use a completely different tile mode for FMASK. FMASK allocation now skips one unrelated amdgpu_surface_init codepath as hinted by the assertion. --- src/gallium/drivers/radeon/r600_texture.c | 18 ++ src/gallium/winsys/amdgpu/drm/amdgpu_surface.c

[Mesa-dev] [PATCH 05/24] winsys/amdgpu: remove unused definitions

From: Marek Olšák --- src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 8 1 file changed, 8 deletions(-) diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c index 95da4ac..94fe7d6 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgp

[Mesa-dev] [PATCH 23/24] gallium/radeon: stop using PIPE_BIND_CUSTOM

From: Marek Olšák it has no effect whatsoever --- src/gallium/drivers/r600/evergreen_compute.c| 6 ++ src/gallium/drivers/r600/r600_shader.c | 2 +- src/gallium/drivers/r600/r600_state_common.c| 4 ++-- src/gallium/drivers/radeon/r600_query.c | 4 ++-- src/gallium/dr

[Mesa-dev] [PATCH 21/24] gallium/radeon: remove unused r600_cmask_info members

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.h | 4 src/gallium/drivers/radeon/r600_texture.c | 15 +++ 2 files changed, 3 insertions(+), 16 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe

[Mesa-dev] [PATCH 12/24] gallium/radeon: remove unnecessary fields from radeon_surf_level

From: Marek Olšák --- src/gallium/drivers/r600/evergreen_state.c | 8 src/gallium/drivers/r600/r600_state.c | 8 src/gallium/drivers/radeon/r600_texture.c | 10 -- src/gallium/drivers/radeon/radeon_winsys.h | 4 src/gallium/

[Mesa-dev] [PATCH 22/24] r600g: remove a redundant buffer_create helper

From: Marek Olšák --- src/gallium/drivers/r600/r600_state.c | 31 --- 1 file changed, 8 insertions(+), 23 deletions(-) diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index b00315d..737d770 100644 --- a/src/gallium/drivers/

[Mesa-dev] [PATCH 13/24] gallium/radeon: remove r600_htile_info

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.h | 9 - src/gallium/drivers/radeon/r600_texture.c | 49 --- src/gallium/drivers/radeon/radeon_winsys.h| 1 - 3 files changed, 21 insertions(+), 38 deletions(-) diff --git a/src/gallium/drive

[Mesa-dev] [PATCH 17/24] gallium/radeon: don't do (fmask.size && cmask.size)

From: Marek Olšák fmask implies that cmask is present too. --- src/gallium/drivers/r600/evergreen_state.c | 2 +- src/gallium/drivers/r600/r600_state.c | 2 +- src/gallium/drivers/radeonsi/si_state.c| 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/drive

[Mesa-dev] [PATCH 16/24] gallium/radeon: re-order radeon_surf::dcc and htile members

From: Marek Olšák --- src/gallium/drivers/radeon/radeon_winsys.h | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h index cec1274..2330cdd 100644 --- a/src/gallium/drivers/radeon/

[Mesa-dev] [PATCH 09/24] radeon/vce: use nblk_y instead of npix_y

From: Marek Olšák npix_y will be removed. level[0].npix_y will be removed too. nblk_y should be the same as npix_y if the block height == 1. However, nblk_y is aligned to the tile size, so it can be greater than npix_y. If that's a problem, we'll have to save the input height of surface_init and

[Mesa-dev] [PATCH 03/24] gallium/radeon: use r600_gfx_write_event_eop everywhere

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.c | 4 +++- src/gallium/drivers/radeon/r600_query.c | 17 - src/gallium/drivers/radeonsi/si_state_draw.c | 12 +++- 3 files changed, 10 insertions(+), 23 deletions(-) diff --git a/src/gallium/drive

[Mesa-dev] [PATCH 08/24] gallium/radeon: define RADEON_SURF_MODE_* as enums

From: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 12 +++- src/gallium/drivers/radeon/radeon_winsys.h | 11 +++ 2 files changed, 14 insertions(+), 9 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c

[Mesa-dev] [PATCH 07/24] gallium/radeon: stop using some input fields from radeon_surface

From: Marek Olšák --- src/gallium/drivers/r600/evergreen_state.c | 2 +- src/gallium/drivers/r600/r600_state.c | 2 +- src/gallium/drivers/radeon/r600_texture.c | 32 +++--- src/gallium/drivers/radeonsi/si_state.c| 4 ++-- 4 files changed, 20 insertions(+), 2

[Mesa-dev] [PATCH 15/24] gallium/radeon: rename bo_size -> surf_size, bo_alignment -> surf_alignment

From: Marek Olšák these names were misleading. --- src/gallium/drivers/radeon/r600_test_dma.c | 2 +- src/gallium/drivers/radeon/r600_texture.c | 10 +- src/gallium/drivers/radeon/radeon_video.c | 4 ++-- src/gallium/drivers/radeon/radeon_winsys.h | 4

[Mesa-dev] [PATCH 14/24] gallium/radeon: remove flags specific to libdrm_radeon from winsys interface

From: Marek Olšák These just say whether libdrm can assume that the latest radeon_surface definition is used by Mesa. --- src/gallium/drivers/radeon/r600_texture.c | 14 ++ src/gallium/drivers/radeon/radeon_winsys.h | 3 +-- src/gallium/winsys/radeon/drm/radeon_drm_

[Mesa-dev] [PATCH 02/24] gallium/radeon: make r600_gfx_write_fence more generic

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.c | 35 +++ src/gallium/drivers/radeon/r600_pipe_common.h | 7 -- src/gallium/drivers/radeon/r600_query.c | 3 ++- src/gallium/drivers/radeonsi/si_perfcounter.c | 3 ++- 4 files changed, 34 ins

[Mesa-dev] [PATCH 06/24] gallium/radeon: fold r600_setup_surface into r600_init_surface

From: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 62 --- 1 file changed, 24 insertions(+), 38 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index c386549..1b1ea66 100644 --- a/src/gal

[Mesa-dev] [PATCH 00/24] RadeonSI: Massive radeon_surf winsys interface cleanup and more

Hi, Most of this series cleans up the radeon_surf-based winsys interface, and texture, fmask, and metadata (cmask, htile) allocation, and also other code working with textures. The series starts with EVENT_WRITE_EOP cleanups and ends with buffer_create cleanups. Please review. Marek ___

[Mesa-dev] [PATCH 1/6] i965/miptree: Remove the stencil_as_y_tiled parameter from get_aligned_offset

The only actual user of this parameter was blorp and, since the conversion to ISL, it no longer uses this function. Signed-off-by: Jason Ekstrand --- src/mesa/drivers/dri/i965/brw_blorp.c | 3 +-- src/mesa/drivers/dri/i965/brw_misc_state.c| 6 ++ src/mesa/drivers/dri/i965/gen6_

[Mesa-dev] [PATCH 6/6] i965/miptree: Remove the width/height < 32768 restrictions

These restrictions existed because intel_miptree_blit couldn't handle surfaces bigger than 32k. How that we're chopping blits up into chunks, it can handle any size we throw at it so we can get rid of this restriction. This improves the terrain tests in synmark by 25-30% on my Sky Lake gt3. Signe

[Mesa-dev] [PATCH 4/6] i965/blit: Break blits into chunks in intel_miptree_blit

This allows us to blit much larger images than if we use the blitter directly. In particular, it gives us an almost infinite image height compared to the fairly limiting 32k. We do, however, still have a restriction on stride of the image because handling larger strides, while possible, is fairly

[Mesa-dev] [PATCH 5/6] i965/blit: Break blits into chunks in set_alpha_to_one

Signed-off-by: Jason Ekstrand --- src/mesa/drivers/dri/i965/intel_blit.c | 56 +- 1 file changed, 41 insertions(+), 15 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index 95d00d3..78c4578 100644 --- a/sr

[Mesa-dev] [PATCH 2/6] i965/miptree: Break miptree -> ISL tiling conversion into a helper

Signed-off-by: Jason Ekstrand --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 56 +++ src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 3 ++ 2 files changed, 34 insertions(+), 25 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drive

[Mesa-dev] [PATCH 1/4] gallium/radeon: fix incorrect bpe use in si_set_optimal_micro_tile_mode

From: Marek Olšák Oh my god, I wonder what catastrophic issues this was causing on SI. Cc: 13.0 --- src/gallium/drivers/radeon/r600_texture.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/rade

[Mesa-dev] [PATCH 2/4] gallium/radeon: make sure the address of separate CMASK is aligned properly

From: Marek Olšák This should fix random GPU hangs on Hawaii and Fiji. Cc: 11.2 12.0 13.0 --- src/gallium/drivers/radeon/r600_texture.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.

[Mesa-dev] [PATCH 4/4] radeonsi: enable SDMA on Carrizo and all CIK chips again

From: Marek Olšák SDMA might be fixed by: "winsys/amdgpu: fix radeon_surf::macro_tile_index for imported textures" --- src/gallium/drivers/radeonsi/cik_sdma.c | 10 -- 1 file changed, 10 deletions(-) diff --git a/src/gallium/drivers/radeonsi/cik_sdma.c b/src/gallium/drivers/radeonsi/

[Mesa-dev] [PATCH 0/4] RadeonSI: critical fixes

Patch 1: SI fix for MSAA for Mesa 13.0. I don't know the impact of that bug. Patch 2: Possible GPU hang fix for Hawaii and Fiji when using separate CMASK. Patch 3: Addrlib integration fix that hopefully resolves our SDMA issues. Patch 4: Let's enable SDMA again. Please review. Marek _

[Mesa-dev] [PATCH 3/4] winsys/amdgpu: fix radeon_surf::macro_tile_index for imported textures

From: Marek Olšák Maybe this is why SDMA has been broken for many amdgpu users? SDMA is the only block which is used with imported textures and relies on this variable. DB also uses it, but it doesn't get imported textures, so it's unaffected. I do get SDMA failures on Tonga before this patch i

Re: [Mesa-dev] [PATCH] glsl: Skip invariant/precision linker checks for built-in variables.

On 10/19/2016 02:17 PM, Brian Paul wrote: On 10/19/2016 02:40 PM, Ian Romanick wrote: On 10/19/2016 11:11 AM, Kenneth Graunke wrote: Brian found a bug with my "inline built-ins immediately" code for shaders which use ftransform() and declare gl_Position invariant: https://lists.freedesktop.org

[Mesa-dev] [PATCH] radv/ac/llvm: shadow samplers only return one value.

From: Dave Airlie The intrinsic engine asserts in llvm due to this. Reported-by: Christoph Haag Cc: "13.0" Signed-off-by: Dave Airlie --- src/amd/common/ac_nir_to_llvm.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac

[Mesa-dev] [AppVeyor] mesa master #2515 completed

Build mesa 2515 completed Commit 88a618ce86 by Brian Paul on 10/24/2016 8:42 PM: tgsi: trivial build fix for MSVC\n\nReviewed-by: Marek Olšák Configure your notification preferences ___ mesa-dev mailing li

Re: [Mesa-dev] [PATCH] tgsi: trivial build fix for MSVC

The warning can be fixed by using {{0}}. Either way: Reviewed-by: Marek Olšák Marek On Mon, Oct 24, 2016 at 10:45 PM, Brian Paul wrote: > Unfortunately, this fix causes a warning with some versions of gcc > (such as 4.9.3): > > tgsi/tgsi_scan.c: In function 'scan_instruction': > tgsi/tgsi_scan

[Mesa-dev] [PATCH] tgsi: trivial build fix for MSVC

Unfortunately, this fix causes a warning with some versions of gcc (such as 4.9.3): tgsi/tgsi_scan.c: In function 'scan_instruction': tgsi/tgsi_scan.c:373:17: warning: missing braces around initializer [-Wmissing-braces] struct tgsi_full_src_register src = {0}; ^ tgsi/t

Re: [Mesa-dev] [PATCH v2] nv50/ir: do not perform global membar for shared memory

Reviewed-by: Ilia Mirkin On Mon, Oct 24, 2016 at 3:41 PM, Samuel Pitoiset wrote: > Shared memory is local to CTA, thus we should only wait for > prior memory writes which are visible to other threads in > the same CTA, and not at global level. This should speedup > compute shaders which use shar

Re: [Mesa-dev] [ANNOUNCE] mesa 13.0.0-rc2

On 24 October 2016 at 20:33, Jason Ekstrand wrote: > My three anv ICD patches were nominated but you didn't get them. > >> Jason Ekstrand (1): >> anv: Suffix the intel_icd file with the host CPU >> Here it is, squashed since it should have been way too messy otherwise. Thanks Emil

[Mesa-dev] [AppVeyor] mesa master #2512 failed

Build mesa 2512 failed Commit f35b1d156b by Marek Olšák on 10/19/2016 11:22 PM: tgsi/scan: scan texture offset operands\n\nThis seems important considering how much we depend on some of the flags.\n\nReviewed-by: Nicolai Hähnle Configure your notific

[Mesa-dev] [PATCH] Revert "wayland: Block for the frame callback in get_back_bo not dri2_swap_buffers"

This reverts commit 25cc889004aad6d1cab9edd76db898658e347b97, though since the code has changed, it was applied manually. The intent of moving blocking from SwapBuffers to get_back_bo, was to avoid unnecessary triple-buffering by ensuring that the compositor had fully processed the previous frame

[Mesa-dev] [PATCH v2] nv50/ir: do not perform global membar for shared memory

Shared memory is local to CTA, thus we should only wait for prior memory writes which are visible to other threads in the same CTA, and not at global level. This should speedup compute shaders which use shared memory. v2: - do not use == Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/no

Re: [Mesa-dev] [PATCH] gallium/radeon: make sure HTILE address is aligned properly

Reviewed-by: Bas Nieuwenhuizen On Mon, Oct 24, 2016 at 9:39 PM, Marek Olšák wrote: > From: Marek Olšák > > This should fix random GPU hangs on Hawaii and Fiji. > It's already been fixed in 13.0 and later. > > Cc: 11.2 12.0 > --- > src/gallium/drivers/radeon/r600_texture.c | 17 ++-

[Mesa-dev] [PATCH] gallium/radeon: make sure HTILE address is aligned properly

From: Marek Olšák This should fix random GPU hangs on Hawaii and Fiji. It's already been fixed in 13.0 and later. Cc: 11.2 12.0 --- src/gallium/drivers/radeon/r600_texture.c | 17 ++--- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_t

Re: [Mesa-dev] [ANNOUNCE] mesa 13.0.0-rc2

My three anv ICD patches were nominated but you didn't get them. On Mon, Oct 24, 2016 at 7:58 AM, Emil Velikov wrote: > The second release candidate for Mesa 13.0.0 is now available. > > > Dave Airlie (2): > radv: use emit_icmp for samples_identical > radv: allow cmask transitions wi

Re: [Mesa-dev] [PATCH 1/3] vl/dri3: use external texture as back buffers

There are a couple of other issues from a brief test: 1. Compile warnings for presentation.c. 2. When window resized, it's showing corruption, and sometimes corruption will stay. Regards, Leo On 10/24/2016 11:27 AM, Nayan Deshmukh wrote: On Mon, Oct 24, 2016 at 8:48 PM, Christian König

Re: [Mesa-dev] [PATCH 4/4] configure.ac: check for Glamor requirements only when needed

On 24 October 2016 at 19:28, Marek Olšák wrote: > On Mon, Oct 24, 2016 at 7:41 PM, Emil Velikov > wrote: >> On 24 October 2016 at 18:21, Marek Olšák wrote: >>> On Mon, Oct 24, 2016 at 11:33 AM, Emil Velikov >>> wrote: On 19 October 2016 at 19:31, Marek Olšák wrote: > On Wed, Oct 19,

Re: [Mesa-dev] [PATCH] isl/format: Correct ASTC entries of format info table

On Fri, Oct 21, 2016 at 10:47:53PM -0700, Jason Ekstrand wrote: > Are there separate formats for HDR? I'm not seeing any. I guess since the > HDR is a strict superset of LDR, it doesn't make much sense to have > separate enums. In any case, thanks for fixing this! > Correct. > Reviewed-by: Ja

Re: [Mesa-dev] [PATCH] st/glsl_to_tgsi: fix mismatch between TGSI BFI/BFE and GLSL

On 10/24/2016 04:05 PM, Nicolai Hähnle wrote: On 24.10.2016 15:49, Ilia Mirkin wrote: On Mon, Oct 24, 2016 at 9:43 AM, Nicolai Hähnle wrote: On 24.10.2016 15:38, Nicolai Hähnle wrote: On 24.10.2016 15:34, Ilia Mirkin wrote: These work properly on nvc0. I'd rather you work around it in your

[Mesa-dev] [PATCH 1/2] st/omx/dec: result buffers size should match codec decoder size

Otherwise fails the check of matching between decoder size and buffers size in kernel. Signed-off-by: Leo Liu Cc: 13.0 --- src/gallium/state_trackers/omx/vid_dec.c | 9 ++--- src/gallium/state_trackers/omx/vid_dec_h264.c | 16 +--- src/gallium/state_trackers/omx/vid_dec_h2

[Mesa-dev] [PATCH 2/2] st/omx/dec: disable tunnel for size different case

When the video coded size is different from frame size, we need the result buffers are same as coded size, which are not size compatible with encode required size, so that simply use no tunnel for this case instead of frame by frame converting. Signed-off-by: Leo Liu Cc: 13.0 --- src/gallium/st

Re: [Mesa-dev] [PATCH 4/4] configure.ac: check for Glamor requirements only when needed

On 24 October 2016 at 18:21, Marek Olšák wrote: > On Mon, Oct 24, 2016 at 11:33 AM, Emil Velikov > wrote: >> On 19 October 2016 at 19:31, Marek Olšák wrote: >>> On Wed, Oct 19, 2016 at 2:40 PM, Emil Velikov >>> wrote: On 18 October 2016 at 23:00, Marek Olšák wrote: > From: Marek Olš

Re: [Mesa-dev] [PATCH 02/25] intel/genxml: Add SO_WRITE_OFFSET registers for gen7-9

On 24/10/16 18:02, Jason Ekstrand wrote: On Mon, Oct 24, 2016 at 8:22 AM, Jason Ekstrand > wrote: On Oct 24, 2016 2:58 AM, "Lionel Landwerlin" mailto:lionel.g.landwer...@intel.com>> wrote: > > Reviewed-by: Lionel Landwerlin mailto:lionel.g.landwer...@

Re: [Mesa-dev] [PATCH 4/4] configure.ac: check for Glamor requirements only when needed

On Mon, Oct 24, 2016 at 11:33 AM, Emil Velikov wrote: > On 19 October 2016 at 19:31, Marek Olšák wrote: >> On Wed, Oct 19, 2016 at 2:40 PM, Emil Velikov >> wrote: >>> On 18 October 2016 at 23:00, Marek Olšák wrote: From: Marek Olšák --- configure.ac | 37 +

[Mesa-dev] [PATCH] configuire.ac: honour LLVM_LIBDIR when linking against LLVM

From: Emil Velikov Currently if one uses a non-default prefix, the path won't get propagated and we'll fail at link-time. A very quick and easy example is to install to /usr/local. At this point, llvm-config will be picked even without the --with-llvm-prefix, but regardless of the latter linking

Re: [Mesa-dev] [PATCH 02/25] intel/genxml: Add SO_WRITE_OFFSET registers for gen7-9

On Mon, Oct 24, 2016 at 8:22 AM, Jason Ekstrand wrote: > On Oct 24, 2016 2:58 AM, "Lionel Landwerlin" < > lionel.g.landwer...@intel.com> wrote: > > > > Reviewed-by: Lionel Landwerlin > > > > Would adding the single register for gen6 makes sense? > > It's not needed for this series but it wouldn'

Re: [Mesa-dev] [PATCH] st/glsl_to_tgsi: fix mismatch between TGSI BFI/BFE and GLSL

On 24.10.2016 17:16, Ilia Mirkin wrote: On Mon, Oct 24, 2016 at 11:12 AM, Nicolai Hähnle wrote: On 24.10.2016 16:44, Ilia Mirkin wrote: In any case, the GLSL way is backwards-compatible with the DX11 way. It just specifies some unspecified situations. No, it isn't -- that's the whole problem

[Mesa-dev] [Bug 97456] Detect wrong driver on AMD r4 graphic gpu

https://bugs.freedesktop.org/show_bug.cgi?id=97456 Jeremy Huddleston Sequoia changed: What|Removed |Added CC||japu...@gmail.com --- Commen

Re: [Mesa-dev] [PATCH] st/glsl_to_tgsi: fix mismatch between TGSI BFI/BFE and GLSL

On Mon, Oct 24, 2016 at 12:11 PM, Nicolai Hähnle wrote: > On 24.10.2016 17:16, Ilia Mirkin wrote: >> >> On Mon, Oct 24, 2016 at 11:12 AM, Nicolai Hähnle >> wrote: >>> >>> On 24.10.2016 16:44, Ilia Mirkin wrote: In any case, the GLSL way is backwards-compatible with the DX11 way. It

Re: [Mesa-dev] [PATCH] egl/android: implement minimal swap_buffers_with_damage

On 21 October 2016 at 22:07, Rob Herring wrote: > Since commit 0a606a400fe3 ("egl: add eglSwapBuffersWithDamageKHR"), > Android has been broken because the function eglSwapBuffersWithDamageKHR > is provided regardless of the extension being present. Also, the Android > meta-EGL always advertises t

Re: [Mesa-dev] [PATCH 1/3] vl/dri3: use external texture as back buffers

On Mon, Oct 24, 2016 at 8:48 PM, Christian König wrote: > Nice work, have you been able to fix all the issues you mentioned on your > last mail? > > Yes, it fixes all the known issues. But I have only tested it on my system. > Additional to that make sure that this set also keeps DRI2 working, i

Re: [Mesa-dev] [PATCH 02/25] intel/genxml: Add SO_WRITE_OFFSET registers for gen7-9

On Oct 24, 2016 2:58 AM, "Lionel Landwerlin" wrote: > > Reviewed-by: Lionel Landwerlin > > Would adding the single register for gen6 makes sense? It's not needed for this series but it wouldn't hurt. I'll add it to the patch. > On 22/10/16 18:50, Jason Ekstrand wrote: >> >> --- >> src/intel/

Re: [Mesa-dev] [PATCH 1/3] vl/dri3: use external texture as back buffers

Nice work, have you been able to fix all the issues you mentioned on your last mail? Additional to that make sure that this set also keeps DRI2 working, in patch #2 it looks like you call the new function without checking if it's available or not. Keep in mind that we possible compile both D

Re: [Mesa-dev] [PATCH 4/4] configure.ac: check for Glamor requirements only when needed

On 24 October 2016 at 10:47, Michel Dänzer wrote: > On 24/10/16 06:33 PM, Emil Velikov wrote: >> >> IIRC glamor + glx isn't really an option. > > That's true for Xorg, because Xorg is the thing which provides GLX in > the first place, so it cannot use GLX itself. (glamor on GLX works in > Xephyr t

Re: [Mesa-dev] [PATCH] st/glsl_to_tgsi: fix mismatch between TGSI BFI/BFE and GLSL

On Mon, Oct 24, 2016 at 11:12 AM, Nicolai Hähnle wrote: > On 24.10.2016 16:44, Ilia Mirkin wrote: >> In any case, the GLSL way is backwards-compatible with the DX11 way. >> It just specifies some unspecified situations. > > No, it isn't -- that's the whole problem :) > > Both GLSL and SM5 specify

Re: [Mesa-dev] [PATCH] amd/addrlib: limit fastcall/regparm to i386

On Sat, Oct 22, 2016 at 1:08 AM, Jason Ekstrand wrote: > On Fri, Oct 21, 2016 at 10:58 PM, Dave Airlie wrote: >> >> On 22 Oct. 2016 15:51, "Jason Ekstrand" wrote: >> > >> > Wait... Why are we building the AMD driver on ARM? I know AMD has been >> > talking about ARM-based servers, but are they

[Mesa-dev] [ANNOUNCE] mesa 13.0.0-rc2

The second release candidate for Mesa 13.0.0 is now available. Dave Airlie (2): radv: use emit_icmp for samples_identical radv: allow cmask transitions without fast clear Emil Velikov (3): automake: don't forget to pick wglext.h in the tarball anv: automake: cleanup the g

Re: [Mesa-dev] [PATCH] nv50/ir: display OP_BAR subops in debug mode

Reviewed-by: Ilia Mirkin On Mon, Oct 24, 2016 at 10:55 AM, Samuel Pitoiset wrote: > Signed-off-by: Samuel Pitoiset > --- > src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp | 9 + > 1 file changed, 9 insertions(+) > > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_print.c

[Mesa-dev] [PATCH] nv50/ir: display OP_BAR subops in debug mode

Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp | 9 + 1 file changed, 9 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp index 0c143e5..78c0757 100644 --- a/

Re: [Mesa-dev] [PATCH] st/glsl_to_tgsi: fix mismatch between TGSI BFI/BFE and GLSL

On Mon, Oct 24, 2016 at 10:05 AM, Nicolai Hähnle wrote: > On 24.10.2016 15:49, Ilia Mirkin wrote: >> >> On Mon, Oct 24, 2016 at 9:43 AM, Nicolai Hähnle >> wrote: >>> >>> On 24.10.2016 15:38, Nicolai Hähnle wrote: On 24.10.2016 15:34, Ilia Mirkin wrote: > > > These work

Re: [Mesa-dev] [PATCH] nv50/ir: do not perform global membar for shared memory

On 10/24/2016 04:35 PM, Ilia Mirkin wrote: On Mon, Oct 24, 2016 at 10:29 AM, Samuel Pitoiset wrote: Shared memory is local to CTA, thus we should only wait for prior memory writes which are visible to other threads in the same CTA, and not at global level. This should speedup compute shaders

Re: [Mesa-dev] [PATCH] nv50/ir: do not perform global membar for shared memory

On Mon, Oct 24, 2016 at 10:29 AM, Samuel Pitoiset wrote: > Shared memory is local to CTA, thus we should only wait for > prior memory writes which are visible to other threads in > the same CTA, and not at global level. This should speedup > compute shaders which use shared memory. > > Signed-off-

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