intel_mipmap_tree::logical_depth0 is now in number of 2D slices so we no
longer need to be multiplying by 6.
Signed-off-by: Jason Ekstrand
Cc: "12.0"
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 19 ++-
1 file changed, 2 insertions(+), 17 deletions(-)
diff --git a/src/me
Now that the logical_depth0 field is in number of 2D slices, we don't need
to be multiplying by 6 when creating the surface. It wasn't hurting
anything primarily because we get the actual length from the view which was
already handling it correctly.
Signed-off-by: Jason Ekstrand
---
src/mesa/dr
intel_mipmap_tree::logical_depth0 is now in 2-D slices so there is no need
for us to multiply by 6 when we go to fill out a blorp surface state.
Signed-off-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/gen8_blorp.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/src/me
This is required because the sampler unit used to fetch from the
framebuffer is unable to interpret non-color-compressed fast-cleared
single-sample texture data. Roughly the same limitation applies for
surfaces bound to texture or image units, but unlike texture sampling,
non-coherent framebuffer
Unfortunately due to the inconsistent meaning of some surface state
structure fields, we cannot re-use the same binding table entries for
sampling from and rendering into the same set of render buffers, so we
need to allocate a separate binding table block specifically for
render target reads if th
This iterates over the list of attached render buffers and binds
appropriate surface state structures to the binding table block
allocated for shader framebuffer read.
---
src/mesa/drivers/dri/i965/brw_state.h| 1 +
src/mesa/drivers/dri/i965/brw_state_upload.c | 4 ++
src/mesa/dr
The logic to calculate the right layout and dimensionality for a given
GL texture target is going to be useful elsewhere, factor it out from
intel_miptree_get_isl_surf().
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 71 ++-
src/mesa/drivers/dri/i965/intel_mipmap_tree
This gets rid of the duplication of logic between nir_setup_outputs()
and get_frag_output() by allocating fragment output temporaries lazily
whenever get_frag_output() is called. This makes nir_setup_outputs()
a no-op for the fragment shader stage.
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 7
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 89
1 file changed, 89 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 2872b2d..f5f918d 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b
This is not enabled on the original Gen4 part because it lacks surface
state tile offsets so it may not be possible to sample from arbitrary
non-zero layers of the framebuffer depending on the miptree layout (it
should be possible to work around this by allocating a scratch surface
and doing the sa
The result of a framebuffer fetch from a multisample FBO is inherently
per-sample, so the spec requires at least those sections of the shader
that depend on the framebuffer fetch result to be executed once per
sample.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 3 ++-
1 file changed, 2 insertions(+
This surface state control has been supported by all hardware
generations since G45.
---
src/mesa/drivers/dri/i965/brw_device_info.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_device_info.c
b/src/mesa/drivers/dri/i965/brw_device_info.c
index 77bbe78..4d90a
This allows the caller to bind a miptree using a texture target other
than the one it it was created with. The code should work even if the
memory layouts of the specified and original targets don't match, as
long as the caller only intends to access a single slice of the
miptree structure.
This
This will allow optimizing out the cache flush in some cases when
resolving wasn't necessary.
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 12
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 2 +-
2 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/
This gets the non-coherent framebuffer fetch path hooked up to the NIR
front-end.
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 19 +++
1 file changed, 19 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 281c704
This boolean flag was being used for two different things:
- To set the brw_wm_prog_data::dual_src_blend flag. Instead we can
just set it based on whether the dual_src_output register is valid,
which will be the case if the shader writes the secondary blending
color.
- To decide wheth
I'm about to change how fragment shader output locations are
represented, so the generic nir_intrinsic_store_output implementation
that assumes that outputs are just contiguous elements in the big
nir_outputs array won't work anymore. This somewhat simplified
implementation of nir_intrinsic_store_
The problem with the current approach is that driver output locations
are represented as a linear offset within the nir_outputs array, which
makes it rather difficult for the back-end to figure out what color
output and index some nir_intrinsic_load/store_output was meant for,
because the offset of
Some of the following changes in this series are specific to the
non-coherent path, so I need some way to tell whether the coherent or
non-coherent path is in use. The flag defaults to the value of the
gl_extensions::MESA_shader_framebuffer_fetch enable so that it can be
overridden easily on hardw
Most likely we had only ever used this macro on bitfields of less than
31 bits -- That's going to change shortly.
---
src/mesa/drivers/dri/i965/brw_defines.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers/dri/i965/brw
This will be required for the next commit since the non-coherent path
makes use of the fragment coordinates implicitly, so they need to be
calculated.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
This is a no-op if the platform supports coherent framebuffer fetch,
-- If it doesn't we just need to flush the render cache and invalidate
the texture cache in order for previous rendering to be visible to
framebuffer fetch.
---
src/mesa/drivers/dri/i965/brw_program.c | 20
1
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 5bf9243..602306b 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tre
This commit does three different things in a single pass in order to
keep the amount of churn low: Remove the for_gather boolean argument
which was unused, pass the isl_view argument by value rather than by
reference since I'll have to modify it from within the function, and
add a target argument t
This is an implementation of non-coherent framebuffer fetch as
described here [1] working on most hardware generations supported
by the i965 driver (from Gen5 to Gen8). My plan was to send the
coherent framebuffer fetch implementation for SKL+ first since
it's actually simpler than the non-coheren
No, it's not. But if the real op is OP_SUB, then the logic is a bit
different, since there's an implied extra neg on src(1).
On Fri, Jul 22, 2016 at 7:47 PM, Samuel Pitoiset
wrote:
> It's actually legal to have neg modifiers on both sources.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/galli
From: Marek Olšák
---
src/gallium/drivers/ddebug/dd_draw.c | 47
1 file changed, 26 insertions(+), 21 deletions(-)
diff --git a/src/gallium/drivers/ddebug/dd_draw.c
b/src/gallium/drivers/ddebug/dd_draw.c
index 95146ed..1b5cdc8 100644
--- a/src/gallium/drive
From: Marek Olšák
We don't want a core dump.
---
src/gallium/drivers/ddebug/dd_draw.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/ddebug/dd_draw.c
b/src/gallium/drivers/ddebug/dd_draw.c
index 35ae774..8cc51fc 100644
--- a/src/gallium/drivers/ddebug/dd
From: Marek Olšák
---
src/gallium/drivers/ddebug/dd_context.c | 50
src/gallium/drivers/ddebug/dd_draw.c| 204
src/gallium/drivers/ddebug/dd_pipe.h| 15 ++-
3 files changed, 140 insertions(+), 129 deletions(-)
diff --git a/src/gallium/drivers/
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_debug.c | 1 -
src/gallium/drivers/radeonsi/si_shader.c | 12 +---
src/gallium/drivers/radeonsi/si_shader.h | 1 -
3 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_debug.c
b/src/galliu
From: Marek Olšák
to separate individual shaders dumped consecutively.
---
src/gallium/drivers/radeonsi/si_shader.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index cb270e0..4794737 1006
From: Marek Olšák
---
src/gallium/drivers/ddebug/dd_context.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/src/gallium/drivers/ddebug/dd_context.c
b/src/gallium/drivers/ddebug/dd_context.c
index c0b2b3d..77fb9ae 100644
--- a/src/gallium/drivers/ddebug/dd_cont
From: Marek Olšák
---
src/gallium/drivers/ddebug/dd_draw.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/ddebug/dd_draw.c
b/src/gallium/drivers/ddebug/dd_draw.c
index c3fd968..35ae774 100644
--- a/src/gallium/drivers/ddebug/dd_draw.c
+++
From: Marek Olšák
The pipelined hang detection mode will not want to dump everything.
(and it's also time consuming) It will only dump shaders after a draw call
and then dump the status registers separately if a hang is detected.
---
src/gallium/drivers/ddebug/dd_draw.c| 12 ++--
src
From: Marek Olšák
---
src/gallium/drivers/ddebug/dd_draw.c | 66
src/gallium/drivers/ddebug/dd_pipe.h | 66
2 files changed, 66 insertions(+), 66 deletions(-)
diff --git a/src/gallium/drivers/ddebug/dd_draw.c
b/src/galli
From: Marek Olšák
---
src/gallium/drivers/ddebug/dd_draw.c | 29 +
1 file changed, 25 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/ddebug/dd_draw.c
b/src/gallium/drivers/ddebug/dd_draw.c
index 8cc51fc..1361c80 100644
--- a/src/gallium/drivers/ddebu
From: Marek Olšák
---
src/gallium/drivers/ddebug/dd_screen.c | 39 --
1 file changed, 23 insertions(+), 16 deletions(-)
diff --git a/src/gallium/drivers/ddebug/dd_screen.c
b/src/gallium/drivers/ddebug/dd_screen.c
index 119ee47..46869ab 100644
--- a/src/gallium/d
From: Marek Olšák
---
src/gallium/drivers/ddebug/dd_screen.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/ddebug/dd_screen.c
b/src/gallium/drivers/ddebug/dd_screen.c
index 46869ab..d4a50ac 100644
--- a/src/gallium/drivers/ddebug/dd_screen.c
+++ b/src
From: Marek Olšák
---
src/gallium/drivers/ddebug/dd_draw.c | 8
src/gallium/drivers/ddebug/dd_pipe.h | 4 ++--
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/ddebug/dd_draw.c
b/src/gallium/drivers/ddebug/dd_draw.c
index 86d6102..836f812 100644
--- a/
From: Marek Olšák
This cuts down the overhead of si_dump_shader when ddebug is capturing
shader logs, which is done for every draw call unconditionally (that's
quite a lot of work for a draw call).
---
src/gallium/drivers/radeonsi/si_debug.c | 11 ---
src/gallium/drivers/radeonsi
From: Marek Olšák
For good performance while being able to generate decent hang reports.
The report doesn't contain the parsed IB and the buffer list, but it
isolates the draw call and dumps shaders while not having to flush
the context.
This is for GPU hangs that are harder to reproduce and req
Hi,
This is for GPU hangs that are hard to reproduce and require interactive
playing for minutes or even hours.
The performance should be at least 50% of the performance without ddebug.
The added CPU overhead is mainly due to recording all states after every
draw call. The added GPU overhead is P
Christian König wrote:
From: Boyuan Zhang
For putimage call, if image format is yv12 (or IYUV with U V field swap)
This comment confuses me
AIUI + checking on fourcc.org yv12 is YVU and IYUV/I420 is YUV and nv12
is UVUVUV... so compared to the normal way of writing yuv/yCbCr
I wouldn't cal
It's actually legal to have neg modifiers on both sources.
Signed-off-by: Samuel Pitoiset
---
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
b/src/gallium/drivers/nouveau/code
Christian König wrote:
Hi guys,
I would like to get this commit today. I just cleaned up patch #1 a bit, fixes
some compiler warning in patch #3 and a build break in #4.
Andy any more comments/testing on this or can I add your Tested-by: on it?
I guess you saw comment in the other thread - on
Build mesa 1811 completed
Commit b33bccb519 by Jason Ekstrand on 7/22/2016 10:59 PM:
anv/pipeline: Set up point coord enables\n\nSigned-off-by: Jason Ekstrand \nReviewed-by: Kenneth Graunke \nTested-by: Lionel Landwerlin \nCc: "12.0"
Configure your n
Am 22.07.2016 um 22:40 schrieb Marek Olšák:
> Would anybody from VMWare like to comment?
I didn't really feel compelled to ;-).
The change looks reasonable to me. The whole transfer_inline_write thing
is there to make things faster, so if it's help saving cpu cycles by
using two separate functions
Build mesa 1810 failed
Commit 4031efaa57 by Jason Ekstrand on 7/22/2016 10:59 PM:
anv/pipeline: Set up point coord enables\n\nSigned-off-by: Jason Ekstrand \nReviewed-by: Kenneth Graunke \nTested-by: Lionel Landwerlin \nCc: "12.0"
Configure your noti
Tested-by: Lionel Landwerlin
On 23/07/16 00:28, Jason Ekstrand wrote:
Signed-off-by: Jason Ekstrand
Cc: "12.0"
---
src/intel/vulkan/genX_pipeline_util.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/src/intel/vulkan/genX_pipeline_util.h
b/src/intel/vulkan/genX_pipeline_util.h
i
Signed-off-by: Jason Ekstrand
Cc: "12.0"
---
src/intel/vulkan/genX_pipeline_util.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/src/intel/vulkan/genX_pipeline_util.h
b/src/intel/vulkan/genX_pipeline_util.h
index 52263df..516fc49 100644
--- a/src/intel/vulkan/genX_pipeline_util.h
+++
On Tue, Jul 19, 2016 at 3:24 PM, Ian Romanick wrote:
> After seeing Dave's series to add support GL_ARB_shader_gpu_int64 and
> thinking about adding support for 8- and 16-bit integers, I decided
> that something had to be done about the cut-and-paste madness that is
> ir_constant_expression.cpp.
Alejandro Piñeiro writes:
> Hi,
>
> On 15/07/16 22:46, Francisco Jerez wrote:
>> Alejandro Piñeiro writes:
>>
>>> On 14/07/16 21:24, Francisco Jerez wrote:
Alejandro Piñeiro writes:
> Without this commit, a image is considered valid if the level of the
> texture bound to the i
I didn't read over the code super closely, but all of the python looked
good and obvious minus a few nits (and they were all just nits).
For the python bits:
Acked-by: Dylan Baker
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Hi,
When I ran glxgears on my CentOS box with Mesa, the background of the x-window
looks transparent. When run with NVIDA graphics cad, it is solid. Is there a
setting to make the background a solid color?
Thanks
Sheng
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On Fri, Jul 01, 2016 at 04:08:50PM -0700, Jason Ekstrand wrote:
> The shortcut works just fine for MSAA and the comment even says so.
This patch is,
Reviewed-by: Nanley Chery
> ---
> src/intel/isl/isl.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/intel/isl/isl.
Quoting Ian Romanick (2016-07-19 12:24:57)
> From: Ian Romanick
>
> ldexp is weird because its two operands have different types. Add
> support for directly specifying the exact signatures of all the possible
> variations of an operation.
>
> Signed-off-by: Ian Romanick
> ---
> src/compiler/g
On Wednesday, July 20, 2016 9:49:40 PM PDT Francisco Jerez wrote:
> The EXT_shader_framebuffer_fetch extension defines alternative
> language for GLES2 shaders where user-defined fragment outputs are not
> allowed. Instead of using inout user-defined fragment outputs the
> shader is expected to re
Quoting Ian Romanick (2016-07-19 12:25:07)
> From: Ian Romanick
>
> Signed-off-by: Ian Romanick
> ---
> src/compiler/glsl/ir_expression_operation.py | 24 +++-
> 1 file changed, 23 insertions(+), 1 deletion(-)
>
> diff --git a/src/compiler/glsl/ir_expression_operation.py
>
On Thursday, July 21, 2016 9:21:39 PM PDT Jason Ekstrand wrote:
> I pulled the latest version of the Vulkan CTS and gave it a run. One of
> the major aditions was a pile of tests for different texturing operations.
> This demonstrated that our texturing support was, well, sub-par. These
> patches
https://bugs.freedesktop.org/show_bug.cgi?id=86326
Jan Vesely changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
Would anybody from VMWare like to comment?
Marek
On Mon, Jul 18, 2016 at 3:11 PM, Marek Olšák wrote:
> Hi,
>
> This series rewrites state tracking in st/mesa. The advantages of the new
> approach are described in the main patch. Here I'll just say it that it was
> motivated by a little inefficie
Would anybody from VMWare like to comment?
Marek
On Mon, Jul 18, 2016 at 2:25 PM, Marek Olšák wrote:
> From: Marek Olšák
>
> to reduce the call indirections with u_resource_vtbl.
>
> The worst call tree you could get was:
> - u_transfer_inline_write_vtbl
> - u_default_transfer_inline_writ
For those who would like to try this out, FYI, I've pushed this series just now.
Marek
On Thu, Jul 14, 2016 at 4:28 PM, Marek Olšák wrote:
> From: Marek Olšák
>
> We can remove the old reporting if people are OK with that.
> The old reporting has a bug that it reports 0->N changes as 0 % in sev
It is necessary to reuse existing BOs when dmabufs are imported. There
are 2 cases that need to be handled. dmabufs can be created/exported and
imported by the same process and can be imported multiple times.
Copying other drivers, add a hash table to track exported BOs so the
BOs get reused.
Cc:
On Fri, Jul 22, 2016 at 11:04 AM, Kenneth Graunke wrote:
> "flat centroid" and "flat sample" both just mean "flat", so we should
> ignore interpolateAtCentroid/Sample and just return the flat value.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97032
> Signed-off-by: Kenneth Graunke
Seems reasonable. Rb
On Jul 22, 2016 11:04 AM, "Kenneth Graunke" wrote:
> "flat centroid" and "flat sample" both just mean "flat", so we should
> ignore interpolateAtCentroid/Sample and just return the flat value.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97032
> Signed-off-by:
On Thu, Jul 21, 2016 at 10:48 AM, Vedran Miletić wrote:
> LLVM and Mesa both define the DEBUG macro in incompatible ways. As a
> general practice, we should avoid using such generic names when it is
> possible to do so.
>
> This patch renames all occurrences of the DEBUG macro to MESA_DEBUG,
> and
On Fri, Jul 22, 2016 at 11:04 AM, Kenneth Graunke wrote:
>
> One of the WebGL 2.0 conformance tests is trying to call
> glGenerateMipmaps with a width and height of 0. With the meta
> implementation, this generates a "framebuffer attachment incomplete"
> status, and falls back to the CPU path, ca
On Fri, Jul 22, 2016 at 2:01 PM, Rob Herring wrote:
> On Fri, Jul 22, 2016 at 11:46 AM, Ilia Mirkin wrote:
>> On Fri, Jul 22, 2016 at 12:22 PM, Rob Herring wrote:
>>> In order to prevent multiple pipe_screens being created in the same
>>> process, lookup of the DRM FD and reference counting of t
"flat centroid" and "flat sample" both just mean "flat", so we should
ignore interpolateAtCentroid/Sample and just return the flat value.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97032
Signed-off-by: Kenneth Graunke
---
src/compiler/nir/nir_lower_io.c | 4
1 file changed, 4 in
One of the WebGL 2.0 conformance tests is trying to call
glGenerateMipmaps with a width and height of 0. With the meta
implementation, this generates a "framebuffer attachment incomplete"
status, and falls back to the CPU path, calling MapTextureImage.
Except that there's no actual texture to map
On Fri, Jul 22, 2016 at 11:46 AM, Ilia Mirkin wrote:
> On Fri, Jul 22, 2016 at 12:22 PM, Rob Herring wrote:
>> In order to prevent multiple pipe_screens being created in the same
>> process, lookup of the DRM FD and reference counting of the pipe_screen
>> are needed. Several implementations of t
(2nd try. 1st email is being held due to size.)
On 21/07/16 18:48, Vedran Miletić wrote:
LLVM and Mesa both define the DEBUG macro in incompatible ways. As a
general practice, we should avoid using such generic names when it is
possible to do so.
This patch renames all occurrences of the DEBUG
On Fri, Jul 22, 2016 at 2:24 AM, Eric Engestrom
wrote:
> Fixes: 5ec140c17b54c2592009 ("mapi: Massage code to allow clang to compile.")
> Reported-by: Alexandre Demers
> Signed-off-by: Eric Engestrom
Doh!
Thanks. R-b and pushed.
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On Fri, Jul 22, 2016 at 12:22 PM, Rob Herring wrote:
> In order to prevent multiple pipe_screens being created in the same
> process, lookup of the DRM FD and reference counting of the pipe_screen
> are needed. Several implementations of this exist in various gallium
> drivers/winsys already. This
Use the common pipe_screen ref counting and fd hashing functions. The
mutex can be dropped as the pipe loader protects the create_screen()
calls.
Signed-off-by: Rob Herring
Cc: Alexandre Courbot
---
src/gallium/drivers/nouveau/nouveau_screen.c | 6 --
src/gallium/drivers/nouveau/nouveau_
Use the common pipe_screen ref counting and fd hashing functions. The
mutex can be dropped as the pipe loader protects the create_screen()
calls.
Signed-off-by: Rob Herring
Cc: "Marek Olšák"
Cc: Ilia Mirkin
---
src/gallium/drivers/r300/r300_screen.c| 3 -
src/gallium/drivers/r600/
Use the common pipe_screen ref counting and fd hashing functions for
vc4. This is necessary to only create a single pipe_screen for a
process and avoid multiple imports of same prime fd among other things
(probably).
Cc: Eric Anholt
Signed-off-by: Rob Herring
---
src/gallium/winsys/vc4/drm/vc4_
Use pipe_screen_unreference as it will call pipe_screen->destroy() when
the pipe_screen is no longer referenced.
The pipe_screen referencing is done within create_screen() functions
as drivers (like amdgpu) may have special needs for ref counting.
Signed-off-by: Rob Herring
Cc: Emil Velikov
---
In order to prevent multiple pipe_screens being created in the same
process, lookup of the DRM FD and reference counting of the pipe_screen
are needed. Several implementations of this exist in various gallium
drivers/winsys already. This creates a common version which is opt-in
for winsys implement
Use the common pipe_screen ref counting and fd hashing functions. The
mutex can be dropped as the pipe loader protects the create_screen()
calls.
Signed-off-by: Rob Herring
Cc: Dave Airlie
---
src/gallium/winsys/virgl/drm/virgl_drm_winsys.c | 88 +++--
1 file changed, 10 ins
Use the common pipe_screen ref count. amdgpu is unique in its hashing
the dev pointer rather than the fd, so the common fd hashing cannot be
used. However, the same reference count can be used instead of the
private one. The mutex can be dropped as the pipe loader protects the
create_screen() calls
Use the common pipe_screen ref counting and fd hashing functions. The
mutex can be dropped as the pipe loader protects the create_screen()
calls.
Signed-off-by: Rob Herring
Cc: Rob Clark
---
src/gallium/drivers/freedreno/freedreno_screen.c | 1 -
src/gallium/drivers/freedreno/freedreno_scree
In preparation to add reference counting of pipe_screen in the pipe-loader,
pipe_loader_release needs to destroy the pipe_screen instead of state
trackers.
Signed-off-by: Rob Herring
Cc: Emil Velikov
---
src/gallium/auxiliary/pipe-loader/pipe_loader.h | 1 +
src/gallium/auxiliary/pipe-loade
Creating a screen needs to be serialized in order to support reusing
existing screen. With this, driver private mutexes in create_screen()
functions can be removed.
Signed-off-by: Rob Herring
Cc: Emil Velikov
---
src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c | 5 +
1 file changed, 5 i
Use the common pipe_screen ref counting and fd hashing functions. The
mutex can be dropped as the pipe loader protects the create_screen()
calls.
Signed-off-by: Rob Herring
---
src/gallium/auxiliary/target-helpers/drm_helper.h | 2 +-
src/gallium/drivers/svga/svga_public.h| 2 +-
s
Another version of common pipe_screen reference counting. Please help
test on AMD and Nouveau as those are the more complicated ones and I
don't have h/w to test.
Changes in v4:
- Move fd dup() back into driver winsys create screen functions which
sometimes need the dup'ed fd before the pipe_
On Fri, Jul 22, 2016 at 4:39 AM, Vedran Miletić wrote:
> On 07/22/2016 03:37 AM, Rob Clark wrote:
>>
>> On Thu, Jul 21, 2016 at 9:35 PM, Rob Clark wrote:
>>>
>>> On Thu, Jul 21, 2016 at 1:48 PM, Vedran Miletić
>>> wrote:
LLVM and Mesa both define the DEBUG macro in incompatible ways. A
On 22/07/16 16:21, Emil Velikov wrote:
On 22 July 2016 at 09:42, Christian König wrote:
Am 22.07.2016 um 03:37 schrieb Rob Clark:
On Thu, Jul 21, 2016 at 9:35 PM, Rob Clark wrote:
On Thu, Jul 21, 2016 at 1:48 PM, Vedran Miletić
wrote:
LLVM and Mesa both define the DEBUG macro in incompa
There are a couple nits and suggestions for small follow-ups below.
With the couple nits (all in ast_to_hir.cpp) fixed, this patch is
Reviewed-by: Ian Romanick
On 07/08/2016 03:18 PM, Matt Turner wrote:
> I do appreciate the cleverness, but unfortunately it prevents a lot more
> cleverness in th
Ping. Also including Ian Romanick on the conversation, as right now the
main question is about the spec.
The thread is somewhat messy, so in order to be clear, this is the last
patch I sent to the list (and the one Im proposing):
https://patchwork.freedesktop.org/patch/98877/
On 18/07/16 14:44,
On 22 July 2016 at 09:42, Christian König wrote:
> Am 22.07.2016 um 03:37 schrieb Rob Clark:
>>
>> On Thu, Jul 21, 2016 at 9:35 PM, Rob Clark wrote:
>>>
>>> On Thu, Jul 21, 2016 at 1:48 PM, Vedran Miletić
>>> wrote:
LLVM and Mesa both define the DEBUG macro in incompatible ways. As a
>
Hi Christian,
A couple of small suggestions. Feel free to amend before pushing or
ignore if they're too picky.
On 22 July 2016 at 15:14, Christian König wrote:
> From: Boyuan Zhang
>
> Add function to copy from yv12 image to nv12 surface for VAAPI putimage call.
> We need this function in VaPu
On 18 July 2016 at 00:46, Eric Engestrom wrote:
> A few weeks ago, Jose Fonseca suggested [0] we use .editorconfig files
> to try and enforce the formatting of the code, to which Michel Dänzer
> suggested [1] we start by importing the existing .dir-locals.el
> settings.
>
> This is a first draft,
On Fri, Jul 22, 2016 at 1:11 AM, Pohjolainen, Topi <
topi.pohjolai...@intel.com> wrote:
> On Thu, Jul 21, 2016 at 09:21:53PM -0700, Jason Ekstrand wrote:
> > On i965, we can't support coordinate offsets for texelFetch or rectangle
> > textures. Previously, we were doing this with a GLSL pass but
On 07/22/2016 02:14 PM, Ilia Mirkin wrote:
You said earlier that pbo-readpixels-small worked with this patch on
Fermi :( Oh well.
It worked, but maybe an other issue has happened in the meantime :/
On Jul 22, 2016 5:39 AM, "Samuel Pitoiset" mailto:samuel.pitoi...@gmail.com>> wrote:
T
Zhang, Boyuan wrote:
Hi Andy,
I just submitted another patch set.
1. Fixed previously reported regression when using ffmpeg to encode.
2. Fixed I420 "width=720,height=480" garbage output issue.
Please give a try from your side.
Hi,
The width 720 is OK now. Colors are still wrong. It seems f
On Fri, 2016-07-22 at 06:07 +1000, Dave Airlie wrote:
> >
> > On Mon, 2016-07-18 at 16:39 +0300, Andres Gomez wrote:
> > > subroutine variables are to be used just in the way functions are
> > > called. Although the spec doesn't say it explicitely, this means that
> > > these variables are not to
From: Boyuan Zhang
Add environmental variable to disable interlace mode. At VAAPI decoding stage,
driver can not distinguish b/w pure decoding case and transcoding case. And
since interlace encoding is not supported, we have to disable interlace for
transcoding case. The temporary solution is
From: Boyuan Zhang
VAAPI passes PIPE_VIDEO_ENTRYPOINT_ENCODE as entry point for encoding case. We
will save this encode entry point in config. config_id was used as profile
previously. Now, config has both profile and entrypoint field, and config_id is
used to get the config object. Later on, we
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