Reviewed-by: Edward O'Callaghan
On 07/14/2016 08:17 PM, Vedran Miletić wrote:
> Signed-off-by: Vedran Miletić
> ---
> docs/xlibdriver.html| 2 +-
> src/gallium/docs/source/drivers/openswr/faq.rst | 4 ++--
> src/gallium/include/pipe/p_defines.h| 2 +-
> s
On Thursday 14 July 2016 15:41:51 Eric Engestrom wrote:
> On Thu, Jul 14, 2016 at 12:24:32PM +0200, Pali Rohár wrote:
> > Any news? Or possible fix?
>
> Have you tried Emil's suggestion, ie. upgrading to at least 0.8.0?
No, as I wrote that ubuntu precise for that build has only python-mako
in ver
On 14/07/16 18:34, Eric Engestrom wrote:
> On Thu, Jul 14, 2016 at 04:01:13PM +0100, Eric Engestrom wrote:
>> Oh right, there's already check for the Mako version, but the minimum is
>> currently set to 0.3.4 (configure.ac:92).
>>
>> Emil, you were the one to mention 0.8.0; is that the actual min
The old calculation, which used view->offset, encorporated buffer->offset
into the size calculation where it doesn't belong. This meant that, if
buffer->offset > buffer->size, you would always get a negative size. This
fixes 170 dEQP-VK.renderpass.attachment.* Vulkan CTS tests on Haswell.
Signed
This renames BLEND_STATE to BLEND_STATE_ENTRY and adds an new struct
BLEND_STATE which is just an array of 8 BLEND_STATE_ENTRYs. This will make
it much easier to write gen-agnostic blend handling code.
Signed-off-by: Jason Ekstrand
Cc: "12.0"
---
src/intel/genxml/gen6.xml| 8 +++-
We can totally do it, we were just only setting up one BLEND_STATE and, now
that the code is unified with gen8, we should be handling it correctly.
Signed-off-by: Jason Ekstrand
Cc: "12.0"
---
src/intel/vulkan/anv_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/
This fixes all 674 broken dEQP-VK.pipeline.blend Vulkan CTS tests on
Haswell.
Signed-off-by: Jason Ekstrand
Cc: "12.0"
---
src/intel/vulkan/gen7_pipeline.c | 75 +--
src/intel/vulkan/gen8_pipeline.c | 117 -
src/intel/vulkan/genX_pipeline_u
Vedran Miletić writes:
> On 07/13/2016 12:49 AM, Francisco Jerez wrote:
>> You can just replace the current implementation of tokenize(), it's not
>> used for anything else other than splitting compiler arguments AFAIK.
>>
>
> Done, patch incoming.
>
>>> Also, I would really like to progress on g
On Thu, Jul 14, 2016 at 2:26 PM, Chad Versace
wrote:
> On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > Reviewed-by: Topi Pohjolainen
> > ---
> > src/mesa/drivers/dri/i965/brw_blorp.c | 157
> ++
> > src/mesa/drivers/dri/i965/brw_blorp.h | 6 ++
> > 2 files change
On Thu, Jul 14, 2016 at 4:13 PM, Nanley Chery wrote:
> On Thu, Jul 14, 2016 at 03:57:09PM -0700, Jason Ekstrand wrote:
> > On Thu, Jul 14, 2016 at 3:45 PM, Nanley Chery
> wrote:
> >
> > > On Sat, Jul 09, 2016 at 12:17:28PM -0700, Jason Ekstrand wrote:
> > > > ---
> > > > src/intel/isl/isl.c
On Thu, Jul 14, 2016 at 03:57:09PM -0700, Jason Ekstrand wrote:
> On Thu, Jul 14, 2016 at 3:45 PM, Nanley Chery wrote:
>
> > On Sat, Jul 09, 2016 at 12:17:28PM -0700, Jason Ekstrand wrote:
> > > ---
> > > src/intel/isl/isl.c | 11 +++
> > > src/intel/isl/isl.h
On Thu, Jul 14, 2016 at 3:45 PM, Nanley Chery wrote:
> On Sat, Jul 09, 2016 at 12:17:28PM -0700, Jason Ekstrand wrote:
> > ---
> > src/intel/isl/isl.c | 11 +++
> > src/intel/isl/isl.h | 17 +
> > src/intel/isl/isl_format_layout.csv | 1 +
On Thu 14 Jul 2016, Jason Ekstrand wrote:
> On Thu, Jul 14, 2016 at 3:10 PM, Chad Versace
> wrote:
>
> > On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > > ---
> > > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 32
> >
> > > 1 file changed, 21 insertions(+), 11 deleti
On Sat, Jul 09, 2016 at 12:17:28PM -0700, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.c | 11 +++
> src/intel/isl/isl.h | 17 +
> src/intel/isl/isl_format_layout.csv | 1 +
> src/intel/isl/isl_gen6.c| 8
> src/intel
On Thu, Jul 14, 2016 at 3:10 PM, Chad Versace
wrote:
> On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > ---
> > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 32
>
> > 1 file changed, 21 insertions(+), 11 deletions(-)
> >
> > diff --git a/src/mesa/drivers/dri/i965/brw_
On Thu, Jul 14, 2016 at 3:41 PM, Chad Versace
wrote:
> On Thu 14 Jul 2016, Chad Versace wrote:
> > On Thu 14 Jul 2016, Chad Versace wrote:
> > > On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > > > Reviewed-by: Topi Pohjolainen
> > > > ---
> > > > src/mesa/drivers/dri/i965/brw_state.h|
On Thu 14 Jul 2016, Chad Versace wrote:
> On Thu 14 Jul 2016, Chad Versace wrote:
> > On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > > Reviewed-by: Topi Pohjolainen
> > > ---
> > > src/mesa/drivers/dri/i965/brw_state.h| 8 +++
> > > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 7
On Thu, Jul 14, 2016 at 2:58 PM, Chad Versace
wrote:
> On Thu 14 Jul 2016, Chad Versace wrote:
> > On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > > Reviewed-by: Topi Pohjolainen
> > > ---
> > > src/mesa/drivers/dri/i965/brw_state.h| 8 +++
> > > src/mesa/drivers/dri/i965/brw_wm_surf
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> We're about to add generic versions which work across gens and those should
> have the brw name.
>
> Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 22 +++---
> 1 file changed, 11 insertions(+),
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> ---
> src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 32
>
> 1 file changed, 21 insertions(+), 11 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> b/src/mesa/drivers/dri/i965/brw_wm_surface_
Reviewed-by: Marek Olšák
Marek
On Thu, Jul 14, 2016 at 9:08 PM, Rob Clark wrote:
> Adds a second optional cleanup callback, called after the fence is
> signaled. This is needed if, for example, the queue has the last
> reference to the object that embeds the util_queue_fence. In this
> case w
Reviewed-by: Marek Olšák
Marek
On Thu, Jul 14, 2016 at 10:43 PM, Rob Clark wrote:
> On Thu, Jul 14, 2016 at 4:41 PM, Gustaw Smolarczyk
> wrote:
>> 2016-07-14 22:14 GMT+02:00 Rob Clark :
>>> In d035d50 this changed to 64b.. which I'm pretty sure was
>>> unintentional. Revert it back to 32b so
On 07/13/2016 03:57 PM, Brian Paul wrote:
When we call ctx->Driver.TestProxyTexImage() we want to have the
texture object's Immutable and NumLevels fields initialized so that
the function doesn't have to guess about the number of mipmap levels.
But since the proxy textures are shared by the old
On Thu 14 Jul 2016, Chad Versace wrote:
> On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > Reviewed-by: Topi Pohjolainen
> > ---
> > src/mesa/drivers/dri/i965/brw_state.h| 8 +++
> > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 79
> >
> > 2 files changed
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/brw_state.h| 8 +++
> src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 79
>
> 2 files changed, 87 insertions(+)
>
> diff --git a/src/mesa/drivers/
On Thu 14 Jul 2016, Jason Ekstrand wrote:
> On Thu, Jul 14, 2016 at 1:54 PM, Chad Versace
> wrote:
>
> > On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > > Reviewed-by: Topi Pohjolainen
> > > ---
> > > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 120
> > ++
> > > src/me
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/brw_blorp.c | 157
> ++
> src/mesa/drivers/dri/i965/brw_blorp.h | 6 ++
> 2 files changed, 163 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/b
Rate control method is passed from app to driver through config attrib list.
That is why we need to store this rate control method to config. And later on,
we will pass this value to context->desc.h264enc.rate_ctrl.rate_ctrl_method.
Signed-off-by: Boyuan Zhang
---
src/gallium/state_trackers/va
On Thu, Jul 14, 2016 at 1:54 PM, Chad Versace
wrote:
> On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > Reviewed-by: Topi Pohjolainen
> > ---
> > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 120
> ++
> > src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 5 ++
> > 2 file
Fixed both subject and coding style in newly submitted patch set.
Regards,
Boyuan
-Original Message-
From: Christian König [mailto:deathsim...@vodafone.de]
Sent: July-14-16 3:56 AM
To: Zhang, Boyuan; mesa-dev@lists.freedesktop.org
Subject: Re: [PATCH 06/11] st/va: add copy function for y
Thanks for the suggestion Emil. I modified each un-submitted patch based on the
article you provided. Please see the newly submitted patch set.
Regards,
Boyuan
-Original Message-
From: Emil Velikov [mailto:emil.l.veli...@gmail.com]
Sent: July-14-16 1:07 PM
To: Zhang, Boyuan
Cc: Christia
Add some hardcoded values hardware needs mainly for rate control purpose. With
previously hardcoded values for OMX, the rate control result is not correct.
This change fixed the rate control result by setting correct values for Vaapi.
Signed-off-by: Boyuan Zhang
---
src/gallium/state_trackers/
Add function to copy from yv12 image to nv12 surface for VAAPI putimage call.
We need this function in VaPutImage call where copying from yv12 image to nv12
surface for encoding. Existing function can't be used because it only work for
copying from yv12 surface to nv12 image in Vaapi.
Signed-of
Add entrypoint to distinguish H.264 decode and encode. For example, in patch
5/11 when is calling "VaCreateContext", "pps" and "sps" shouldn't be allocated
for H.264 encoding. So we need to use the entry_point to determine this is
H.264 decode or H.264 encode. We can use config to determine the
Enable H.264 VAAPI encoding through config. Currently only H.264 baseline is
supported.
Signed-off-by: Boyuan Zhang
---
src/gallium/state_trackers/va/config.c | 32 ++--
1 file changed, 22 insertions(+), 10 deletions(-)
diff --git a/src/gallium/state_trackers/va/con
Add necessary functions/changes for VAAPI encoding to buffer and picture. These
changes will allow driver to handle all Vaapi encode related operations. This
patch doesn't change the Vaapi decode behaviour.
Signed-off-by: Boyuan Zhang
---
src/gallium/state_trackers/va/buffer.c | 6 ++
sr
For putimage call, if image format is yv12 (or IYUV with U V field swap) and
surface format is nv12, then we need to convert yv12 to nv12 and then copy the
converted data from image to surface. We can't use the existing logic where
surface is destroyed and re-created with yv12 format.
Signed-of
VAAPI passes PIPE_VIDEO_ENTRYPOINT_ENCODE as entry point for encoding case. We
will save this encode entry point in config. config_id was used as profile
previously. Now, config has both profile and entrypoint field, and config_id is
used to get the config object. Later on, we pass this entrypoi
Hi guys,
I have tried to implement a simple lanczos filter
but I am getting line artifacts in the output.
I was not able to spot the error even after going over
the code many times. Please have a look at code and
suggest changes.
Thanks,
Nayan.
Nayan Deshmukh (2):
vl: add a lanczos interpolat
Signed-off-by: Nayan Deshmukh
---
src/gallium/auxiliary/Makefile.sources | 2 +
src/gallium/auxiliary/vl/vl_lanczos_filter.c | 436 +++
src/gallium/auxiliary/vl/vl_lanczos_filter.h | 63
3 files changed, 501 insertions(+)
create mode 100755 src/gallium/auxil
HIGH_QUALITY_SCALING_L2 to HIGH_QUALTIY_SCALING_L9
uses lanczos filter with number representing the size
of the sinc window.
Signed-off-by: Nayan Deshmukh
---
src/gallium/state_trackers/vdpau/mixer.c | 150 ++-
src/gallium/state_trackers/vdpau/query.c | 8 ++
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 120
> ++
> src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 5 ++
> 2 files changed, 125 insertions(+)
>
> diff --git a/src/mesa/drivers/dr
On Thu 14 Jul 2016, Jason Ekstrand wrote:
> On Thu, Jul 14, 2016 at 11:56 AM, Jason Ekstrand
> wrote:
>
> >
> >
> > On Thu, Jul 14, 2016 at 11:42 AM, Chad Versace
> > wrote:
> >
> >> On Wed 13 Jul 2016, Jason Ekstrand wrote:
> >> > Reviewed-by: Topi Pohjolainen
> >> > ---
> >> > src/mesa/drive
On Thu 14 Jul 2016, Jason Ekstrand wrote:
> On Thu, Jul 14, 2016 at 11:42 AM, Chad Versace
> wrote:
>
> > On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > > Reviewed-by: Topi Pohjolainen
> > > ---
> > > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 175
> > +-
> > > src/m
On Thu, Jul 14, 2016 at 11:56 AM, Jason Ekstrand
wrote:
>
>
> On Thu, Jul 14, 2016 at 11:42 AM, Chad Versace
> wrote:
>
>> On Wed 13 Jul 2016, Jason Ekstrand wrote:
>> > Reviewed-by: Topi Pohjolainen
>> > ---
>> > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 175
>> +
On Thu, Jul 14, 2016 at 4:41 PM, Gustaw Smolarczyk wrote:
> 2016-07-14 22:14 GMT+02:00 Rob Clark :
>> In d035d50 this changed to 64b.. which I'm pretty sure was
>> unintentional. Revert it back to 32b so the entire state struct
>> is a nice round 64b (cache-line size).
> Actually, cache line size
On 07/07/2016 07:11 PM, Miklós Máté wrote:
On 06/26/2016 09:48 PM, Miklós Máté wrote:
Only include the ones that can be used by the shader.
This fixes texture coordinates, which were completely wrong,
because WPOS was included in the list of attribs. It also
increases performance noticeably.
S
2016-07-14 22:14 GMT+02:00 Rob Clark :
> In d035d50 this changed to 64b.. which I'm pretty sure was
> unintentional. Revert it back to 32b so the entire state struct
> is a nice round 64b (cache-line size).
Actually, cache line size, at least on most x86 and ARM processors, is
64B (bytes) not 64b
In d035d50 this changed to 64b.. which I'm pretty sure was
unintentional. Revert it back to 32b so the entire state struct
is a nice round 64b (cache-line size).
(Note sure that it would actually be measurable, but I did notice
that check_state() was hot in some benchmarks.)
Signed-off-by: Rob C
I gave a few trivial comments. Series is
Reviewed-by: Jason Ekstrand
On Thu, Jul 14, 2016 at 10:49 AM, Kenneth Graunke
wrote:
> Signed-off-by: Kenneth Graunke
> ---
> src/compiler/nir/nir_intrinsics.h | 16 +---
> 1 file changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/
On Thu, Jul 14, 2016 at 10:49 AM, Kenneth Graunke
wrote:
> The original function was becoming a bit hard to read, with the details
> of creating and filling out load/store/atomic atomics all in one
> function.
>
> This patch makes helpers for creating each type of intrinsic, and also
> combines t
On Thu, Jul 14, 2016 at 10:49 AM, Kenneth Graunke
wrote:
> Both loads and atomics had identical code to rewrite destinations,
> and all cases had the same two lines to replace instructions.
>
> Signed-off-by: Kenneth Graunke
> ---
> src/compiler/nir/nir_lower_io.c | 44
> ++-
On Thu, Jul 14, 2016 at 10:49 AM, Kenneth Graunke
wrote:
> Less typing and word wrapping issues than intrin->variables[0]->var.
>
> Signed-off-by: Kenneth Graunke
> ---
> src/compiler/nir/nir_lower_io.c | 28
> 1 file changed, 12 insertions(+), 16 deletions(-)
>
> d
Alejandro Piñeiro writes:
> Without this commit, a image is considered valid if the level of the
> texture bound to the image is complete, something we can check as mesa
> save independently if it is "base incomplete" of "mipmap incomplete".
>
> But, from the OpenGL 4.3 Core Specification, sectio
Adds a second optional cleanup callback, called after the fence is
signaled. This is needed if, for example, the queue has the last
reference to the object that embeds the util_queue_fence. In this
case we cannot drop the ref in the main callback, since that would
result in the fence being destro
On Thu, Jul 14, 2016 at 11:30 AM, Nanley Chery wrote:
> On Thu, Jul 14, 2016 at 11:12:45AM -0700, Anuj Phogat wrote:
>> V2: Drop the changes to gl.xml.
>>
>> Signed-off-by: Anuj Phogat
>> ---
>> src/mesa/main/extensions_table.h | 1 +
>> src/mesa/main/mtypes.h | 1 +
>> src/mesa/main/t
On Thu, Jul 14, 2016 at 11:42 AM, Chad Versace
wrote:
> On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > Reviewed-by: Topi Pohjolainen
> > ---
> > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 175
> +-
> > src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 6 +
> > 2 file
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 175
> +-
> src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 6 +
> 2 files changed, 179 insertions(+), 2 deletions(-)
>
> diff --git a/src/
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 24
> src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 4
> 2 files changed, 28 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965
On Thu, Jul 14, 2016 at 11:12:45AM -0700, Anuj Phogat wrote:
> V2: Drop the changes to gl.xml.
>
> Signed-off-by: Anuj Phogat
> ---
> src/mesa/main/extensions_table.h | 1 +
> src/mesa/main/mtypes.h | 1 +
> src/mesa/main/teximage.c | 5 +++--
> 3 files changed, 5 insertions(+)
Few files were missing the copyright headers. This patch adds correct
copyright headers according to the commit author and date.
Signed-off-by: Vedran Miletić
---
src/gallium/state_trackers/nine/nine_dump.c | 21 +
src/gallium/state_trackers/nine/nine_dump.h | 21 ++
V2: Drop the changes to gl.xml.
Signed-off-by: Anuj Phogat
---
src/mesa/main/extensions_table.h | 1 +
src/mesa/main/mtypes.h | 1 +
src/mesa/main/teximage.c | 5 +++--
3 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/mesa/main/extensions_table.h b/src/mesa/ma
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> ---
> src/mesa/drivers/dri/i965/brw_context.c | 2 ++
> src/mesa/drivers/dri/i965/brw_context.h | 4
> 2 files changed, 6 insertions(+)
Reviewed-by: Chad Versace
___
mesa-dev mailing list
mesa-dev@lists.
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.c | 7 +--
> 1 file changed, 5 insertions(+), 2 deletions(-)
Reviewed-by: Chad Versace
___
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mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailma
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.c | 7 +--
> 1 file changed, 5 insertions(+), 2 deletions(-)
Reviewed-by: Chad Versace
___
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https://lists.freedesktop.org/mailm
On Thu 14 Jul 2016, Pohjolainen, Topi wrote:
>
> Subject says: "isl/state: Divide the aux qpitch by 2". Should be
> divide by 4 or shift by 2.
>
> Otherwise:
>
> Reviewed-by: Topi Pohjolainen
Ditto. Fix that and
Reviewed-by: Chad Versace
___
mesa-d
On Thu, Jul 07, 2016 at 07:34:26PM -0700, Anuj Phogat wrote:
> Signed-off-by: Anuj Phogat
> ---
Patches 2 and 3 are:
Reviewed-by: Nanley Chery
> docs/GL3.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/docs/GL3.txt b/docs/GL3.txt
> index ce34869..883604a 100644
> --- a/docs/GL3.t
On Thu, Jul 07, 2016 at 07:34:24PM -0700, Anuj Phogat wrote:
> Signed-off-by: Anuj Phogat
> ---
> src/mapi/glapi/registry/gl.xml | 1 +
> src/mesa/main/extensions_table.h | 1 +
> src/mesa/main/mtypes.h | 1 +
> src/mesa/main/teximage.c | 5 +++--
> 4 files changed, 6 insertio
Without this commit, a image is considered valid if the level of the
texture bound to the image is complete, something we can check as mesa
save independently if it is "base incomplete" of "mipmap incomplete".
But, from the OpenGL 4.3 Core Specification, section 8.25 ("Texture
Image Loads and Stor
Signed-off-by: Kenneth Graunke
---
src/compiler/nir/nir_intrinsics.h | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/src/compiler/nir/nir_intrinsics.h
b/src/compiler/nir/nir_intrinsics.h
index ccca1ff..2f74555 100644
--- a/src/compiler/nir/nir_intrinsics.h
++
The load/store/atomic cases all duplicated the get_io_offset code, with
a few tiny differences: stores didn't bother checking for per-vertex
inputs, because they can't be stored to, and atomics didn't check at
all, since shared variables aren't per-vertex.
However, it's harmless to check, and allo
The original function was becoming a bit hard to read, with the details
of creating and filling out load/store/atomic atomics all in one
function.
This patch makes helpers for creating each type of intrinsic, and also
combines them with the *_op() helpers, as they're closely coupled and
not too la
This can't happen, the caller asserts that mode is shader_out or shared.
Signed-off-by: Kenneth Graunke
---
src/compiler/nir/nir_lower_io.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/compiler/nir/nir_lower_io.c b/src/compiler/nir/nir_lower_io.c
index 3a8587a..914e0e1 100644
--- a/src
Less typing and word wrapping issues than intrin->variables[0]->var.
Signed-off-by: Kenneth Graunke
---
src/compiler/nir/nir_lower_io.c | 28
1 file changed, 12 insertions(+), 16 deletions(-)
diff --git a/src/compiler/nir/nir_lower_io.c b/src/compiler/nir/nir_lower_
Both loads and atomics had identical code to rewrite destinations,
and all cases had the same two lines to replace instructions.
Signed-off-by: Kenneth Graunke
---
src/compiler/nir/nir_lower_io.c | 44 ++---
1 file changed, 19 insertions(+), 25 deletions(-)
d
On Thursday, July 14, 2016 8:23:23 AM PDT Matt Turner wrote:
> On Thu, Jul 14, 2016 at 12:57 AM, Kenneth Graunke
> wrote:
> > Rather than computing the barycentric mode each time we emit a LINTERP,
> > we can simply compute it once, as soon as we know we're doing non-flat
> > interpolation.
> >
>
R-B
On Thu, Jul 14, 2016 at 8:02 AM, Nanley Chery wrote:
> On Fri, Jul 01, 2016 at 02:29:25PM -0700, Jason Ekstrand wrote:
> > seems fine to me
> >
>
> Should I use the Acked-by tag for this patch? Or push without a reviewer
> tag?
>
> Thanks,
> Nanley
>
> > On Fri, Jul 1, 2016 at 2:25 PM, Chad
On Thu, Jul 14, 2016 at 6:59 AM, Iago Toral wrote:
> Both patches are:
> Reviewed-by: Iago Toral Quiroga
>
Thanks!
>
> On Wed, 2016-07-13 at 14:28 -0700, Jason Ekstrand wrote:
> > It was returning true if the function types have different lengths
> > rather
> > than false. This was new with
rb
On Thu, Jul 14, 2016 at 8:32 AM, Nanley Chery wrote:
> If an internal user creates an image with Vulkan tiling
> VK_IMAGE_TILING_OPTIMAL
> and an ISL tiling that isn't set, ISL will fail to create the image as
> anv_image_create_info::isl_tiling_flags will be an invalid value.
>
> Correct thi
Likewise, rename the enum type to glsl_interp_mode.
Beyond the GLSL front-end, talking about "interpolation modes" seems
more natural than "interpolation qualifiers" - in the IR, we're removed
from how exactly the source language specifies how to interpolate an
input. Also, SPIR-V calls these "de
On 14 July 2016 at 16:06, Zhang, Boyuan wrote:
> For example, in patch 5/11 when " VaCreateContext", we used to CALLOC_STRUCT
> for "pps" and "sps" whenever we see video format is H.264. This is fine for
> decode ONLY case. Now, since we added H.264 encoding, "pps" and "sps"
> shouldn't be allo
My point is ... any stepping you can do with softpipe/llvmpipe, you
can also do with an NVIDIA G80+ GPU. The trick is in coming up with an
interface to expose the debugging capability in a useful manner.
An application might do any number of draws, each of which might
generate any number of primit
If you have an Nvidia card and are using a sufficiently new version of opengl
you can debug shaders in Visual Studio, but those are some significant
limitations. It would also be nice to have a reference driver to help
distinguish buggy driver behavior.
From: ibm
Note that various GPUs (definitely NVIDIA ones, but I think others
too) also include instruction stepping/breakpoints/etc functionality.
However it's never been clear to me how that sort of thing could be
effectively exposed to userspace.
-ilia
On Thu, Jul 14, 2016 at 12:29 PM, Rob Conde wrot
On Thu, Jul 14, 2016 at 04:01:13PM +0100, Eric Engestrom wrote:
> Oh right, there's already check for the Mako version, but the minimum is
> currently set to 0.3.4 (configure.ac:92).
>
> Emil, you were the one to mention 0.8.0; is that the actual minimum, or
> just a known working version?
OK, so
I'll take a look at that. The idea would be to be able to step through a shader
and watch values etc.
Rob
From: Roland Scheidegger
Sent: Thursday, July 14, 2016 12:26:58 PM
To: Rob Conde; mesa-dev@lists.freedesktop.org
Subject: Re: [Mesa-dev] GLSL Debugging
Am
Am 14.07.2016 um 15:25 schrieb Rob Conde:
> Hello,
>
>It occurred to me that the llvmpipe might be a good basis for a GLSL
> debugger. Has anyone thought about this and how it might be approached?
>
>
> Rob Conde
I'm not entirely sure what exactly you want to debug, but if you just
want to
On 14 July 2016 at 15:23, Eric Engestrom wrote:
> On Thu, Jul 14, 2016 at 03:21:20PM +0200, Stefan Dirsch wrote:
>> This 'last' variable used in FindGLXFunction(...) may become negative,
>> but has been defined as unsigned int resulting in an overflow,
>> finally resulting in a segfault when acces
Hello,
It occurred to me that the llvmpipe might be a good basis for a GLSL
debugger. Has anyone thought about this and how it might be approached?
Rob Conde
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On 14 July 2016 at 04:11, Tomasz Figa wrote:
> Hi Emil,
>
> On Thu, Jul 14, 2016 at 1:28 AM, Emil Velikov
> wrote:
>> On 13 July 2016 at 04:29, Nicolas Boichat wrote:
>>> From: Tomasz Figa
>>>
>>> An earlier patch fixed the problem for classic drivers, however Gallium
>>> was still left broken
On 14 July 2016 at 15:41, Eric Engestrom wrote:
> On Thu, Jul 14, 2016 at 12:24:32PM +0200, Pali Rohár wrote:
>> Any news? Or possible fix?
>
> Have you tried Emil's suggestion, ie. upgrading to at least 0.8.0?
>
Other than this, I'm out of ideas. My python/mako isn't that great.
> Build system w
If an internal user creates an image with Vulkan tiling VK_IMAGE_TILING_OPTIMAL
and an ISL tiling that isn't set, ISL will fail to create the image as
anv_image_create_info::isl_tiling_flags will be an invalid value.
Correct this by making anv_image_create_info::isl_tiling_flags an opt-in,
filteri
On Thu, Jul 14, 2016 at 12:57 AM, Kenneth Graunke wrote:
> Rather than computing the barycentric mode each time we emit a LINTERP,
> we can simply compute it once, as soon as we know we're doing non-flat
> interpolation.
>
> At that point, emit_linterp() doesn't do much, so fold it into the
> call
For example, in patch 5/11 when " VaCreateContext", we used to CALLOC_STRUCT
for "pps" and "sps" whenever we see video format is H.264. This is fine for
decode ONLY case. Now, since we added H.264 encoding, "pps" and "sps" shouldn't
be allocated. So we need to use the entry_point to determine th
Inspired by fix for mem leak of vdpau interop, resource_from_handle
set texture reference count, that need to be decreased and released,
recall there is a similar case for DRI3, that is with VA-API glx
extension, there is temporary TFP(texture from pixmap), we target it
through dma-buf. leak happen
On Fri, Jul 01, 2016 at 02:29:25PM -0700, Jason Ekstrand wrote:
> seems fine to me
>
Should I use the Acked-by tag for this patch? Or push without a reviewer
tag?
Thanks,
Nanley
> On Fri, Jul 1, 2016 at 2:25 PM, Chad Versace wrote:
>
> > On Mon 27 Jun 2016, Nanley Chery wrote:
> > > In the ne
On Thu, Jul 14, 2016 at 10:51:43AM -0400, Rob Clark wrote:
> On Thu, Jul 14, 2016 at 10:41 AM, Eric Engestrom
> wrote:
> > On Thu, Jul 14, 2016 at 12:24:32PM +0200, Pali Rohár wrote:
> >> Any news? Or possible fix?
> >
> > Have you tried Emil's suggestion, ie. upgrading to at least 0.8.0?
> >
> >
On Thu, Jul 14, 2016 at 10:41 AM, Eric Engestrom
wrote:
> On Thu, Jul 14, 2016 at 12:24:32PM +0200, Pali Rohár wrote:
>> Any news? Or possible fix?
>
> Have you tried Emil's suggestion, ie. upgrading to at least 0.8.0?
>
> Build system wizards:
> Any way to check the version and abort the compilat
From: Nicolai Hähnle
According to firmware guys, the new sequence that we added for Polaris should
work on all CIK parts, and should actually be faster on some parts.
---
src/gallium/drivers/radeonsi/si_debug.c | 5 -
src/gallium/drivers/radeonsi/si_state_draw.c | 7 +--
src/gallium
On Thu, Jul 14, 2016 at 12:24:32PM +0200, Pali Rohár wrote:
> Any news? Or possible fix?
Have you tried Emil's suggestion, ie. upgrading to at least 0.8.0?
Build system wizards:
Any way to check the version and abort the compilation before running
into this issue? If it helps, this prints the ve
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