-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
On 12/03/16 17:26, Connor Abbott wrote:
> On Fri, Mar 11, 2016 at 2:33 AM, Samuel Iglesias Gonsálvez
> wrote:
>
>
> On 11/03/16 01:08, Jason Ekstrand wrote:
On Thu, Mar 10, 2016 at 4:00 PM, Connor Abbott
wrote:
> On Mon, M
Fixes building with debug enabled on musl systems.
---
configure.ac| 1 +
src/gallium/auxiliary/util/u_debug_symbol.c | 4 ++--
src/mapi/glapi/gen/gl_gentable.py | 2 +-
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/configure.ac b/configur
We are seeking nominations for candidates for election to the X.Org
Foundation Board of Directors. All X.Org Foundation members are
eligible for election to the board.
Nominations for the 2016 election are now open and will remain open
until 23:59 UTC on 15 March 2016.
The Board consists of dir
On Sun, Mar 13, 2016 at 8:47 PM, Francisco Jerez wrote:
> This could be improved somewhat with additional validation of the
> calculated live in/out sets and by checking that the calculated live
> intervals are minimal (which isn't strictly necessary to guarantee the
> correctness of the program).
On Sun, Mar 13, 2016 at 8:47 PM, Francisco Jerez wrote:
> This could be improved somewhat with additional validation of the
> calculated live in/out sets and by checking that the calculated live
> intervals are minimal (which isn't strictly necessary to guarantee the
> correctness of the program).
1-4 are
Reviewed-by: Matt Turner
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
It makes sense to keep the result of analysis passes independent from
the IR itself. Instead of representing the idom tree as a pointer in
each basic block pointing to its immediate dominator, the whole
dominator tree is represented separately from the IR as an array of
pointers inside the idom_tr
I've deliberately separated this from the general analysis pass
infrastructure in order to discuss it independently. The dependency
classes defined here refer to state changes of several objects of the
program IR, and are fully orthogonal and expected to change less often
than the set of analysis
This only does half of the work. The actual representation of the
idom tree is left untouched, but the computation algorithm is moved
into a separate analysis result class wrapped in a BRW_ANALYSIS
object, along with the intersect() and dump_domtree() auxiliary
functions in order to keep things ti
This defines a new BRW_ANALYSIS object which wraps the register
pressure computation code along with its result. For the rationale
see the previous commits converting the liveness and dominance
analysis passes to the IR analysis framework.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 27 +++
This moves the following methods that are currently defined in
fs_visitor (even though they are side products of the liveness
analysis computation) and are already implemented in
brw_fs_live_variables.cpp:
> bool virtual_grf_interferes(int a, int b) const;
> int *virtual_grf_start;
> int *virtual_
---
src/mesa/drivers/dri/i965/brw_fs.h| 1 -
src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp | 8
src/mesa/drivers/dri/i965/brw_shader.cpp | 2 --
src/mesa/drivers/dri/i965/brw_shader.h| 1 -
src/mesa/drivers/dri/i965/brw_vec4.h
And mark the variable declaration as const.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 6de47fa..e8fad87 100644
--- a/src/mesa/drivers/dri/i965/b
Trivial, just use a few less tokens to do the same thing.
---
src/mesa/drivers/dri/i965/brw_cfg.cpp | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_cfg.cpp
b/src/mesa/drivers/dri/i965/brw_cfg.cpp
index f951f44..8701d16 100644
--- a/src/mesa
This could be improved somewhat with additional validation of the
calculated live in/out sets and by checking that the calculated live
intervals are minimal (which isn't strictly necessary to guarantee the
correctness of the program). This should be good enough though to
catch accidental use of st
The purpose of this series is to introduce some lightweight
infrastructure intended to make room for additional analysis passes in
the i965 back-end without increasing the clutter of the visitor
objects, to reduce duplication of logic between analysis passes, and
to prevent some mistakes that are f
The IR analysis framework requires the analysis result to be
constructible with a single argument.
---
src/mesa/drivers/dri/i965/brw_vec4_live_variables.cpp | 7 +++
src/mesa/drivers/dri/i965/brw_vec4_live_variables.h | 4 +++-
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/s
---
src/mesa/drivers/dri/i965/brw_fs_live_variables.h | 5 +
src/mesa/drivers/dri/i965/brw_vec4_live_variables.h | 5 +
2 files changed, 10 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_live_variables.h
b/src/mesa/drivers/dri/i965/brw_fs_live_variables.h
index 882315a..a5
Have fun reading through the whole back-end optimizer to verify
whether I've missed any dependency flags -- Or alternatively, just
trust that any mistake here will trigger an assertion failure during
analysis pass validation if it ever poses a problem for the
consistency of any of the analysis pass
The invalidate_analysis() method knows what analysis passes there are
in the back-end and calls their invalidate() method to report changes
in the IR. For the moment it just calls invalidate_live_intervals()
(which will eventually be fully replaced by this function) if anything
changed.
This make
This involves wrapping vec4_live_variables in a BRW_ANALYSIS object
and hooking it up to invalidate_analysis() so it's properly
invalidated. Seems like a lot of churn but it's fairly
straightforward. The vec4_visitor invalidate_ and
calculate_live_intervals() methods are no longer necessary after
Should have no functional change. The IP value of an instruction that
reads src_var cannot possibly be after the end of the live interval of
the variable it's reading from, by the definition of live interval.
Might save future readers a momentary WTF while trying to understand
this code.
---
src/
brw_fs.h (in particular fs_visitor) is logically a user of the live
variables analysis pass, not the other way around.
brw_fs_live_variables.h requires the definition of some FS IR data
structures to compile, but those can be obtained directly from
brw_ir_fs.h without including brw_fs.h. The depen
Bug found by the liveness analysis validation pass that will be
introduced in a later commit. The no-op MOV check in
opt_register_coalesce() was removing instructions which makes the
cached liveness analysis calculation inconsistent with the shader IR.
We were failing to set progress to true in th
This involves wrapping fs_live_variables in a BRW_ANALYSIS object and
hooking it up to invalidate_analysis() so it's properly invalidated.
Seems like a lot of churn but it's fairly straightforward. The
fs_visitor invalidate_ and calculate_live_intervals() methods are no
longer necessary after this
This makes the structure of the vec4 live intervals calculation more
similar to the FS back-end liveness analysis code. The non-CF-aware
start/end computation is moved into the same pass that calculates the
block-local def/use sets, which saves quite a bit of code, while the
CF-aware start/end com
This could be improved somewhat with additional validation of the
calculated live in/out sets and by checking that the calculated live
intervals are minimal (which isn't strictly necessary to guarantee the
correctness of the program). This should be good enough though to
catch accidental use of st
This moves the following methods that are currently defined in
vec4_visitor (even though they are side products of the liveness
analysis computation) and are already implemented in
brw_vec4_live_variables.cpp:
> int var_range_start(unsigned v, unsigned n) const;
> int var_range_end(unsigned v, uns
brw_vec4.h (in particular vec4_visitor) is logically a user of the
live variables analysis pass, not the other way around.
brw_vec4_live_variables.h requires the definition of some VEC4 IR data
structures to compile, but those can be obtained directly from
brw_ir_vec4.h without including brw_vec4.h
Bug found by the liveness analysis validation pass that will be
introduced in a later commit. fixup_3src_null_dest() was allocating
registers which makes the cached liveness analysis calculation
incomplete, so it must be invalidated.
Cc: mesa-sta...@lists.freedesktop.org
---
src/mesa/drivers/dri
---
src/mesa/drivers/dri/i965/brw_fs.h| 2 +-
src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp | 4 ++--
src/mesa/drivers/dri/i965/brw_fs_live_variables.h | 2 +-
src/mesa/drivers/dri/i965/brw_vec4.h | 2 +-
src/mesa/drivers/dri/i965/brw_vec4_live_vari
This reflects the natural dependency relationship between brw_cfg.h
and brw_shader.h. brw_cfg.h only requires the base IR definitions
which are now part of a separate header.
---
src/mesa/drivers/dri/i965/brw_cfg.cpp | 1 +
src/mesa/drivers/dri/i965/brw_cfg.h| 5 +++--
These two structures have exactly the same name which prevents the two
files from being included at the same time and could cause serious
trouble in the future if it ever leads to a (silent) violation of the
C++ one definition rule.
---
src/mesa/drivers/dri/i965/brw_fs_live_variables.h | 52 +
This removes the dependency of fs_live_variables on fs_visitor. The
IR analysis framework requires the analysis result to be constructible
with a single argument -- The second argument was redundant anyway.
---
src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp | 12 ++--
src/mesa/driver
Motivated in detail in the source code. The only piece missing here
from the analysis pass infrastructure is some sort of mechanism to
broadcast changes in the IR to all existing analysis passes, which
will be addressed by a future commit. The analysis_dependency_class
enum might seem a bit silly
This pulls out the i965 IR definitions into a separate file and leaves
the top-level backend_shader structure and back-end compiler entry
points in brw_shader.h. The purpose is to keep things tidy and
prevent a nasty circular dependency between brw_cfg.h and
brw_shader.h. The logical dependency b
Bug found by the liveness analysis validation pass that will be
introduced in a later commit. opt_sampler_eot() was allocating
registers and inserting and removing instructions, which makes the
cached liveness analysis calculation inconsistent with the shader IR,
so it must be invalidated.
Cc: me
On Thursday, March 10, 2016 6:26:43 PM PDT Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> The enums MAX_COMBINED_IMAGE_UNITS_AND_FRAGMENT_OUTPUTS and
> MAX_COMBINED_SHADER_OUTPUT_RESOURCES are equal and should therefore only
> appear once.
>
> Noticed while implementing ARB_shader_image_load_s
2016-03-11 11:50 GMT+08:00 Jan Vesely :
> On Fri, 2016-03-11 at 10:09 +0800, Chih-Wei Huang wrote:
>> cc1: some warnings being treated as errors
>>
>>
>> But I'm still not sure whether if it should be fixed on the mesa
>> side.
>>
>> So my question is, what kind of fix do we want (i.e., acceptable
On 13 March 2016 at 17:09, Varad Gautam wrote:
> - Do not reorder instructions reading packed sources (fixes piglit
> regressions with draw-vertices and draw-vertices-user).
> ---
> Eric, Rhys, with this bit we should be good to go.
>
> src/gallium/drivers/vc4/vc4_opt_vpm.c | 3 ++-
> 1 file cha
Ian Romanick writes:
> On 03/11/2016 03:46 PM, Eric Anholt wrote:
>> Ian Romanick writes:
>>
>>> On 03/10/2016 05:53 PM, Francisco Jerez wrote:
Iago Toral writes:
> On Wed, 2016-03-09 at 19:04 -0800, Francisco Jerez wrote:
>> Matt Turner writes:
>>
>>> On Wed, Mar 9,
We want to use interface_type, not vtn_var->type. They're normally
equivalent, but for geometry/tessellation per-vertex interface arrays,
we need to unwrap a level.
Otherwise, we tried to iterate a structure members but instead used
an array length. If the array length was longer than the number
Reviewed-by: Edward O'Callaghan
On 2016-03-14 03:46, Marek Olšák wrote:
From: Marek Olšák
---
configure.ac | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure.ac b/configure.ac
index 49be147..d768db6 100644
--- a/configure.ac
+++ b/configure.ac
@@ -70,7 +70,7 @@ AC_
Hi Marek,
On 13 March 2016 at 16:46, Marek Olšák wrote:
> From: Marek Olšák
>
The struct is available in 2.4.65, although the functions
(drm{Get,Free}Device) are available since 2.4.66 afaics.
Mildly related: Not sure it there are any non PCI ATI/AMD devices,
then again one should check drmDevi
Hi!
With the recent commits, I'm having some trouble parsing the GL3.txt
text file for mesamatrix.net.
With these set of 4 patches, I'm proposing to rationalize a little bit
this file. The content is exactly the same.
(Note: I'm not really used to propose patches, so if this format is
wrong, I'll
On 03/13/2016 10:18 PM, Samuel Pitoiset wrote:
This is there since ... 2013 ... but this was never really used because
it's compute-related, that might explain why you are the first one to
hit the issue. :-)
Luckily, this doesn't affect compute shaders on Fermi because globals
buffers are vali
Well, without a new validation path for compute on Tesla this won't
change anything because nv50_state_validate() is 3d-related and it
should be never called by compute.
On 03/13/2016 10:11 PM, Pierre Moreau wrote:
Signed-off-by: Pierre Moreau
---
src/gallium/drivers/nouveau/nv50/nv50_state
Matt Turner writes:
> Instead of removing every instruction in add_insts_from_block(), just
> move the instruction to its scheduled location. This is a step towards
> doing both bottom-up and top-down scheduling without conflicts.
>
> Note that this patch changes cycle counts for programs because
This is there since ... 2013 ... but this was never really used because
it's compute-related, that might explain why you are the first one to
hit the issue. :-)
Luckily, this doesn't affect compute shaders on Fermi because globals
buffers are validated *after* all other things.
Good catch!
Signed-off-by: Pierre Moreau
---
src/gallium/drivers/nouveau/nv50/nv50_state.c | 2 +-
src/gallium/drivers/nouveau/nvc0/nvc0_state.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_state.c
b/src/gallium/drivers/nouveau/nv50/nv50_state.
Signed-off-by: Pierre Moreau
---
src/gallium/drivers/nouveau/nv50/nv50_state_validate.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
b/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
index 5536978..d06ba4a 100644
--- a/src/gall
- Do not reorder instructions reading packed sources (fixes piglit
regressions with draw-vertices and draw-vertices-user).
---
Eric, Rhys, with this bit we should be good to go.
src/gallium/drivers/vc4/vc4_opt_vpm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium
From: Roland Scheidegger
The logic was comparing actual ints, not true/false values.
This meant that it was emitting always multiple line segments instead of just
one even if the stipple test had the same result, which looks inefficient, and
the segments also overlapped thus breaking line aa as w
Matt Turner writes:
> Ken did this earlier, and this is just me reimplementing his patch a
> little differently.
Heh, it seems a little mean to Ken to revert his patch only to implement
almost the same thing a few commits later. I suggest you squash the
revert and this patch into PATCHv2 9 befo
From: Roland Scheidegger
All these img filter loops iterate through NUM_CHANNELS, not QUAD_SIZE.
In practice both are of course the same unchangeable value (4), but it
makes the code look a bit confusing. Moreover, some of the functions were
actually given an array of 4 values according to the de
Ken did this earlier, and this is just me reimplementing his patch a
little differently.
---
src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
b/src/mesa/drivers/dri
---
.../drivers/dri/i965/brw_schedule_instructions.cpp | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
index 98fa5e3..befa9ff 100644
--- a/
From: Marek Olšák
---
configure.ac | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure.ac b/configure.ac
index 49be147..d768db6 100644
--- a/configure.ac
+++ b/configure.ac
@@ -70,7 +70,7 @@ AC_SUBST([OPENCL_VERSION])
dnl Versions for external dependencies
LIBDRM_REQU
On Sun, Mar 13, 2016 at 7:52 AM, Samuel Pitoiset
wrote:
>
>
> On 03/13/2016 04:07 AM, Ilia Mirkin wrote:
>>
>> First off, st/mesa lowers DSQRT incorrectly (it uses CMP to attempt to
>> find out whether the input is less than 0). Secondly the current
>> approach (x * rsq(x)) behaves poorly for x =
On Sun, Mar 13, 2016 at 7:43 AM, Samuel Pitoiset
wrote:
> What about nv50? Is there the same issue?
Yes, but nv50's max fb size is 8192x8192, and there the blit
triangle's size is 16384x16384, so it all works out. (Also nv50 has
some funny business wrt MS textures that ends up being a bit differe
I can't say I'm a huge fan of adding the format/etc info
per-instruction, but I'm also not opposed to it if it makes your life
a lot easier. Patches 1-9 are
Reviewed-by: Ilia Mirkin
Thanks for taking care of the access/early depth bits :)
-ilia
On Sun, Mar 13, 2016 at 10:29 AM, Nicolai Hähnl
On 12.03.2016 19:09, Ilia Mirkin wrote:
On Fri, Mar 11, 2016 at 11:17 AM, Nicolai Hähnle wrote:
From: Nicolai Hähnle
Sampler states don't really make sense with buffer textures, but the PBO
upload code sets one because apparently nouveau needs it. It would be
nice to work that out at some poi
From: Nicolai Hähnle
---
src/gallium/drivers/radeonsi/si_state_shaders.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 321b87d..5fe1f79 100644
--- a/src/gallium/drivers/radeonsi/si_s
From: Nicolai Hähnle
---
src/gallium/auxiliary/tgsi/tgsi_build.c | 15 +++
src/gallium/auxiliary/tgsi/tgsi_build.h | 5 +
2 files changed, 20 insertions(+)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_build.c
b/src/gallium/auxiliary/tgsi/tgsi_build.c
index cfe9b92..e5355f5 100
From: Nicolai Hähnle
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 18cea60..1841405 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b
From: Nicolai Hähnle
This allows drivers to make smarter decisions e.g. about whether the image
has to be decompressed.
---
src/gallium/include/pipe/p_defines.h | 8
src/gallium/include/pipe/p_state.h | 3 ++-
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/src/gallium/
From: Nicolai Hähnle
---
src/gallium/auxiliary/util/u_inlines.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/src/gallium/auxiliary/util/u_inlines.h
b/src/gallium/auxiliary/util/u_inlines.h
index d081203..0e80cef 100644
--- a/src/gallium/auxiliary/util/u_inlines.h
+++ b/src/ga
From: Nicolai Hähnle
Frontends should have this information readily available, and it simplifies
image LOAD/STORE/ATOM* handling especially with indirect image access.
---
src/gallium/auxiliary/tgsi/tgsi_dump.c | 8
src/gallium/include/pipe/p_shader_tokens.h | 4 +++-
2 files change
From: Nicolai Hähnle
---
src/mesa/state_tracker/st_atom_image.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/src/mesa/state_tracker/st_atom_image.c
b/src/mesa/state_tracker/st_atom_image.c
index bf7486b..e96d10a1 100644
--- a/src/mesa/state_tracker/st_atom_image.c
+++ b/
From: Nicolai Hähnle
---
src/gallium/auxiliary/tgsi/tgsi_strings.c | 1 +
src/gallium/docs/source/tgsi.rst | 6 ++
src/gallium/include/pipe/p_shader_tokens.h | 3 ++-
3 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_strings.c
b/src/gal
Hi,
this is probably my last batch of hardware-independent patches that need
to be pushed before the series that finally adds ARB_shader_image_load_store
for radeonsi.
Patches 1 to 7 add various fields to TGSI and pipe_image_view to communicate
state and flags to the driver that are so far not co
From: Nicolai Hähnle
---
src/gallium/auxiliary/tgsi/tgsi_ureg.c | 12 +---
src/gallium/auxiliary/tgsi/tgsi_ureg.h | 8 ++--
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 24 +++-
3 files changed, 30 insertions(+), 14 deletions(-)
diff --git a/src/gallium/
From: Nicolai Hähnle
This is required to preserve the image variable's coherent/restrict/volatile
qualifiers in TGSI.
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_
since 737b6ed13e8f813987b5566004f0f45e9c55f1e8
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c not longer compile:
error: unknown type name ‘drmDevicePtr’
---
configure.ac | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/configure.ac b/configure.ac
index 49be147..55b1c95 10064
Functions arguments get a definition from the function itself, a definition
which is therefore not linked to any instruction. If a value ends up having a
definition but no linked instruction, the register allocation pass can skip
that value since it is not being used.
This fixes a null pointer der
Hum… Something went wrong, sorry. This is the same as the previous patch and
not the updated version…
Pierre
On 02:16 PM - Mar 13 2016, Pierre Moreau wrote:
> On Tesla cards, the first register $r0 contains the thread id; later
> generations use a specialised register for it. In order to prevent
01/11? Where are the other patches?
On 03/13/2016 02:16 PM, Pierre Moreau wrote:
On Tesla cards, the first register $r0 contains the thread id; later
generations use a specialised register for it. In order to prevent the register
from being given to anyone, and thus lose the thread id informatio
On Tesla cards, the first register $r0 contains the thread id; later
generations use a specialised register for it. In order to prevent the register
from being given to anyone, and thus lose the thread id information, an lvalue
is created to represent $r0 and is passed as an argument to the `main`
https://bugs.freedesktop.org/show_bug.cgi?id=94522
--- Comment #1 from comicfans44 ---
local variable and args in crash thread:
(gdb) info locals
color = {0xb2298100 ,
0xc01064b3 ,
0xb7d6de89
"[=\001\360\377\377\017\203\213\227\363\377\303f\220f\220f\220f\220f\220e\203=\f",
0xb7c72c0b <__pth
https://bugs.freedesktop.org/show_bug.cgi?id=94522
Bug ID: 94522
Summary: weston eglSwapBuffers crash in kms_swrast_dri.so on
GMA500
Product: Mesa
Version: 11.1
Hardware: x86 (IA32)
OS: All
Statu
On 03/13/2016 04:07 AM, Ilia Mirkin wrote:
First off, st/mesa lowers DSQRT incorrectly (it uses CMP to attempt to
find out whether the input is less than 0). Secondly the current
approach (x * rsq(x)) behaves poorly for x = inf - a NaN is produced
instead of inf.
When I had a look at this pr
This doesn't seem crazy.
Reviewed-by: Samuel Pitoiset
On 03/13/2016 04:07 AM, Ilia Mirkin wrote:
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nouveau/code
What about nv50? Is there the same issue?
Don't you need to update nvc0_clear_buffer() accordingly?
On 03/13/2016 04:07 AM, Ilia Mirkin wrote:
The idea is that a single triangle will cover the whole area being
drawn, allowing the blit shader to do its work. However the max fb size
is 16384x16384
83 matches
Mail list logo
