On Mon, Jan 18, 2016 at 12:40 AM, Jose Fonseca wrote:
> On 17/01/16 20:55, Oded Gabbay wrote:
>>
>> This patch fixes a bug when building a pack instruction.
>>
>> For POWER (altivec), in case the destination is signed and the
>> src width is 32, we need to use vpkswss. The original code used vpkuw
On Sun, Jan 17, 2016 at 11:16 PM, Roland Scheidegger wrote:
> Reviewed-by: Roland Scheidegger
>
> Am 17.01.2016 um 21:55 schrieb Oded Gabbay:
>> This patch fixes a bug when building a pack instruction.
>>
>> For POWER (altivec), in case the destination is signed and the
>> src width is 32, we nee
Signed-off-by: Ilia Mirkin
---
src/gallium/include/pipe/p_defines.h | 1 +
src/mesa/state_tracker/st_cb_texturebarrier.c | 4
2 files changed, 5 insertions(+)
diff --git a/src/gallium/include/pipe/p_defines.h
b/src/gallium/include/pipe/p_defines.h
index cb837cd..7ffe045 100644
---
Signed-off-by: Ilia Mirkin
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 32 ++
1 file changed, 32 insertions(+)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 602e689..bb519aa 100644
--- a/src/mesa/state
Signed-off-by: Ilia Mirkin
---
src/mesa/Makefile.sources| 1 +
src/mesa/state_tracker/st_atom.c | 5 +
src/mesa/state_tracker/st_atom.h | 5 +
src/mesa/state_tracker/st_atom_storagebuf.c | 188 +++
src/mesa/state_tracker/s
---
src/gallium/drivers/trace/tr_context.c| 38 +++
src/gallium/drivers/trace/tr_dump_state.c | 18 +++
src/gallium/drivers/trace/tr_dump_state.h | 2 ++
3 files changed, 58 insertions(+)
diff --git a/src/gallium/drivers/trace/tr_context.c
b/src/galli
Signed-off-by: Ilia Mirkin
---
src/mesa/Makefile.sources| 1 +
src/mesa/program/ir_to_mesa.cpp | 4 +
src/mesa/state_tracker/st_atom.c | 5 +
src/mesa/state_tracker/st_atom.h | 5 +
src/mesa/state_tracker/st_atom_atomicbuf.c | 158
Currently any access params (coherent/volatile/restrict) are being lost
when lowering to the ssbo load/store intrinsics. Keep track of the
variable being used, and bake its access params in as the last arg of
the load/store intrinsics.
Signed-off-by: Ilia Mirkin
---
src/glsl/lower_ubo_reference.
Signed-off-by: Ilia Mirkin
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 21 +++--
1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index d424e3b..055d187 100644
--- a/src/me
Signed-off-by: Ilia Mirkin
---
src/mesa/state_tracker/st_extensions.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/state_tracker/st_extensions.c
b/src/mesa/state_tracker/st_extensions.c
index ce88b4a..cec1634 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/stat
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 0aaa175..602e689 100644
--- a/src/mesa/state_tracker/st_glsl_to_
This series adds everything necessary to support ARB_shader_atomic_counters
and ARB_shader_storage_buffer_object. With a branch that also includes nvc0
implementation, this is passing nearly all SSBO-related dEQP tests.
In dEQP, there are 49 fails and 2106 passes, so it at least somewhat works.
Oh
Signed-off-by: Ilia Mirkin
---
src/gallium/auxiliary/tgsi/tgsi_info.c | 2 +-
src/gallium/docs/source/tgsi.rst | 17 +
src/gallium/include/pipe/p_shader_tokens.h | 2 +-
3 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi
From: Roland Scheidegger
If the tri is fully inside the scissor (or rather, we just use the
bounding box of the tri for the comparison), then we can drop these
additional scissor "planes" early.
(We could, of course, not even emit the scissor planes in this case
in the first place, but for now it
From: Roland Scheidegger
If we have a d24x8 format, there is no stencil. Therefore, we can always
clear these bits too, which means this will be some kind of memset rather
than read-modify-write.
This is good for some 7% increase or so in gears with huge window size -
seems to have a bigger effec
The vec4 backend, at the end, does this:
if (inst->is_3src()) {
for (int i = 0; i < 3; i++) {
if (inst->src[i].vstride == BRW_VERTICAL_STRIDE_0)
assert(brw_is_single_value_swizzle(inst->src[i].swizzle));
So make sure that we use the same conditions when trying to
Cc stable also?
And subject arb_shader_subroutine -> glsl ??
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On Sun, 2016-01-17 at 14:23 +1000, Dave Airlie wrote:
> From: Dave Airlie
>
> One of the oglconform tests was crashing here, and it was
> due to not cloning the actual parameters before creating the
> new call. This makes a call clone function that does the right
> things to make sure we clone al
https://bugs.freedesktop.org/show_bug.cgi?id=93731
Timothy Arceri changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
On 18 January 2016 at 10:15, Timothy Arceri
wrote:
> Cc: Dave Airlie
> Cc: "11.0 11.1" mesa-sta...@lists.freedesktop.org
Looks good to me.
Reviewed-by: Dave Airlie
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Cc: Dave Airlie
Cc: "11.0 11.1" mesa-sta...@lists.freedesktop.org
---
src/glsl/linker.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index dbf6ce9..1d673b6 100644
--- a/src/glsl/linker.cpp
+++ b/src/glsl/linker.cpp
@@ -3212,7 +321
From Section 7.9 (SUBROUTINE UNIFORM VARIABLES) of the OpenGL
4.5 Core spec:
"The command
void UniformSubroutinesuiv(enum shadertype, sizei count,
const uint *indices);
will load all active subroutine uniforms for shader stage
shadertype with sub
On Sun, 2016-01-17 at 15:20 -0800, Jason Ekstrand wrote:
>
> On Jan 17, 2016 2:45 PM, "Timothy Arceri"
> wrote:
> >
> > On Mon, 2016-01-18 at 09:34 +1100, Timothy Arceri wrote:
> > > On Sun, 2016-01-17 at 08:27 -0800, Jason Ekstrand wrote:
> > > >
> > > > On Jan 16, 2016 9:15 PM, "Timothy Arceri"
On Mon, 2016-01-18 at 09:45 +1100, Timothy Arceri wrote:
> On Mon, 2016-01-18 at 09:34 +1100, Timothy Arceri wrote:
> > On Sun, 2016-01-17 at 08:27 -0800, Jason Ekstrand wrote:
> > >
> > > On Jan 16, 2016 9:15 PM, "Timothy Arceri" <
> > > timothy.arc...@collabora.com> wrote:
> > > >
> > > > From
On Jan 17, 2016 2:45 PM, "Timothy Arceri" wrote:
>
> On Mon, 2016-01-18 at 09:34 +1100, Timothy Arceri wrote:
> > On Sun, 2016-01-17 at 08:27 -0800, Jason Ekstrand wrote:
> > >
> > > On Jan 16, 2016 9:15 PM, "Timothy Arceri" <
> > > timothy.arc...@collabora.com> wrote:
> > > >
> > > > From Section
On Mon, 2016-01-18 at 09:34 +1100, Timothy Arceri wrote:
> On Sun, 2016-01-17 at 08:27 -0800, Jason Ekstrand wrote:
> >
> > On Jan 16, 2016 9:15 PM, "Timothy Arceri" <
> > timothy.arc...@collabora.com> wrote:
> > >
> > > From Section 7.9 (SUBROUTINE UNIFORM VARIABLES) of the OpenGL
> > > 4.5 Core
On 17/01/16 20:55, Oded Gabbay wrote:
This patch fixes a bug when building a pack instruction.
For POWER (altivec), in case the destination is signed and the
src width is 32, we need to use vpkswss. The original code used vpkuwus,
which emits an unsigned result.
This fixes the following piglit
On Sun, Jan 17, 2016 at 5:34 PM, Timothy Arceri
wrote:
> On Sun, 2016-01-17 at 08:27 -0800, Jason Ekstrand wrote:
>>
>> On Jan 16, 2016 9:15 PM, "Timothy Arceri" <
>> timothy.arc...@collabora.com> wrote:
>> >
>> > From Section 7.9 (SUBROUTINE UNIFORM VARIABLES) of the OpenGL
>> > 4.5 Core spec:
>>
On Sun, 2016-01-17 at 08:27 -0800, Jason Ekstrand wrote:
>
> On Jan 16, 2016 9:15 PM, "Timothy Arceri" <
> timothy.arc...@collabora.com> wrote:
> >
> > From Section 7.9 (SUBROUTINE UNIFORM VARIABLES) of the OpenGL
> > 4.5 Core spec:
> >
> >"The command
> >
> >void UniformSubroutinesuiv
From: Roland Scheidegger
Like the previous patch, but this time instead of direct format pack
functions, this handles convert_ubyte if the destination and source
were both ubyte unorm with 4 channels (so this can do things like
bgrx8->rgba8, apart from swizzling filling in 1's for alpha).
The big
From: Roland Scheidegger
This certainly isn't as generic as it would be ideally, but got to start
somewhere...
Handles just rgba8/rgbx8 formats (so just swizzling). Even when using
cached regions, these functions are definitely quite a bit faster than
the c ones (for larger counts, obviously) (ab
From: Roland Scheidegger
---
src/gallium/auxiliary/util/u_format_parse.py | 2 +-
src/mesa/main/format_parser.py | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_format_parse.py
b/src/gallium/auxiliary/util/u_format_parse.py
index
From: Roland Scheidegger
The existing code used ssse3, and because it isn't compiled in a separate
file compiled with that, it is usually not used (that, of course, could
be fixed...), whereas sse2 is always present at least with 64bit builds.
It is actually trivial to do with sse2 without pshufb
An issue could still occur if the base level is set, but fixing that
would require a lot more logic.
This fixes the recently-failing texelFetch 3D tests because the mipmaps
were no longer being generated, which in turn caused the copying logic
to be hit, which in turn didn't work because of the br
Reviewed-by: Roland Scheidegger
Am 17.01.2016 um 21:55 schrieb Oded Gabbay:
> This patch fixes a bug when building a pack instruction.
>
> For POWER (altivec), in case the destination is signed and the
> src width is 32, we need to use vpkswss. The original code used vpkuwus,
> which emits an un
This patch fixes a bug when building a pack instruction.
For POWER (altivec), in case the destination is signed and the
src width is 32, we need to use vpkswss. The original code used vpkuwus,
which emits an unsigned result.
This fixes the following piglit tests on ppc64le:
- spec@arb_color_buffe
Signed-off-by: Ilia Mirkin
---
src/gallium/auxiliary/tgsi/tgsi_info.c | 2 +-
src/gallium/docs/source/tgsi.rst | 17 +
src/gallium/include/pipe/p_shader_tokens.h | 2 +-
3 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi
Am 17.01.2016 um 14:31 schrieb Oded Gabbay:
> This patch fixes a classic "confuse the enemy" bug.
>
> _mm_andnot_si128 (SSE) and vec_andc (VMX) do the same operation, but the
> arguments are opposite.
>
> _mm_andnot_si128 performs "r = (~a) & b" while
> vec_andc performs "r = a & (~b)"
>
> To ma
On Jan 16, 2016 9:15 PM, "Timothy Arceri"
wrote:
>
> From Section 7.9 (SUBROUTINE UNIFORM VARIABLES) of the OpenGL
> 4.5 Core spec:
>
>"The command
>
>void UniformSubroutinesuiv(enum shadertype, sizei count,
> const uint *indices);
>
>will load all
This patch fixes a classic "confuse the enemy" bug.
_mm_andnot_si128 (SSE) and vec_andc (VMX) do the same operation, but the
arguments are opposite.
_mm_andnot_si128 performs "r = (~a) & b" while
vec_andc performs "r = a & (~b)"
To make sure this error won't return in another place, I added a wr
Reviewed-by: Marek Olšák
On Sun, Jan 17, 2016 at 9:46 AM, Ilia Mirkin wrote:
> Spotted by Coverity.
>
> Signed-off-by: Ilia Mirkin
> ---
> src/gallium/auxiliary/tgsi/tgsi_build.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/src/gallium/auxiliary/tgsi/tgsi_build.c
> b/src/gallium/a
This is one of the local patches present in FreeBSD ports.
Not using git send-email since for some reason it can't talk to
my smtp server.
--
Francois Tigeot
>From 256120db3e39b74ad2a597e1082c1a6ea8ffacf6 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Fran=C3=A7ois=20Tigeot?=
Date: Sun, 17 Jan 2016 1
Reviewed-by: Edward O'Callaghan
On 2016-01-17 19:46, Ilia Mirkin wrote:
Spotted by Coverity.
Signed-off-by: Ilia Mirkin
---
src/gallium/auxiliary/tgsi/tgsi_build.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_build.c
b/src/gallium/auxiliary/tgsi/tgsi_bu
Spotted by Coverity.
Signed-off-by: Ilia Mirkin
---
src/gallium/auxiliary/tgsi/tgsi_build.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_build.c
b/src/gallium/auxiliary/tgsi/tgsi_build.c
index ea20746..83f5062 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_b
On 17 January 2016 at 15:15, Timothy Arceri
wrote:
> From Section 7.9 (SUBROUTINE UNIFORM VARIABLES) of the OpenGL
> 4.5 Core spec:
>
>"The command
>
>void UniformSubroutinesuiv(enum shadertype, sizei count,
> const uint *indices);
>
>will load all
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