Re: [Mesa-dev] [PATCH 2/9] i965/fs: print writemask_all when it's enabled

On Thu, 2015-11-19 at 10:14 -0500, Connor Abbott wrote: > I think Ken already pushed a similar patch so we can drop this. I don't see that in master, but sure, we can hold this back if he is planning to push the same thing. Iago > On Thu, Nov 19, 2015 at 5:05 AM, Iago Toral Quiroga wrote: > > F

Re: [Mesa-dev] [PATCH 3/9] i965: fix 64-bit immediates in brw_inst(_set)_bits

On Thu, 2015-11-19 at 12:08 -0800, Matt Turner wrote: > On Thu, Nov 19, 2015 at 11:35 AM, Kristian Høgsberg > wrote: > > On Thu, Nov 19, 2015 at 11:24 AM, Matt Turner wrote: > >> On Thu, Nov 19, 2015 at 9:30 AM, Kristian Høgsberg > >> wrote: > >>> On Thu, Nov 19, 2015 at 2:05 AM, Iago Toral Qu

Re: [Mesa-dev] [PATCH 0/9] Early fp64 fixes

On Thu, 2015-11-19 at 12:19 -0800, Matt Turner wrote: > For the next patches you send from Connor, please use > --suppress-cc=author so that every reply doesn't generate a bounce > message about his disabled @intel email. :) > Yeah, will do :) Iago __

Re: [Mesa-dev] [PATCH 0/9] Early fp64 fixes

On Thu, 2015-11-19 at 10:54 -0500, Connor Abbott wrote: > On Thu, Nov 19, 2015 at 5:05 AM, Iago Toral Quiroga wrote: > > These patches are fixes extracted from Connor's fp64 branch that > > I would like to review and land ahead of the rest. They are > > independent of the rest of the series, some

[Mesa-dev] [PATCH 1/2] i965: Use ldexpf() in VF float test set up.

--- src/mesa/drivers/dri/i965/test_vf_float_conversions.cpp | 11 +++ 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/test_vf_float_conversions.cpp b/src/mesa/drivers/dri/i965/test_vf_float_conversions.cpp index 6a8bcea..7f03425 100644 --- a/src/mes

[Mesa-dev] [PATCH 2/2] i965: Test that nonrepresentable floats cannot be converted to VF.

--- src/mesa/drivers/dri/i965/test_vf_float_conversions.cpp | 15 +++ 1 file changed, 15 insertions(+) diff --git a/src/mesa/drivers/dri/i965/test_vf_float_conversions.cpp b/src/mesa/drivers/dri/i965/test_vf_float_conversions.cpp index 7f03425..7af97d0 100644 --- a/src/mesa/drivers/d

[Mesa-dev] [PATCH 1/2] i965/vec4: Initialize nir_inputs with src_reg().

nir_locals, nir_ssa_values, and nir_system_values are all dst_reg (not that that makes a whole lot of sense to me), and only nir_inputs is a src_reg. --- src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec

[Mesa-dev] [PATCH 2/2] i965: Prevent implicit upcasts to brw_reg.

Now that backend_reg inherits from brw_reg, we have to be careful to avoid the object slicing problem. --- src/mesa/drivers/dri/i965/brw_fs.cpp | 6 +++-- .../drivers/dri/i965/brw_fs_copy_propagation.cpp | 4 +-- src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 2 +- src/mes

Re: [Mesa-dev] [PATCH] i965/fs: Replace nested ternary with if ladder.

On Wed, Nov 18, 2015 at 8:15 AM, Francisco Jerez wrote: > Matt Turner writes: > >> Since the types of the expression were >> >>bool ? src_reg : (bool ? brw_reg : brw_reg) >> >> the result of the second (nested) ternary would be implicitly >> converted to a src_reg by the src_reg(struct brw_re

Re: [Mesa-dev] [PATCH 4/4] automake: loader: don't create an empty dri3 helper

On Thu, Nov 19, 2015 at 9:36 PM, Vinson Lee wrote: > On Thu, Nov 19, 2015 at 8:32 AM, Emil Velikov > wrote: >> On 19 November 2015 at 16:33, Emil Velikov wrote: >>> From: Emil Velikov >>> >>> Seems that creating an empty one does not fair too well with MacOSX's >>> ar. Considering that all the

Re: [Mesa-dev] [PATCH 4/4] automake: loader: don't create an empty dri3 helper

On Thu, Nov 19, 2015 at 8:32 AM, Emil Velikov wrote: > On 19 November 2015 at 16:33, Emil Velikov wrote: >> From: Emil Velikov >> >> Seems that creating an empty one does not fair too well with MacOSX's >> ar. Considering that all the users of the helper include it only when >> needed, let's res

Re: [Mesa-dev] [PATCH 8/8 v2] i965: Enable EXT_shader_samples_identical

On 11/19/2015 02:13 PM, Neil Roberts wrote: > Ian Romanick writes: > >> Am I correct that nothing special is needed in the vec4 backend? It >> seems like mcs should know the register size, and the CMP with 0 >> should just do the right thing. > > I think you probably will have to do something fo

Re: [Mesa-dev] [PATCH 0/8] Implement EXT_shader_samples_identical

On 11/19/2015 06:47 AM, Emil Velikov wrote: > Hi Ian, > > Attempting to high-jack the thread :-P > > On 18 November 2015 at 23:46, Ian Romanick wrote: > >> I really wanted to get this in the next Mesa release. For some reason, >> I thought the branch point was after Thanksgiving (which is next

[Mesa-dev] [PATCH] gallivm: use sampler index 0 for texel fetches

From: Roland Scheidegger texel fetches don't use any samplers. Previously we just set the same number for both texture and sampler unit (as per "ordinary" gl style sampling where the numbers are always the same) however this would trigger some assertions checking that the sampler index isn't over

Re: [Mesa-dev] [PATCH] i965: Fix JIP to properly skip over unrelated control flow.

On Thursday, November 19, 2015 02:05:44 PM Kenneth Graunke wrote: > We've apparently always been botching JIP for sequences such as: > >do >cmp.f0.0 ... >(+f0.0) break >... >if > ... >else > ... >endif >... >while

Re: [Mesa-dev] [PATCH v3 13/14] glsl: add subroutine index qualifier support

On Fri, 2015-11-20 at 14:25 +1100, Timothy Arceri wrote: > Hi Dave/Tapani, > > This is the last patch in this series unreviewed is either of you able to > review is as you guys implemented the respective extensions. Forgot to say that there are piglit compile tests in master under ARB_explicit_u

Re: [Mesa-dev] [PATCH v3 13/14] glsl: add subroutine index qualifier support

Hi Dave/Tapani, This is the last patch in this series unreviewed is either of you able to review is as you guys implemented the respective extensions. Thanks, Tim ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mail

Re: [Mesa-dev] [Mesa-stable] [PATCH 2/2] radeonsi/compute: Use the compiler's COMPUTE_PGM_RSRC* register values

On 20.11.2015 05:53, Emil Velikov wrote: > On 19 November 2015 at 20:37, Tom Stellard wrote: >> On Wed, Nov 18, 2015 at 05:43:31PM +, Emil Velikov wrote: >>> Hi Tom, >>> >>> Please flip the order of the patches and drop the now patch 1/2 from >>> the stable queue. >>> >> >> I'm confused about

Re: [Mesa-dev] [PATCH] radeon/llvm: Use llvm.AMDIL.exp intrinsic again for now

On 20.11.2015 02:11, Nicolai Hähnle wrote: > On 19.11.2015 17:37, Tom Stellard wrote: >> On Thu, Nov 19, 2015 at 11:17:12AM +0100, Nicolai Hähnle wrote: >>> On 19.11.2015 03:55, Tom Stellard wrote: On Thu, Nov 19, 2015 at 11:31:55AM +0900, Michel Dänzer wrote: > From: Michel Dänzer >

Re: [Mesa-dev] MESA_EXTENSION_OVERRIDE problem

On 11/19/2015 05:40 PM, Nanley Chery wrote: > > On Thu, Nov 19, 2015 at 12:13 PM, Brian Paul > wrote: > > Hi Nanley, > > > Hi Brian, > > > Maybe you can fix an issue I have with the new extension code. > > Previously, I could do something like export

Re: [Mesa-dev] [PATCH 5/5] i965/gen9: Don't allow the RGBX formats for texturing/rendering

On Thu, Nov 19, 2015 at 04:25:21PM +0100, Neil Roberts wrote: > The RGBX surface formats aren't renderable so we internally remap them > to RGBA when rendering. They are retained as RGBX when used as > textures. However since the previous patch fast clears are disabled > for surfaces that use a dif

Re: [Mesa-dev] [PATCH 3/5] i965: Check base format to determine whether to use tiled memcpy

On Thu, Nov 19, 2015 at 04:25:19PM +0100, Neil Roberts wrote: > The tiled memcpy doesn't work for copying from RGBX to RGBA because it > doesn't override the alpha component to 1.0. Commit 2cebaac479d4 added > a check to disable it for RGBX formats by looking at the TexFormat. > However a lot of th

Re: [Mesa-dev] [PATCH 1/5] i965/gen9: Don't disallow fast clear for MSRT formats matching render

On Thu, Nov 19, 2015 at 04:25:17PM +0100, Neil Roberts wrote: > Previously fast clear was disallowed on Gen9 for MSRTs with the claim > that some formats don't work but we didn't understand why. On further > investigation it seems the formats that don't work are the ones where > the render surface

Re: [Mesa-dev] [PATCH 2/5] i965/gen8: Allow rendering to B8G8R8X8

On Thu, Nov 19, 2015 at 04:25:18PM +0100, Neil Roberts wrote: > Since Gen8 this is allowed as a rendering target so we don't need to > override it to B8G8R8A8. This is helpful on Gen9+ where using this > override causes fast clears not to work. > --- > src/mesa/drivers/dri/i965/brw_surface_formats

Re: [Mesa-dev] MESA_EXTENSION_OVERRIDE problem

On 11/19/2015 12:30 PM, Ilia Mirkin wrote: > On Thu, Nov 19, 2015 at 3:25 PM, Brian Paul wrote: >> On 11/19/2015 01:19 PM, Ilia Mirkin wrote: >>> On Thu, Nov 19, 2015 at 3:13 PM, Brian Paul wrote: Hi Nanley, Maybe you can fix an issue I have with the new extension code. >

Re: [Mesa-dev] MESA_EXTENSION_OVERRIDE problem

On Thu, Nov 19, 2015 at 12:13 PM, Brian Paul wrote: > Hi Nanley, > > Hi Brian, > Maybe you can fix an issue I have with the new extension code. > > Previously, I could do something like export > MESA_EXTENSION_OVERRIDE="-ARB_clear_buffer_object" and I would no longer > see it in the GL_EXTENSIO

[Mesa-dev] [PATCH] i965: Add src/dst interference for certain instructions with hazards.

From: Kenneth Graunke When working on tessellation shaders, I created some vec4 virtual opcodes for creating message headers through a sequence like: mov(8) g7<1>UD 0xUD{ align1 WE_all 1Q compacted }; mov(1) g7.5<1>UD0x0100UD{ align1 WE_all }; mov(1) g7<1>UD

Re: [Mesa-dev] [RFC 3/4] glsl: avoid linker and user varying location to overlap

On Sun, 2015-10-25 at 15:01 +0100, Gregory Hainaut wrote: > Current behavior on the interface matching: > > layout (location = 0) out0; // Assigned to VARYING_SLOT_VAR0 by user > out1; // Assigned to VARYING_SLOT_VAR0 by the linker > > New behavior on the interface matching: > > layout (location

[Mesa-dev] [Bug 92706] glBlitFramebuffer refuses to blit RGBA to RGB with MSAA

https://bugs.freedesktop.org/show_bug.cgi?id=92706 --- Comment #7 from EoD --- OpenGL renderer string: Gallium 0.4 on AMD BARTS (DRM 2.43.0, LLVM 3.7.0) OpenGL core profile version string: 3.3 (Core Profile) Mesa 11.1.0-devel (git-0cfc130) After applying both patches, the patched piglit test pas

Re: [Mesa-dev] [PATCH] i965: Fix JIP to properly skip over unrelated control flow.

On Thu, Nov 19, 2015 at 2:05 PM, Kenneth Graunke wrote: > We've apparently always been botching JIP for sequences such as: Wrong since Dec 1 2015! Nice find. > >do >cmp.f0.0 ... >(+f0.0) break >... >if > ... >else > ... >end

Re: [Mesa-dev] [PATCH 8/8] i965: Enable EXT_shader_samples_identical

Jason Ekstrand writes: > Something else that came out of that conversation is that, for 2x > MSAA, we may get bogus data in all but the bottom 4 bits. In other > words, just blindly checking for zero is probably a bad idea. It'll > work because the extension spec lets us return false negatives,

Re: [Mesa-dev] [PATCH 2/5] i965/gen8: Allow rendering to B8G8R8X8

On Thu, Nov 19, 2015 at 7:25 AM, Neil Roberts wrote: > Since Gen8 this is allowed as a rendering target so we don't need to > override it to B8G8R8A8. This is helpful on Gen9+ where using this > override causes fast clears not to work. > --- > src/mesa/drivers/dri/i965/brw_surface_formats.c | 9 +

Re: [Mesa-dev] [PATCH 8/8 v2] i965: Enable EXT_shader_samples_identical

Ian Romanick writes: > Am I correct that nothing special is needed in the vec4 backend? It > seems like mcs should know the register size, and the CMP with 0 > should just do the right thing. I think you probably will have to do something for the vec4 backend. Currently it generates an instructi

[Mesa-dev] [PATCH] i965: Fix JIP to properly skip over unrelated control flow.

We've apparently always been botching JIP for sequences such as: do cmp.f0.0 ... (+f0.0) break ... if ... else ... endif ... while Normally, UIP is supposed to point to the final destination of the jump, while in nested co

Re: [Mesa-dev] [PATCH 8/8] i965: Enable EXT_shader_samples_identical

On Wed, Nov 18, 2015 at 9:29 PM, Jason Ekstrand wrote: > > On Nov 18, 2015 5:02 PM, "Jason Ekstrand" wrote: >> >> On Wed, Nov 18, 2015 at 4:06 PM, Kenneth Graunke >> wrote: >> > On Wednesday, November 18, 2015 03:46:54 PM Ian Romanick wrote: >> >> From: Ian Romanick >> >> >> >> Signed-off-by: I

Re: [Mesa-dev] [PATCH 0/8] Implement EXT_shader_samples_identical

Series (with the v2 changes) is: Reviewed-by: Chris Forbes On Thu, Nov 19, 2015 at 12:46 PM, Ian Romanick wrote: > This patch series implements a new GL extension, > EXT_shader_samples_identical. This extension allows shaders to > determine when all of the samples in a particular texel are th

Re: [Mesa-dev] [PATCH 8/8 v2] i965: Enable EXT_shader_samples_identical

On 11/19/2015 09:34 AM, Neil Roberts wrote: > Jason Ekstrand writes: > >> On Nov 18, 2015 6:38 PM, "Ian Romanick" wrote: >>> >>> From: Ian Romanick >>> >>> v2: Handle immediate value for MCS smarter. Rebase on changes to >>> nir_texop_sampels_identical (missing second parameter). Suggested by

Re: [Mesa-dev] [PATCH] egl/x11/dri3: do not expose the preserved swap behavior (to be squashed)

Martin Graesslin writes: > On Thursday, November 19, 2015 1:54:22 PM CET Martin Peres wrote: >> On 11/11/15 00:44, Eric Anholt wrote: >> > Martin Peres writes: >> >> The preserved swap behavior is currently untested in piglit and not >> >> supported on the GLX side. Before working on implementin

Re: [Mesa-dev] [Mesa-stable] [PATCH 2/2] radeonsi/compute: Use the compiler's COMPUTE_PGM_RSRC* register values

On 19 November 2015 at 20:37, Tom Stellard wrote: > On Wed, Nov 18, 2015 at 05:43:31PM +, Emil Velikov wrote: >> Hi Tom, >> >> Please flip the order of the patches and drop the now patch 1/2 from >> the stable queue. >> > > I'm confused about why I need to flip the order of the patches. > As m

Re: [Mesa-dev] [PATCH] mesa: Add test for sorted extension table

On 11/19/2015 10:44 AM, Nanley Chery wrote: > From: Nanley Chery > > Enable developers to know if the table's alphabetical sorting > is maintained or lost. > > v2: Move "*" next to pointer name (Matt) > Include extensions_table.h instead of extensions.h (Ian) That actually does make it a lo

Re: [Mesa-dev] [Mesa-stable] [PATCH 2/2] radeonsi/compute: Use the compiler's COMPUTE_PGM_RSRC* register values

On Wed, Nov 18, 2015 at 05:43:31PM +, Emil Velikov wrote: > Hi Tom, > > Please flip the order of the patches and drop the now patch 1/2 from > the stable queue. > I'm confused about why I need to flip the order of the patches. -Tom > On 16 November 2015 at 20:03, Tom Stellard wrote: > > T

Re: [Mesa-dev] [PATCH 1.9/2] i965: Add brw_imm_uv().

On Thu, Nov 19, 2015 at 11:33 AM, Matt Turner wrote: > On Thu, Nov 19, 2015 at 9:53 AM, Matt Turner wrote: >> On Thu, Nov 19, 2015 at 8:00 AM, Jason Ekstrand wrote: >>> On Wed, Nov 18, 2015 at 2:25 PM, Matt Turner wrote: --- src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 3 +++

Re: [Mesa-dev] MESA_EXTENSION_OVERRIDE problem

On Thu, Nov 19, 2015 at 3:25 PM, Brian Paul wrote: > On 11/19/2015 01:19 PM, Ilia Mirkin wrote: >> >> On Thu, Nov 19, 2015 at 3:13 PM, Brian Paul wrote: >>> >>> Hi Nanley, >>> >>> Maybe you can fix an issue I have with the new extension code. >>> >>> Previously, I could do something like export >

Re: [Mesa-dev] [PATCH 4/4] automake: loader: don't create an empty dri3 helper

Patches 1, 3, and 4 are Reviewed-by: Matt Turner (I gave an Ack on 2 since I didn't review the list of functions) ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/4] automake: egl: add symbols test

Seems like a good plan. I haven't reviewed the list, so have an Acked-by: Matt Turner ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] MESA_EXTENSION_OVERRIDE problem

On 11/19/2015 01:19 PM, Ilia Mirkin wrote: On Thu, Nov 19, 2015 at 3:13 PM, Brian Paul wrote: Hi Nanley, Maybe you can fix an issue I have with the new extension code. Previously, I could do something like export MESA_EXTENSION_OVERRIDE="-ARB_clear_buffer_object" and I would no longer see it

Re: [Mesa-dev] [PATCH 0/9] Early fp64 fixes

For the next patches you send from Connor, please use --suppress-cc=author so that every reply doesn't generate a bounce message about his disabled @intel email. :) ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mail

Re: [Mesa-dev] MESA_EXTENSION_OVERRIDE problem

On Thu, Nov 19, 2015 at 3:13 PM, Brian Paul wrote: > Hi Nanley, > > Maybe you can fix an issue I have with the new extension code. > > Previously, I could do something like export > MESA_EXTENSION_OVERRIDE="-ARB_clear_buffer_object" and I would no longer see > it in the GL_EXTENSIONS string, even

Re: [Mesa-dev] [PATCH 7/9] i965/vec4: avoid dependency control around Align1 instructions

On Thu, Nov 19, 2015 at 3:11 PM, Matt Turner wrote: > On Thu, Nov 19, 2015 at 11:35 AM, Connor Abbott wrote: >> On Thu, Nov 19, 2015 at 2:07 PM, Connor Abbott wrote: >>> On Thu, Nov 19, 2015 at 1:54 PM, Matt Turner wrote: On Thu, Nov 19, 2015 at 7:31 AM, Connor Abbott wrote: > On Thu,

Re: [Mesa-dev] [PATCH 7/9] i965/vec4: avoid dependency control around Align1 instructions

On Thu, Nov 19, 2015 at 11:35 AM, Connor Abbott wrote: > On Thu, Nov 19, 2015 at 2:07 PM, Connor Abbott wrote: >> On Thu, Nov 19, 2015 at 1:54 PM, Matt Turner wrote: >>> On Thu, Nov 19, 2015 at 7:31 AM, Connor Abbott wrote: On Thu, Nov 19, 2015 at 6:40 AM, Matt Turner wrote: > On Thu,

[Mesa-dev] MESA_EXTENSION_OVERRIDE problem

Hi Nanley, Maybe you can fix an issue I have with the new extension code. Previously, I could do something like export MESA_EXTENSION_OVERRIDE="-ARB_clear_buffer_object" and I would no longer see it in the GL_EXTENSIONS string, even if it was an "always on" extension. Now when I try that I g

Re: [Mesa-dev] [PATCH 3/9] i965: fix 64-bit immediates in brw_inst(_set)_bits

On Thu, Nov 19, 2015 at 11:35 AM, Kristian Høgsberg wrote: > On Thu, Nov 19, 2015 at 11:24 AM, Matt Turner wrote: >> On Thu, Nov 19, 2015 at 9:30 AM, Kristian Høgsberg >> wrote: >>> On Thu, Nov 19, 2015 at 2:05 AM, Iago Toral Quiroga >>> wrote: From: Connor Abbott If we tried

Re: [Mesa-dev] [RFCv2 03/13] nir: allow pre-resolved sampler uniform locations

On Thu, Nov 19, 2015 at 2:54 PM, Rob Clark wrote: > On Mon, Nov 9, 2015 at 4:08 PM, Timothy Arceri wrote: >> On Mon, 2015-11-09 at 07:43 -0500, Rob Clark wrote: >>> On Sun, Nov 8, 2015 at 7:58 PM, Timothy Arceri >>> wrote: >>> > On Sun, 2015-11-08 at 15:12 -0500, Rob Clark wrote: >>> > > From: R

Re: [Mesa-dev] [RFCv2 03/13] nir: allow pre-resolved sampler uniform locations

On Mon, Nov 9, 2015 at 4:08 PM, Timothy Arceri wrote: > On Mon, 2015-11-09 at 07:43 -0500, Rob Clark wrote: >> On Sun, Nov 8, 2015 at 7:58 PM, Timothy Arceri >> wrote: >> > On Sun, 2015-11-08 at 15:12 -0500, Rob Clark wrote: >> > > From: Rob Clark >> > > >> > > With TGSI, the ir_variable::data.l

Re: [Mesa-dev] [PATCH v2 10/42] i965: Calculate appropriate L3 partition weights for the current pipeline state.

On Thu, Nov 19, 2015 at 4:24 AM, Francisco Jerez wrote: > Kristian Høgsberg writes: > >> On Tue, Nov 17, 2015 at 9:54 PM, Jordan Justen >> wrote: >>> From: Francisco Jerez >>> >>> This calculates a rather conservative partitioning of the L3 cache >>> based on the shaders currently bound to the

Re: [Mesa-dev] [PATCH 3/9] i965: fix 64-bit immediates in brw_inst(_set)_bits

On Thu, Nov 19, 2015 at 11:24 AM, Matt Turner wrote: > On Thu, Nov 19, 2015 at 9:30 AM, Kristian Høgsberg wrote: >> On Thu, Nov 19, 2015 at 2:05 AM, Iago Toral Quiroga >> wrote: >>> From: Connor Abbott >>> >>> If we tried to get/set something that was exactly 64 bits, we would >>> try to do (1

Re: [Mesa-dev] [PATCH 7/9] i965/vec4: avoid dependency control around Align1 instructions

On Thu, Nov 19, 2015 at 2:07 PM, Connor Abbott wrote: > On Thu, Nov 19, 2015 at 1:54 PM, Matt Turner wrote: >> On Thu, Nov 19, 2015 at 7:31 AM, Connor Abbott wrote: >>> On Thu, Nov 19, 2015 at 6:40 AM, Matt Turner wrote: On Thu, Nov 19, 2015 at 2:05 AM, Iago Toral Quiroga wrote: >>>

Re: [Mesa-dev] [PATCH 1.9/2] i965: Add brw_imm_uv().

On Thu, Nov 19, 2015 at 9:53 AM, Matt Turner wrote: > On Thu, Nov 19, 2015 at 8:00 AM, Jason Ekstrand wrote: >> On Wed, Nov 18, 2015 at 2:25 PM, Matt Turner wrote: >>> --- >>> src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 3 +++ >>> src/mesa/drivers/dri/i965/brw_reg.h| 9

Re: [Mesa-dev] [PATCH 1.9/2] i965: Add brw_imm_uv().

On Wed, Nov 18, 2015 at 2:25 PM, Matt Turner wrote: > --- > src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 3 +++ > src/mesa/drivers/dri/i965/brw_reg.h| 9 + > 2 files changed, 12 insertions(+) > > diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp > b/src/mesa/dri

Re: [Mesa-dev] [PATCH 3/9] i965: fix 64-bit immediates in brw_inst(_set)_bits

On Thu, Nov 19, 2015 at 9:30 AM, Kristian Høgsberg wrote: > On Thu, Nov 19, 2015 at 2:05 AM, Iago Toral Quiroga wrote: >> From: Connor Abbott >> >> If we tried to get/set something that was exactly 64 bits, we would >> try to do (1 << 64) - 1 to calculate the mask which doesn't give us all >> 1'

Re: [Mesa-dev] [PATCH 7/9] i965/vec4: avoid dependency control around Align1 instructions

On Thu, Nov 19, 2015 at 1:54 PM, Matt Turner wrote: > On Thu, Nov 19, 2015 at 7:31 AM, Connor Abbott wrote: >> On Thu, Nov 19, 2015 at 6:40 AM, Matt Turner wrote: >>> On Thu, Nov 19, 2015 at 2:05 AM, Iago Toral Quiroga >>> wrote: From: Connor Abbott It appears that not only mat

Re: [Mesa-dev] [PATCH] mesa: Add test for sorted extension table

On Thu, Nov 19, 2015 at 10:44 AM, Nanley Chery wrote: > From: Nanley Chery > > Enable developers to know if the table's alphabetical sorting > is maintained or lost. > > v2: Move "*" next to pointer name (Matt) > Include extensions_table.h instead of extensions.h (Ian) > Remove extra " *"

Re: [Mesa-dev] [PATCH v2 19/42] glsl ubo/ssbo: Move common code into lower_buffer_access::setup_buffer_access

On 2015-11-18 00:00:08, Iago Toral wrote: > On Tue, 2015-11-17 at 21:54 -0800, Jordan Justen wrote: > > This code will also be usable by the pass to lower shared variables. > > > > Note, that *const_offset is adjusted by setup_buffer_access so it must > > be initialized before calling setup_buffer

Re: [Mesa-dev] [PATCH 7/9] i965/vec4: avoid dependency control around Align1 instructions

On Thu, Nov 19, 2015 at 7:31 AM, Connor Abbott wrote: > On Thu, Nov 19, 2015 at 6:40 AM, Matt Turner wrote: >> On Thu, Nov 19, 2015 at 2:05 AM, Iago Toral Quiroga >> wrote: >>> From: Connor Abbott >>> >>> It appears that not only math instructions, but also MOV_BYTES or >>> any instruction tha

[Mesa-dev] [PATCH] mesa: Add test for sorted extension table

From: Nanley Chery Enable developers to know if the table's alphabetical sorting is maintained or lost. v2: Move "*" next to pointer name (Matt) Include extensions_table.h instead of extensions.h (Ian) Remove extra " *" in comment (Ian) Signed-off-by: Nanley Chery --- Does the origina

Re: [Mesa-dev] [PATCH 1.9/2] i965: Add brw_imm_uv().

On Thu, Nov 19, 2015 at 8:00 AM, Jason Ekstrand wrote: > On Wed, Nov 18, 2015 at 2:25 PM, Matt Turner wrote: >> --- >> src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 3 +++ >> src/mesa/drivers/dri/i965/brw_reg.h| 9 + >> 2 files changed, 12 insertions(+) >> >> diff --git a/

Re: [Mesa-dev] [PATCH 1/4] nouveau: move interlaced assert down in nouveau_vp3_video_buffer_create

On Thu, Nov 19, 2015 at 4:37 AM, Julien Isorce wrote: > templat->interlaced is 0 if not NV12 which is the case currently > when using VPP. > > Signed-off-by: Julien Isorce > --- > src/gallium/drivers/nouveau/nouveau_vp3_video.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --g

Re: [Mesa-dev] [PATCH 3/9] i965: fix 64-bit immediates in brw_inst(_set)_bits

On Thu, Nov 19, 2015 at 12:30 PM, Kristian Høgsberg wrote: > On Thu, Nov 19, 2015 at 2:05 AM, Iago Toral Quiroga wrote: >> From: Connor Abbott >> >> If we tried to get/set something that was exactly 64 bits, we would >> try to do (1 << 64) - 1 to calculate the mask which doesn't give us all >> 1

Re: [Mesa-dev] [PATCH 8/8 v2] i965: Enable EXT_shader_samples_identical

Jason Ekstrand writes: > On Nov 18, 2015 6:38 PM, "Ian Romanick" wrote: >> >> From: Ian Romanick >> >> v2: Handle immediate value for MCS smarter. Rebase on changes to >> nir_texop_sampels_identical (missing second parameter). Suggested by >> Jason. This still doesn't handle the 16x MSAA cas

Re: [Mesa-dev] [PATCH 1/4] automake: loader: rework the CPPFLAGS

Hey Emil, you can have my Tested-by: Kai Wasserbäch for the series. I just did a build (amd64 and i386) and didn't see the additional symbols show up again. Thanks for taking care of this! Cheers, Kai Emil Velikov wrote on 19.11.2015 17:33: > From: Emil Velikov > > Rather than duplicating

Re: [Mesa-dev] [PATCH 3/9] i965: fix 64-bit immediates in brw_inst(_set)_bits

On Thu, Nov 19, 2015 at 2:05 AM, Iago Toral Quiroga wrote: > From: Connor Abbott > > If we tried to get/set something that was exactly 64 bits, we would > try to do (1 << 64) - 1 to calculate the mask which doesn't give us all > 1's like we want. > > v2 (Iago) > - Replace ~0 by ~0ull > - Remove

Re: [Mesa-dev] [PATCH 4/4] automake: loader: don't create an empty dri3 helper

On Thu, Nov 19, 2015 at 8:33 AM, Emil Velikov wrote: > From: Emil Velikov > > Seems that creating an empty one does not fair too well with MacOSX's > ar. Considering that all the users of the helper include it only when > needed, let's reshuffle the makefile. For the series, Reviewed-by: Kristi

Re: [Mesa-dev] [PATCH] radeon/llvm: Use llvm.AMDIL.exp intrinsic again for now

On 19.11.2015 17:37, Tom Stellard wrote: On Thu, Nov 19, 2015 at 11:17:12AM +0100, Nicolai Hähnle wrote: On 19.11.2015 03:55, Tom Stellard wrote: On Thu, Nov 19, 2015 at 11:31:55AM +0900, Michel Dänzer wrote: From: Michel Dänzer llvm.exp2.f32 doesn't work in some cases yet. Bugzilla: https:

Re: [Mesa-dev] [PATCH 2/2] nv50: allow using inline vertex data submit when gl_VertexID is used

On 11/19/2015 06:02 PM, Ilia Mirkin wrote: On Thu, Nov 19, 2015 at 12:01 PM, Samuel Pitoiset wrote: On 11/19/2015 05:54 PM, Ilia Mirkin wrote: This appears to all be correct. I assume you ran piglit on this and tried a few (esp older) games? I don't know of any offhand that hit the nv50_pus

Re: [Mesa-dev] [PATCH 2/2] nv50: allow using inline vertex data submit when gl_VertexID is used

On Thu, Nov 19, 2015 at 12:01 PM, Samuel Pitoiset wrote: > On 11/19/2015 05:54 PM, Ilia Mirkin wrote: >> >> This appears to all be correct. I assume you ran piglit on this and >> tried a few (esp older) games? I don't know of any offhand that hit >> the nv50_push logic, but I'd feel more at ease i

Re: [Mesa-dev] [PATCH 2/2] nv50: allow using inline vertex data submit when gl_VertexID is used

On 11/19/2015 05:54 PM, Ilia Mirkin wrote: This appears to all be correct. I assume you ran piglit on this and tried a few (esp older) games? I don't know of any offhand that hit the nv50_push logic, but I'd feel more at ease if you just tried a couple. Yes, I did a full piglit run, there ar

Re: [Mesa-dev] [PATCH 1/2] nv50: add NV84_3D macro

On 11/19/2015 05:44 PM, Ilia Mirkin wrote: Reviewed-by: Ilia Mirkin Thanks for touching up the existing uses of this :) I was going to ask you to do it, pleasantly surprised that you did it without asking. I'm glad to hear that from you. :) On Thu, Nov 19, 2015 at 3:51 AM, Samuel Pitoise

Re: [Mesa-dev] [PATCH 2/2] nv50: allow using inline vertex data submit when gl_VertexID is used

This appears to all be correct. I assume you ran piglit on this and tried a few (esp older) games? I don't know of any offhand that hit the nv50_push logic, but I'd feel more at ease if you just tried a couple. Reviewed-by: Ilia Mirkin On Thu, Nov 19, 2015 at 3:51 AM, Samuel Pitoiset wrote: > T

Re: [Mesa-dev] [PATCH 1/2] nv50: add NV84_3D macro

Reviewed-by: Ilia Mirkin Thanks for touching up the existing uses of this :) I was going to ask you to do it, pleasantly surprised that you did it without asking. On Thu, Nov 19, 2015 at 3:51 AM, Samuel Pitoiset wrote: > Signed-off-by: Samuel Pitoiset > --- > src/gallium/drivers/nouveau/nv50/

Re: [Mesa-dev] [PATCH] radeon/llvm: Use llvm.AMDIL.exp intrinsic again for now

On Thu, Nov 19, 2015 at 11:17:12AM +0100, Nicolai Hähnle wrote: > On 19.11.2015 03:55, Tom Stellard wrote: > >On Thu, Nov 19, 2015 at 11:31:55AM +0900, Michel Dänzer wrote: > >>From: Michel Dänzer > >> > >>llvm.exp2.f32 doesn't work in some cases yet. > >> > >>Bugzilla: https://bugs.freedesktop.or

Re: [Mesa-dev] [PATCH 4/4] automake: loader: don't create an empty dri3 helper

On 19 November 2015 at 16:33, Emil Velikov wrote: > From: Emil Velikov > > Seems that creating an empty one does not fair too well with MacOSX's > ar. Considering that all the users of the helper include it only when > needed, let's reshuffle the makefile. > Forgot to mention - the cause is guess

[Mesa-dev] [PATCH 4/4] automake: loader: don't create an empty dri3 helper

From: Emil Velikov Seems that creating an empty one does not fair too well with MacOSX's ar. Considering that all the users of the helper include it only when needed, let's reshuffle the makefile. Cc: Vinson Lee Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92985 Signed-off-by: Emil Ve

[Mesa-dev] [PATCH 2/4] automake: egl: add symbols test

From: Emil Velikov Should help us catch issues where we expose any extra symbols by mistake. Just like the ones fixes with previous commit. Signed-off-by: Emil Velikov --- Ideally we'll check all symbols (not only the T ones) and parse out the private symbols such as _init, _fini and others.

[Mesa-dev] [PATCH 1/4] automake: loader: rework the CPPFLAGS

From: Emil Velikov Rather than duplicating things, just use the generic AM_CPPFLAGS. This has the fortunate side-effect of adding VISIBILITY_CFLAGS for the dri3 helper. The latter of which was erroneously exposing some internal symbols. Cc: Kai Wasserbäch Reported-by: Kai Wasserbäch Signed-off

[Mesa-dev] [PATCH 3/4] automake: loader: honour the XCB_DRI3 cflags

From: Emil Velikov Without this the compilation will fail, as the headers are installed in a non-default location. Signed-off-by: Emil Velikov --- src/loader/Makefile.am | 1 + 1 file changed, 1 insertion(+) diff --git a/src/loader/Makefile.am b/src/loader/Makefile.am index 67ed776..5daa42e 1

Re: [Mesa-dev] [PATCH] radeon: ensure that timing/profiling queries are suspended on flush

Reviewed-by: Marek Olšák Marek On Wed, Nov 18, 2015 at 6:45 PM, Nicolai Hähnle wrote: > The queries_suspended_for_flush flag is redundant because suspended queries > are not removed from their respective linked list. > --- > src/gallium/drivers/radeon/r600_pipe_common.c | 13 ++--- > s

Re: [Mesa-dev] [PATCH] [v3] i965/skl: skip fast clears for certain surface formats

On Wed 18 Nov 2015, Pohjolainen, Topi wrote: > On Tue, Nov 17, 2015 at 05:31:12PM -0800, Ben Widawsky wrote: > > Some of the information originally in this commit message is now in the > > patch > > before this. > > > > SKL adds compressible render targets and as a result mutates some of the > > p

Re: [Mesa-dev] [PATCH 1.9/2] i965: Add brw_imm_uv().

On Wed, Nov 18, 2015 at 2:25 PM, Matt Turner wrote: > --- > src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 3 +++ > src/mesa/drivers/dri/i965/brw_reg.h| 9 + > 2 files changed, 12 insertions(+) > > diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp > b/src/mesa/dri

Re: [Mesa-dev] [PATCH 7/7] [v2] i965/gen9: Support fast clears for 32b float

Ben Widawsky writes: > Two formats are explicitly disabled because they fail piglit tests, > LUMINANCE16F and INTENSITY16F. There is some question about the > validity of sampling from these surfaces for all gens, however, there > seem to be no other failures, so I'd prefer to leave tackling that

Re: [Mesa-dev] [PATCH 0/9] Early fp64 fixes

On Thu, Nov 19, 2015 at 5:05 AM, Iago Toral Quiroga wrote: > These patches are fixes extracted from Connor's fp64 branch that > I would like to review and land ahead of the rest. They are > independent of the rest of the series, some of them are even > general fixes unrelated to fp64 that could fi

Re: [Mesa-dev] [PATCH 4/5] blit: Don't take into account the Mesa format when checking MSRT blit

On Thu, Nov 19, 2015 at 4:25 PM, Neil Roberts wrote: > According to the GLES3 spec, blitting between multisample FBOs with > different internal formats should not be allowed. The > compatible_resolve_formats function implements this check. Previously > it had a shortcut where if the Mesa formats o

Re: [Mesa-dev] [PATCH 7/9] i965/vec4: avoid dependency control around Align1 instructions

On Thu, Nov 19, 2015 at 10:31 AM, Connor Abbott wrote: > On Thu, Nov 19, 2015 at 6:40 AM, Matt Turner wrote: >> On Thu, Nov 19, 2015 at 2:05 AM, Iago Toral Quiroga >> wrote: >>> From: Connor Abbott >>> >>> It appears that not only math instructions, but also MOV_BYTES or >>> any instruction th

Re: [Mesa-dev] [PATCH 7/9] i965/vec4: avoid dependency control around Align1 instructions

On Thu, Nov 19, 2015 at 6:40 AM, Matt Turner wrote: > On Thu, Nov 19, 2015 at 2:05 AM, Iago Toral Quiroga wrote: >> From: Connor Abbott >> >> It appears that not only math instructions, but also MOV_BYTES or >> any instruction that uses Align1 mode cannot be in the middle >> of a dependency cont

[Mesa-dev] [PATCH 3/5] i965: Check base format to determine whether to use tiled memcpy

The tiled memcpy doesn't work for copying from RGBX to RGBA because it doesn't override the alpha component to 1.0. Commit 2cebaac479d4 added a check to disable it for RGBX formats by looking at the TexFormat. However a lot of the rest of the code base is written with the assumption that an RGBA te

[Mesa-dev] [PATCH 5/5] i965/gen9: Don't allow the RGBX formats for texturing/rendering

The RGBX surface formats aren't renderable so we internally remap them to RGBA when rendering. They are retained as RGBX when used as textures. However since the previous patch fast clears are disabled for surfaces that use a different format for rendering than for texturing. To avoid this situatio

[Mesa-dev] [PATCH 1/5] i965/gen9: Don't disallow fast clear for MSRT formats matching render

Previously fast clear was disallowed on Gen9 for MSRTs with the claim that some formats don't work but we didn't understand why. On further investigation it seems the formats that don't work are the ones where the render surface format is being overriden to a different format than the one used for

[Mesa-dev] [PATCH 2/5] i965/gen8: Allow rendering to B8G8R8X8

Since Gen8 this is allowed as a rendering target so we don't need to override it to B8G8R8A8. This is helpful on Gen9+ where using this override causes fast clears not to work. --- src/mesa/drivers/dri/i965/brw_surface_formats.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff

[Mesa-dev] [PATCH 4/5] blit: Don't take into account the Mesa format when checking MSRT blit

According to the GLES3 spec, blitting between multisample FBOs with different internal formats should not be allowed. The compatible_resolve_formats function implements this check. Previously it had a shortcut where if the Mesa formats of the two renderbuffers were the same then it would assume the

Re: [Mesa-dev] [PATCH 2/9] i965/fs: print writemask_all when it's enabled

I think Ken already pushed a similar patch so we can drop this. On Thu, Nov 19, 2015 at 5:05 AM, Iago Toral Quiroga wrote: > From: Connor Abbott > > Reviewed-by: Iago Toral Quiroga > --- > src/mesa/drivers/dri/i965/brw_fs.cpp | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/src/mesa

Re: [Mesa-dev] [PATCH 0/8] Implement EXT_shader_samples_identical

On 19 November 2015 at 14:53, Ilia Mirkin wrote: > On Thu, Nov 19, 2015 at 9:47 AM, Emil Velikov > wrote: >> Hi Ian, >> >> Attempting to high-jack the thread :-P >> >> On 18 November 2015 at 23:46, Ian Romanick wrote: >> >>> I really wanted to get this in the next Mesa release. For some reason

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