On Wednesday, October 21, 2015 03:58:08 PM Matt Turner wrote:
> Inspired by a bug this summer, I've written a basic assembly validation
> pass. The series currently checks only three things:
>
>- that instruction sources are not null (when they shouldn't be);
>- that the Gen supports the i
On Wednesday, October 21, 2015 03:58:17 PM Matt Turner wrote:
> ---
> src/mesa/drivers/dri/i965/brw_eu_validate.c | 244
>
> 1 file changed, 244 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_eu_validate.c
> b/src/mesa/drivers/dri/i965/brw_eu_validate.
On Tue, Nov 3, 2015 at 10:44 PM, Kenneth Graunke wrote:
> On Tuesday, November 03, 2015 10:20:26 PM Matt Turner wrote:
>> On Tue, Nov 3, 2015 at 9:47 PM, Kenneth Graunke
>> wrote:
>> > On Wednesday, October 21, 2015 03:58:14 PM Matt Turner wrote:
>> >> Will allow annotations to contain error mes
On Tuesday, November 03, 2015 10:20:26 PM Matt Turner wrote:
> On Tue, Nov 3, 2015 at 9:47 PM, Kenneth Graunke wrote:
> > On Wednesday, October 21, 2015 03:58:14 PM Matt Turner wrote:
> >> Will allow annotations to contain error messages (indicating an
> >> instruction violates a rule for instance
On Tue, Nov 3, 2015 at 10:20 PM, Matt Turner wrote:
> On Tue, Nov 3, 2015 at 9:47 PM, Kenneth Graunke wrote:
>> But this isn't safe when i = 0, as cur will be out of bounds...
>
> I don't think so. The code as-is might be tricky, but I think it's correct --
>
>>> + if (annotation->ann[i].off
On Tue, Nov 3, 2015 at 10:21 PM, Kenneth Graunke wrote:
> On Wednesday, October 21, 2015 03:58:16 PM Matt Turner wrote:
>> ---
>> src/mesa/drivers/dri/i965/brw_eu_validate.c | 257
>>
>> 1 file changed, 257 insertions(+)
>>
>> diff --git a/src/mesa/drivers/dri/i965/b
On Tue, Nov 3, 2015 at 10:14 PM, Kenneth Graunke wrote:
> On Wednesday, October 21, 2015 03:58:15 PM Matt Turner wrote:
>> Initially just checks that sources are non-NULL, which would have
>> alerted us to the problem fixed by commit 6c846dc5.
>> ---
>> src/mesa/drivers/dri/i965/Makefile.sources
On Wednesday, October 21, 2015 03:58:16 PM Matt Turner wrote:
> ---
> src/mesa/drivers/dri/i965/brw_eu_validate.c | 257
>
> 1 file changed, 257 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_eu_validate.c
> b/src/mesa/drivers/dri/i965/brw_eu_validate.
On Tue, Nov 3, 2015 at 9:47 PM, Kenneth Graunke wrote:
> On Wednesday, October 21, 2015 03:58:14 PM Matt Turner wrote:
>> Will allow annotations to contain error messages (indicating an
>> instruction violates a rule for instance) that are printed after the
>> disassembly of the block.
>> ---
>>
On Wednesday, October 21, 2015 03:58:15 PM Matt Turner wrote:
> Initially just checks that sources are non-NULL, which would have
> alerted us to the problem fixed by commit 6c846dc5.
> ---
> src/mesa/drivers/dri/i965/Makefile.sources | 1 +
> src/mesa/drivers/dri/i965/brw_eu.h
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/nouveau/nouveau_context.h | 4
src/gallium/drivers/nouveau/nouveau_screen.c| 19 +++
src/gallium/drivers/nouveau/nv30/nv30_context.c | 1 +
src/gallium/drivers/nouveau/nv50/nv50_context.c | 1 +
src/gallium/drivers/n
Signed-off-by: Ilia Mirkin
---
src/mesa/state_tracker/st_manager.c | 56 +
1 file changed, 56 insertions(+)
diff --git a/src/mesa/state_tracker/st_manager.c
b/src/mesa/state_tracker/st_manager.c
index 7abd128..c38c11d 100644
--- a/src/mesa/state_tracker/st_ma
This will allow gallium drivers to send messages to KHR_debug endpoints
Signed-off-by: Ilia Mirkin
---
src/gallium/auxiliary/util/u_debug.c | 14 ++
src/gallium/auxiliary/util/u_debug.h | 20
src/gallium/docs/source/context.rst | 3 +++
src/gallium/include/pipe
I believe I've addressed the various feedback -- I've reduced the
pipe-side types to a more manageable quantity, renamed the debug info
struct to debug callback, and added a few comments. An earlier version
of the st/clover patch was tested too.
Ilia Mirkin (6):
gallium: expose a debug message c
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/nouveau/nouveau_buffer.c | 13 +++--
src/gallium/drivers/nouveau/nouveau_context.h| 1 +
src/gallium/drivers/nouveau/nouveau_fence.c | 14 --
src/gallium/drivers/nouveau/nouveau_fence.h | 4 +++-
src/galliu
Signed-off-by: Ilia Mirkin
---
src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 1 +
src/gallium/drivers/nouveau/codegen/nv50_ir_target.cpp | 2 ++
src/gallium/drivers/nouveau/nv50/nv50_program.c| 8 +++-
src/gallium/drivers/nouveau/nv50/nv50_program.h| 3 ++-
src/gall
Signed-off-by: Ilia Mirkin
[ Francisco Jerez: Clean up clover::context interface by passing
around a function object. ]
---
src/gallium/state_trackers/clover/api/context.cpp | 7 ++-
src/gallium/state_trackers/clover/core/context.cpp | 5 +++--
src/gallium/state_trackers/clover/core/con
On Wednesday, October 21, 2015 03:58:14 PM Matt Turner wrote:
> Will allow annotations to contain error messages (indicating an
> instruction violates a rule for instance) that are printed after the
> disassembly of the block.
> ---
> src/mesa/drivers/dri/i965/intel_asm_annotation.c | 60
> ++
---
docs/envvars.html | 2 ++
1 file changed, 2 insertions(+)
diff --git a/docs/envvars.html b/docs/envvars.html
index bdfe999..173c941 100644
--- a/docs/envvars.html
+++ b/docs/envvars.html
@@ -179,6 +179,8 @@ Mesa EGL supports different sets of environment variables.
See the
GALLIUM_HUD - dr
- env GALLIUM_HUD_VISIBLE: control default visibility
- env GALLIUM_HUD_SIGNAL_TOGGLE: toggle visibility via signal
---
Thanks for the feedback.
I believe all the suggested changes have been implemented.
One note, all the logic except for the toggle was already in hud_create() and
not hud_draw().
On 11/04/2015 06:30 AM, Tapani Pälli wrote:
On 11/04/2015 05:51 AM, Timothy Arceri wrote:
SSBO support now exists.
Yes, program resource support for SSBO is done;
Reviewed-by: Tapani Pälli
resources themselves already got added by
9b477ad49d3f82503a1b8ba23dedfc05cd848fe8
and then rest h
Reviewed-by: Tapani Pälli
On 11/04/2015 05:42 AM, Timothy Arceri wrote:
Over looked in 763cd8c080353.
---
src/glsl/linker.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index 9dcc2a7..c1e4efb 100644
--- a/src/glsl/linker.cp
Thanks for fixing that! Both patches are
Reviewed-by: Jason Ekstrand
On Tue, Nov 3, 2015 at 5:19 PM, Kenneth Graunke wrote:
> It doesn't actually operate on variables.
> ---
> src/glsl/Makefile.sources | 2 +-
> src/glsl/nir/nir_live_variables.c | 297
>
On Tue, Nov 3, 2015 at 7:32 PM, Kenneth Graunke wrote:
> The scalar VS backend has never handled float[] and vec2[] outputs
> correctly (my original code was broken). Outputs need to be padded
> out to vec4 slots.
>
> In fs_visitor::nir_setup_outputs(), we tried to process each vec4 slot
> by loo
On Tuesday, November 03, 2015 01:23:13 PM Matt Turner wrote:
> On Mon, Oct 26, 2015 at 5:08 AM, Pohjolainen, Topi
> wrote:
> > On Wed, Oct 21, 2015 at 03:58:13PM -0700, Matt Turner wrote:
> >> Often annotations are identical between sets of consecutive
> >> instructions. We can perhaps avoid some
On 11/04/2015 05:51 AM, Timothy Arceri wrote:
SSBO support now exists.
Yes, program resource support for SSBO is done;
Reviewed-by: Tapani Pälli
---
src/glsl/linker.cpp | 5 -
1 file changed, 5 deletions(-)
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index c1e4efb..26c029
Presumably this was fixed by commit f408a13dd30?
If so, and Samuel/Tapani confirm,
Acked-by: Matt Turner
(Would be nice to mention the commit sha in the commit message as well)
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.free
SSBO support now exists.
---
src/glsl/linker.cpp | 5 -
1 file changed, 5 deletions(-)
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index c1e4efb..26c0298 100644
--- a/src/glsl/linker.cpp
+++ b/src/glsl/linker.cpp
@@ -3800,11 +3800,6 @@ build_program_resource_list(struct gl_shader_p
Over looked in 763cd8c080353.
---
src/glsl/linker.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index 9dcc2a7..c1e4efb 100644
--- a/src/glsl/linker.cpp
+++ b/src/glsl/linker.cpp
@@ -3776,7 +3776,8 @@ build_program_resource_list(
The scalar VS backend has never handled float[] and vec2[] outputs
correctly (my original code was broken). Outputs need to be padded
out to vec4 slots.
In fs_visitor::nir_setup_outputs(), we tried to process each vec4 slot
by looping from 0 to ALIGN(type_size_scalar(type), 4) / 4. However,
this
On Tue, Nov 3, 2015 at 6:47 PM, Marek Olšák wrote:
> From: Marek Olšák
>
> ---
> src/gallium/drivers/radeonsi/si_blit.c | 55
> ++
> 1 file changed, 55 insertions(+)
>
> diff --git a/src/gallium/drivers/radeonsi/si_blit.c
> b/src/gallium/drivers/radeonsi/si_blit
On Tue, 2015-11-03 at 20:42 -0500, Ilia Mirkin wrote:
> On Tue, Nov 3, 2015 at 8:23 PM, Timothy Arceri
> wrote:
> > On Wed, 2015-11-04 at 12:12 +1100, Timothy Arceri wrote:
> > > On Tue, 2015-11-03 at 19:39 -0500, Ilia Mirkin wrote:
> > > > On Tue, Nov 3, 2015 at 7:31 PM, Timothy Arceri
> > > > w
Ok I'm convinced enough it's not worth bothering about the (mostly
minimal) performance impact and pushed this (a slightly altered version).
Thanks!
Roland
Am 03.11.2015 um 09:36 schrieb Oded Gabbay:
> There are currently two methods in llvmpipe code to calculate coeffs to
> be used as inputs for
On Tue, Nov 3, 2015 at 8:23 PM, Timothy Arceri
wrote:
> On Wed, 2015-11-04 at 12:12 +1100, Timothy Arceri wrote:
>> On Tue, 2015-11-03 at 19:39 -0500, Ilia Mirkin wrote:
>> > On Tue, Nov 3, 2015 at 7:31 PM, Timothy Arceri
>> > wrote:
>> > > On Tue, 2015-11-03 at 19:21 -0500, Ilia Mirkin wrote:
>>
Timothy Arceri writes:
> V3: clamp array index to the correct size (the size of the current array
> rather than the inner array) Francisco Jerez.
>
> V2: avoid useless zero-initialization and addition for the first AoA level,
> avoid redundant temporary, make use of type_size_scalar(), rename aoa
On Wed, 2015-11-04 at 12:12 +1100, Timothy Arceri wrote:
> On Tue, 2015-11-03 at 19:39 -0500, Ilia Mirkin wrote:
> > On Tue, Nov 3, 2015 at 7:31 PM, Timothy Arceri
> > wrote:
> > > On Tue, 2015-11-03 at 19:21 -0500, Ilia Mirkin wrote:
> > > > I'm still unclear what problem you're trying to solve h
This computes liveness of SSA values, not nir_variables.
Signed-off-by: Kenneth Graunke
---
src/glsl/nir/nir.h| 4 ++--
src/glsl/nir/nir_from_ssa.c | 2 +-
src/glsl/nir/nir_live_variables.c | 12 ++--
src/glsl/nir/nir_lower_glob
It doesn't actually operate on variables.
---
src/glsl/Makefile.sources | 2 +-
src/glsl/nir/nir_live_variables.c | 297 --
src/glsl/nir/nir_liveness.c | 297 ++
3 files changed, 298 insertions(+), 298 deletion
On Tue, 2015-11-03 at 19:39 -0500, Ilia Mirkin wrote:
> On Tue, Nov 3, 2015 at 7:31 PM, Timothy Arceri
> wrote:
> > On Tue, 2015-11-03 at 19:21 -0500, Ilia Mirkin wrote:
> > > I'm still unclear what problem you're trying to solve here? What's
> > > wrong with having b[1] = b[1]?
> >
> > There is
Francisco Jerez writes:
> Connor Abbott writes:
>
>> Hi all,
>>
>> While working on FP64 for i965, there's an issue that I thought of
>> with the vec4 backend that I'm not sure how to resolve. From what I
>> understand, the execmask works the same way in Align16 mode as Align1
>> mode, except th
On Tue, Nov 3, 2015 at 4:46 PM, Ben Widawsky wrote:
> On Tue, Oct 13, 2015 at 09:14:29PM -0700, Matt Turner wrote:
>> On Tue, Oct 13, 2015 at 9:12 PM, Matt Turner wrote:
>> > On Tue, Oct 13, 2015 at 8:50 PM, Ben Widawsky
>> > wrote:
>> >> The impetus for this patch comes from a seemingly benign
On Tue, Oct 13, 2015 at 09:14:29PM -0700, Matt Turner wrote:
> On Tue, Oct 13, 2015 at 9:12 PM, Matt Turner wrote:
> > On Tue, Oct 13, 2015 at 8:50 PM, Ben Widawsky
> > wrote:
> >> The impetus for this patch comes from a seemingly benign statement within
> >> the
> >> spec (quoted within the pat
On Tue, Nov 3, 2015 at 7:31 PM, Timothy Arceri wrote:
> On Tue, 2015-11-03 at 19:21 -0500, Ilia Mirkin wrote:
>> I'm still unclear what problem you're trying to solve here? What's
>> wrong with having b[1] = b[1]?
>
> There is nothing wrong with it, but nir seems to expect this type of
> assignmen
When working on tessellation shaders, I created some vec4 virtual
opcodes for creating message headers through a sequence like:
mov(8) g7<1>UD 0xUD{ align1 WE_all 1Q compacted };
mov(1) g7.5<1>UD0x0100UD{ align1 WE_all };
mov(1) g7<1>UD g0<0,1,0>UD {
On Tue, 2015-11-03 at 19:21 -0500, Ilia Mirkin wrote:
> I'm still unclear what problem you're trying to solve here? What's
> wrong with having b[1] = b[1]?
There is nothing wrong with it, but nir seems to expect this type of
assignment to be optimised out and hits an assert if its not. Its removed
On Fri, Oct 16, 2015 at 04:05:22PM -0700, Chad Versace wrote:
> On Tue 13 Oct 2015, Ben Widawsky wrote:
> > Initially I had this planned as a patch to be squashed in to the enabling
> > patch
> > because there is no point enabling fast clears without this. However, Chad
> > merged a patch which di
I'm still unclear what problem you're trying to solve here? What's
wrong with having b[1] = b[1]?
On Tue, Nov 3, 2015 at 7:19 PM, Timothy Arceri wrote:
> On Mon, 2015-11-02 at 03:27 -0500, Ilia Mirkin wrote:
>> On Sun, Nov 1, 2015 at 3:33 AM, Timothy Arceri
>> wrote:
>> > Handles the case with f
On Mon, 2015-11-02 at 03:27 -0500, Ilia Mirkin wrote:
> On Sun, Nov 1, 2015 at 3:33 AM, Timothy Arceri
> wrote:
> > Handles the case with function inout params where array elements
> > do an assignment to themselves e.g.
> >
> > void array_mod(inout int b[2])
> > {
> > b[0] = int(2);
> >
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_blit.c | 55 ++
1 file changed, 55 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_blit.c
b/src/gallium/drivers/radeonsi/si_blit.c
index fce014a..e934146 100644
--- a/src/gallium/drivers/radeonsi/s
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_cp_dma.c | 90 ++--
1 file changed, 85 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c
b/src/gallium/drivers/radeonsi/si_cp_dma.c
index e6aa9ca..641a6d1 100644
--- a/src/galliu
From: Marek Olšák
There are a few non-stoney changes too.
---
src/gallium/drivers/radeonsi/sid.h | 322 +
1 file changed, 322 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/sid.h
b/src/gallium/drivers/radeonsi/sid.h
index 49d8e2c..3a5101a 100644
---
From: Marek Olšák
This should improve performance for big copies that need to be split.
---
src/gallium/drivers/radeonsi/si_cp_dma.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c
b/src/gallium/drivers/radeonsi/si_cp_dma.c
inde
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_cp_dma.c | 51 ++--
1 file changed, 23 insertions(+), 28 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c
b/src/gallium/drivers/radeonsi/si_cp_dma.c
index c563644..4cdde29 100644
--- a/src/galli
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_cp_dma.c | 71 +++-
1 file changed, 34 insertions(+), 37 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c
b/src/gallium/drivers/radeonsi/si_cp_dma.c
index 4cdde29..e6aa9ca 100644
--- a/src/galli
If the constructor fails before the lists are initialized the deconstructor
will fail.
This patch is a bit of a kludge fix to just avoid the undefined behaviour. The
real fix down the road would be to avoid calling the deconstructor if the
constructor failed at all.
Tom
From 3cf2f8e32b7093c
On Wed, Oct 28, 2015 at 5:25 PM, Ilia Mirkin wrote:
> On Sun, Oct 25, 2015 at 1:25 PM, Marek Olšák wrote:
>> +static void
>> +st_CopyImageSubData(struct gl_context *ctx,
>> +struct gl_texture_image *src_image,
>> +struct gl_renderbuffer *src_renderbuffer,
>
On Fri, Oct 16, 2015 at 04:10:02PM -0700, Chad Versace wrote:
> But this patch doesn't enable fast clears! The reverts in pathches 6 and
> 7 need to be folded into this patch, otherwise the patch does not do
> what it claims.
>
> Also, you can't enable fast clears before patches 4 and 5 without in
For these nir intrinsics, we emit the same code as
nir_intrinsic_memory_barrier:
* nir_intrinsic_memory_barrier_atomic_counter
* nir_intrinsic_memory_barrier_buffer
* nir_intrinsic_memory_barrier_image
We treat these nir intrinsics as no-ops:
* nir_intrinsic_group_memory_barrier
* nir_intri
When these functions are called in glsl-ir, we create a corresponding
nir intrinsic function call.
Signed-off-by: Jordan Justen
---
src/glsl/nir/glsl_to_nir.cpp | 15 +++
src/glsl/nir/nir_intrinsics.h | 11 +++
2 files changed, 26 insertions(+)
diff --git a/src/glsl/nir/gls
When these functions are called in GLSL code, we create an intrinsic
function call:
* groupMemoryBarrier => __intrinsic_group_memory_barrier
* memoryBarrierAtomicCounter => __intrinsic_memory_barrier_atomic_counter
* memoryBarrierBuffer => __intrinsic_memory_barrier_buffer
* memoryBarrierImage
On Fri, Oct 30, 2015 at 6:02 PM, Connor Abbott wrote:
> Before, we simply assumed that reducing register pressure was the number
> one priority in the pre-RA scheduler, and set the latency of every
> instruction to 1 to get the scheduler to ignore it. But for the
> aggressive scheduler, this doesn
V3: clamp array index to the correct size (the size of the current array
rather than the inner array) Francisco Jerez.
V2: avoid useless zero-initialization and addition for the first AoA level,
avoid redundant temporary, make use of type_size_scalar(), rename aoa_size
to element_size, assign the
On Tue, Nov 3, 2015 at 12:16 AM, Kenneth Graunke wrote:
> On Wednesday, October 28, 2015 02:32:00 PM Jason Ekstrand wrote:
>> This series adds a nir_pass datastructure and some helpers for managing
>> optimization and lowering passes. I've been meaning to get around to this
>> for some time. The
Reviewed-by: Kristian Høgsberg
---
src/glsl/nir/nir.h| 4 ++--
src/glsl/nir/nir_algebraic.py | 38 +-
2 files changed, 15 insertions(+), 27 deletions(-)
diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
index 5242112..beca805 100644
--- a/src/g
Cc: Rob Clark
Reviewed-by: Kristian Høgsberg
---
src/gallium/drivers/freedreno/ir3/ir3_nir.h | 2 +-
.../drivers/freedreno/ir3/ir3_nir_lower_if_else.c | 21 +
2 files changed, 6 insertions(+), 17 deletions(-)
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_nir.
Reviewed-by: Kristian Høgsberg
v2: (Jason Ekstrand):
- Make run_pass take a nir_shader** to allow for nir_shader_clone testing
v3: (Jason Ekstrand):
- Switch back to taking a nir_shader*
- Rework run_pass a bit with suggestions from Ken
- Add a NIR_DECL_PASS macro
---
src/glsl/nir/nir.h
Reviewed-by: Kristian Høgsberg
---
src/glsl/nir/nir.h | 3 +--
src/glsl/nir/nir_lower_phis_to_scalar.c | 26 +-
2 files changed, 14 insertions(+), 15 deletions(-)
diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
index b18f1d6..a8ed3f8 100644
---
Reviewed-by: Kristian Høgsberg
---
src/glsl/nir/nir.h | 3 +-
src/glsl/nir/nir_lower_alu_to_scalar.c | 57 --
2 files changed, 36 insertions(+), 24 deletions(-)
diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
index f2d01e9..b18f1d6 100644
Reviewed-by: Kristian Høgsberg
---
src/glsl/nir/nir.h | 2 +-
src/glsl/nir/nir_lower_vars_to_ssa.c | 17 +
2 files changed, 6 insertions(+), 13 deletions(-)
diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
index a8ed3f8..517b7f8 100644
--- a/src/glsl/nir/ni
Reviewed-by: Kristian Høgsberg
---
.../drivers/freedreno/ir3/ir3_compiler_nir.c | 2 +-
src/gallium/drivers/vc4/vc4_program.c | 2 +-
src/glsl/nir/nir.h | 9 +++--
src/glsl/nir/nir_opt_copy_propagate.c | 18 +
In particular, this commit adds it for:
- nir_opt_constant_folding
- nir_opt_dead_cf
- nor_opt_peephole_select
- nir_opt_remove_phis
- nir_opt_undef
Reviewed-by: Kristian Høgsberg
---
src/glsl/nir/nir.h | 14 +-
src/glsl/nir/nir_opt_constant_folding.c | 22 +
We're about to put more pass management stuff in here so it needs a better
name.
Reviewed-by: Kristian Høgsberg
---
src/glsl/Makefile.sources | 2 +-
src/glsl/nir/nir_metadata.c | 54 -
src/glsl/nir/nir_pass.c | 54 ++
Reviewed-by: Kristian Høgsberg
---
src/glsl/nir/nir.h| 2 --
src/glsl/nir/nir_opt_copy_propagate.c | 2 +-
src/glsl/nir/nir_opt_dce.c| 2 +-
3 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
index 1d3e281..f2d01e
Reviewed-by: Jason Ekstrand
On Tue, Nov 3, 2015 at 12:19 PM, Eduardo Lima Mitev wrote:
> On 11/03/2015 09:31 AM, Kenneth Graunke wrote:
>> Signed-off-by: Kenneth Graunke
>> ---
>> src/glsl/nir/nir_opt_remove_phis.c | 5 +
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/src/glsl/nir/n
Reviewed-by: Jason Ekstrand
On Tue, Nov 3, 2015 at 12:31 AM, Kenneth Graunke wrote:
> Signed-off-by: Kenneth Graunke
> ---
> src/glsl/nir/nir_lower_vec_to_movs.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/src/glsl/nir/nir_lower_vec_to_movs.c
> b/src/glsl/nir/nir_lower_vec_t
On Tue, Nov 3, 2015 at 12:31 AM, Kenneth Graunke wrote:
> We can't preserve dominance or live variable information.
>
> This also begs the question: what about globals? Metadata only exists
> at the nir_function_impl level, so it would seem there is no metadata
> about global variables for us to
Reviewed-by: Jason Ekstrand
On Tue, Nov 3, 2015 at 12:31 AM, Kenneth Graunke wrote:
> Signed-off-by: Kenneth Graunke
> ---
> src/glsl/nir/nir_split_var_copies.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/src/glsl/nir/nir_split_var_copies.c
> b/src/glsl/nir/nir_split_var_cop
On Tue, Nov 3, 2015 at 12:31 AM, Kenneth Graunke wrote:
> Signed-off-by: Kenneth Graunke
> ---
> src/glsl/nir/nir_lower_global_vars_to_local.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/src/glsl/nir/nir_lower_global_vars_to_local.c
> b/src/glsl/nir/nir_lower_global_vars_to_local
Reviewed-by: Jason Ekstrand
On Tue, Nov 3, 2015 at 12:31 AM, Kenneth Graunke wrote:
> Signed-off-by: Kenneth Graunke
> ---
> src/glsl/nir/nir_opt_copy_propagate.c | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/src/glsl/nir/nir_opt_copy_propagate.c
> b/src/glsl/nir/nir_opt_copy
---
src/mesa/drivers/dri/i965/brw_vec4.h | 4 +++-
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 27 ++
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 12
3 files changed, 30 insertions(+), 13 deletions(-)
diff --git a/src/mesa/drivers/dri/i965
---
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 8bc21df..6155274 100644
--- a/src/mesa/drivers/dri
---
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs.cpp| 47 +++--
src/mesa/drivers/dri/i965/brw_fs.h | 4 ++-
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs_nir.cpp
Separate textures and samplers are something that a lot of hardware
supports. Our hardware in particular has done this ever since the original
i965 chips. Part of this is because DX has made it a requirement for some
time now. GL allows you to expose it sort-of but weasel-words it enough
that yo
---
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 20 ++--
2 files changed, 15 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index 8058b34..b06a069 10064
This commit adds the capability to NIR to support separate textures and
samplers. As it currently stands, glsl_to_nir only sets the sampler and
leaves the texture alone as it did before and nir_lower_samplers assumes
this. However, backends can, if they wish, assume that they are separate
because
On Mon, Oct 26, 2015 at 5:08 AM, Pohjolainen, Topi
wrote:
> On Wed, Oct 21, 2015 at 03:58:13PM -0700, Matt Turner wrote:
>> Often annotations are identical between sets of consecutive
>> instructions. We can perhaps avoid some memory allocations by reusing
>> the previous annotation.
>> ---
>> sr
Series is:
Reviewed-by: Ilia Mirkin
On Tue, Nov 3, 2015 at 4:04 PM, Samuel Pitoiset
wrote:
> To get the size (in bytes) of a compute parameter, clover first calls
> get_compute_param() with a NULL data pointer. The RET() macro is based
> on nv50.
>
> Changes since v2:
> - get rid of ul suffixes
On Saturday, October 31, 2015 02:22:47 PM Matt Turner wrote:
> ---
> src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 30
> +++---
> 1 file changed, 18 insertions(+), 12 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
> b/src/mesa/drivers/dri/i96
To get the size (in bytes) of a compute parameter, clover first calls
get_compute_param() with a NULL data pointer. The RET() macro is based
on nv50.
Changes since v2:
- get rid of ul suffixes when they are unnecessary
Signed-off-by: Samuel Pitoiset
---
src/gallium/drivers/nouveau/nvc0/nvc0_scr
This fixes crashes with some piglit OpenCL tests.
Changes since v2:
- get rid of ul suffixes when they are unnecessary
Signed-off-by: Samuel Pitoiset
---
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/src/gallium/dr
On Tue, Nov 3, 2015 at 5:16 AM, Francisco Jerez wrote:
> Matt Turner writes:
>
>> This reverts commit bbf8239f92ecd79431dfa41402e1c85318e7267f.
>>
>> I didn't like that commit to begin with -- computing things at compile
>> time is fine -- but for purposes of verifying that the resulting values
>
On 11/03/2015 09:31 AM, Kenneth Graunke wrote:
> We can't preserve dominance or live variable information.
>
> This also begs the question: what about globals? Metadata only exists
> at the nir_function_impl level, so it would seem there is no metadata
> about global variables for us to invalidat
On 11/03/2015 09:31 AM, Kenneth Graunke wrote:
> Signed-off-by: Kenneth Graunke
> ---
> src/glsl/nir/nir_opt_remove_phis.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/src/glsl/nir/nir_opt_remove_phis.c
> b/src/glsl/nir/nir_opt_remove_phis.c
> index 5bdf7ef..66d3754 100644
> --
On Tue, Nov 3, 2015 at 12:13 PM, Matt Turner wrote:
> On Tue, Nov 3, 2015 at 12:09 PM, Ilia Mirkin wrote:
>> On Tue, Nov 3, 2015 at 3:00 PM, Matt Turner wrote:
>>> On Tue, Nov 3, 2015 at 5:48 AM, Francisco Jerez
>>> wrote:
Matt Turner writes:
> Generated by
>
>sed -i
On Tue, Nov 3, 2015 at 12:09 PM, Ilia Mirkin wrote:
> On Tue, Nov 3, 2015 at 3:00 PM, Matt Turner wrote:
>> On Tue, Nov 3, 2015 at 5:48 AM, Francisco Jerez
>> wrote:
>>> Matt Turner writes:
>>>
Generated by
sed -i -e 's/\.bits\././g' *.c *.h *.cpp
sed -i -e 's/dw1\.//
On Tue, Nov 3, 2015 at 3:00 PM, Matt Turner wrote:
> On Tue, Nov 3, 2015 at 5:48 AM, Francisco Jerez wrote:
>> Matt Turner writes:
>>
>>> Generated by
>>>
>>>sed -i -e 's/\.bits\././g' *.c *.h *.cpp
>>>sed -i -e 's/dw1\.//g' *.c *.h *.cpp
>>>
>>> and then reverting changes to comments in
On Tue, Nov 3, 2015 at 5:48 AM, Francisco Jerez wrote:
> Matt Turner writes:
>
>> Generated by
>>
>>sed -i -e 's/\.bits\././g' *.c *.h *.cpp
>>sed -i -e 's/dw1\.//g' *.c *.h *.cpp
>>
>> and then reverting changes to comments in gen7_blorp.cpp and
>> brw_fs_generator.cpp.
>>
>> There wasn'
Connor Abbott writes:
> Hi all,
>
> While working on FP64 for i965, there's an issue that I thought of
> with the vec4 backend that I'm not sure how to resolve. From what I
> understand, the execmask works the same way in Align16 mode as Align1
> mode, except that you only use the first 8 channel
Ian, any comment on this?
On Fri, Sep 25, 2015 at 1:32 PM, Ilia Mirkin wrote:
> Hi Ian (and other spec experts),
>
> The ARB_ssbo spec mentions the following:
>
> OpenGL 4.0 (either core or compatibility profile) is required.
>
> ...
>
> Additionally, the shading language provides the mem
The subject line should have something like "st/omx: ...".
Apart from that the patch is Reviewed-by: Christian König
Regards,
Christian.
On 03.11.2015 19:06, StDenis, Tom wrote:
Now with the correct email address ...
Cheers,
Tom
---
1 - 100 of 171 matches
Mail list logo
