Re: [Mesa-dev] [PATCH 2/2] i965: Set Y-tiling for qualified rotated scanout buffers

On Fri, Oct 23, 2015 at 06:19:02PM -0700, Vivek Kasireddy wrote: > On Thu, 22 Oct 2015 21:12:02 -0700 > Ben Widawsky wrote: > > > On Thu, Oct 22, 2015 at 06:44:53PM -0700, Vivek Kasireddy wrote: > > > On newer hardware platforms that support rotation, if the gbm > > > interface requests to create

[Mesa-dev] [PATCH] i965/vec4: Eliminate the vec4_generator class altogether.

We really weren't taking advantage of vec4_generator being a class. By adding a "p" parameter to the helper methods, and "prog_data" to ones which need binding table information, we can convert everything to static functions. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_vec4_

[Mesa-dev] [PATCH 2/4] i965/vec4: Wrap vec4_generator in a C function.

vec4_generator is a class for convenience, but only exports a single method as its public API. It makes much more sense to just export a single function. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_vec4.cpp| 6 +++--- src/mesa/drivers/dri/i965/brw_vec4.h

[Mesa-dev] [PATCH 1/4] i965/vec4: Convert src_reg/dst_reg to brw_reg at the end of the visitor.

This patch makes the visitor convert registers to the HW_REG file at the very end, after register allocation, post-RA scheduling, and dependency control flagging. After that, everything is in fixed brw_regs. This simplifies the code generator, as it can just use the hardware registers rather than

[Mesa-dev] [PATCH 3/4] i965/vec4: Move vec4_generator class definition into the .cpp file.

The public API for the generator is brw_vec4_generate_code(); nobody actually needs to use the class. This means we can extend it without triggering the recompiles associated with altering brw_vec4.h. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_vec4.h | 111

Re: [Mesa-dev] [PATCH 1/2] gbm: Add a flag to enable creation of rotated scanout buffers

On Fri, 23 Oct 2015 15:29:08 +0300 Ville Syrjälä wrote: > On Fri, Oct 23, 2015 at 12:18:39PM +0900, Michel Dänzer wrote: > > On 23.10.2015 10:44, Vivek Kasireddy wrote: > > > For certain platforms that support rotated scanout buffers, > > > currently, there is no way to create them with the GBM D

Re: [Mesa-dev] [PATCH 2/2] i965: Set Y-tiling for qualified rotated scanout buffers

On Thu, 22 Oct 2015 21:12:02 -0700 Ben Widawsky wrote: > On Thu, Oct 22, 2015 at 06:44:53PM -0700, Vivek Kasireddy wrote: > > On newer hardware platforms that support rotation, if the gbm > > interface requests to create a rotated scanout buffer via the > > flag __DRI_IMAGE_USE_SCANOUT_ROTATED_90

Re: [Mesa-dev] [PATCH 1/2] gbm: Add a flag to enable creation of rotated scanout buffers

On Fri, 23 Oct 2015 12:18:39 +0900 Michel Dänzer wrote: > On 23.10.2015 10:44, Vivek Kasireddy wrote: > > For certain platforms that support rotated scanout buffers, > > currently, there is no way to create them with the GBM DRI > > interface. This flag will instruct the DRI driver to create the

Re: [Mesa-dev] [PATCH] i965: Remove unused devinfo revision

On Fri, Oct 23, 2015 at 3:13 PM, Ben Widawsky wrote: > On Fri, Oct 23, 2015 at 02:38:39PM -0700, Ben Widawsky wrote: >> I left the function to obtain the revision because it is, and will continue >> to >> be useful in the future. I'd rather not have to dig it up every time we need >> it. Seems

[Mesa-dev] [PATCH v4] radeonsi: Implement DCC fast clear.

Uses the DCC buffer instead of the CMASK buffer. The ELIMINATE_FAST_CLEAR still works. Furthermore, with DCC compression we can directly clear to a limited set of colors such that we do not need a postprocessing step. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeon/r600_texture.c

Re: [Mesa-dev] [PATCH 18/20] i965: Program the push constants state using the gather table

Abdiel Janulgue writes: > Use the gather table generated from the uniform uploads and > ir_binop_ubo_load to gather and pack the constants to the gather pool. > > Note that the 3DSTATE_CONSTANT_* packet now refers to the gather > pool generated by the resource streamer instead of the constant buf

Re: [Mesa-dev] [PATCH] radeonsi: add Stoney to si_init_gs_info()

Reviewed-by: Marek Olšák Marek On Sat, Oct 24, 2015 at 12:33 AM, Alex Deucher wrote: > This patch was originally written before stoney support > was merged. Add stoney. > > Signed-off-by: Alex Deucher > --- > src/gallium/drivers/radeonsi/si_pipe.c | 1 + > 1 file changed, 1 insertion(+) > >

Re: [Mesa-dev] [RFC 09/21] mesa: Generate a helper function for each extension

On Thu, Oct 22, 2015 at 11:30 AM, Chad Versace wrote: > On Mon 19 Oct 2015, Nanley Chery wrote: > > From: Nanley Chery > > > > Generate functions which determine if an extension is supported in the > > current context. Initially, enums were going to be explicitly used with > > _mesa_extension_su

[Mesa-dev] [PATCH] radeonsi: add Stoney to si_init_gs_info()

This patch was originally written before stoney support was merged. Add stoney. Signed-off-by: Alex Deucher --- src/gallium/drivers/radeonsi/si_pipe.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index e6537

Re: [Mesa-dev] [PATCH] i965: Remove unused devinfo revision

On Fri, Oct 23, 2015 at 02:38:39PM -0700, Ben Widawsky wrote: > I left the function to obtain the revision because it is, and will continue to > be useful in the future. I'd rather not have to dig it up every time we need > it. > Comments left at the implementation to say as much. > Added locall

Re: [Mesa-dev] [RFC 15/21] mesa: Fix EXT_texture_sRGB functionality leaks

On Thu, Oct 22, 2015 at 12:15 PM, Chad Versace wrote: > On Mon 19 Oct 2015, Nanley Chery wrote: > > From: Nanley Chery > > > > Stop leaks into the following contexts: > >* GLES in _mesa_base_tex_format() and lookup_view_class(). > >* Pre-1.1 GL legacy contexts in all uses. > > > > Stop a

Re: [Mesa-dev] [PATCH 2/2] radeonsi: add Stoney pci ids

Reviewed-by: Marek Olšák Marek On Thu, Oct 22, 2015 at 6:09 PM, Alex Deucher wrote: > From: Samuel Li > > Signed-off-by: Samuel Li > --- > include/pci_ids/radeonsi_pci_ids.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/include/pci_ids/radeonsi_pci_ids.h > b/include/pci_ids/rad

Re: [Mesa-dev] [PATCH 1/2] radeonsi: add support for Stoney asics (v3)

Reviewed-by: Marek Olšák Marek On Fri, Oct 23, 2015 at 6:49 PM, Alex Deucher wrote: > From: Samuel Li > > v2 (agd): rebase on mesa master, split pci ids to > separate commit > v3 (agd): use carrizo for llvm processor name for > llvm 3.7 and older > > Signed-off-by: Samuel Li > --- > src/gall

[Mesa-dev] [PATCH] i965: Remove unused devinfo revision

I left the function to obtain the revision because it is, and will continue to be useful in the future. I'd rather not have to dig it up every time we need it. Comments left at the implementation to say as much. Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/brw_device_info.c | 2 +-

Re: [Mesa-dev] [RFC 17/21] mesa: Fix ARB_ES3_compatibility functionality leaks

On Tue, Oct 20, 2015 at 4:32 PM, Nanley Chery wrote: > > > On Tue, Oct 20, 2015 at 8:45 AM, Marek Olšák wrote: > >> NAK. I'd like this extension in compatibility contexts. The fact the >> spec requires OpenGL 3.3 was just authors' laziness. >> >> > If it's the right thing to do, I can allow all

Re: [Mesa-dev] [PATCH v3 5/7] radeonsi: Implement DCC fast clear.

On Fri, Oct 23, 2015 at 7:06 PM, Bas Nieuwenhuizen wrote: > On Fri, Oct 23, 2015 at 4:57 PM, Marek Olšák wrote: >> On Fri, Oct 23, 2015 at 1:57 PM, Bas Nieuwenhuizen >> wrote: >>> On Fri, Oct 23, 2015 at 1:52 PM, Marek Olšák wrote: On Fri, Oct 23, 2015 at 1:30 PM, Bas Nieuwenhuizen w

[Mesa-dev] [PATCH] gallivm: disable f16c when not using AVX

From: Roland Scheidegger f16c intrinsic can only be emitted when AVX is used. So when we disable AVX due to forcing 128bit vectors we must not use this intrinsic (depending on llvm version, this worked previously because llvm used AVX even when we didn't tell it to, however I've seen this fail wi

[Mesa-dev] [PATCH 2/4] radeon/uvd: implement and add flag for VAAPI HEVC decode

From: Boyuan Zhang Signed-off-by: Boyuan Zhang Reviewed-by: Christian König Reviewed-by: Leo Liu --- src/gallium/drivers/radeon/radeon_uvd.c | 7 +++ src/gallium/drivers/radeon/radeon_uvd.h | 9 + 2 files changed, 16 insertions(+) diff --git a/src/gallium/drivers/radeon/radeon_uv

[Mesa-dev] [PATCH 4/4] st/vdpau: disable RefPicList for Vdpau HEVC

From: Boyuan Zhang Signed-off-by: Boyuan Zhang Reviewed-by: Christian König Reviewed-by: Leo Liu --- src/gallium/state_trackers/vdpau/decode.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/state_trackers/vdpau/decode.c b/src/gallium/state_trackers/vdpau/decode.c index 32337

[Mesa-dev] [PATCH 3/4] st/va: add VAAPI HEVC decode support

From: Boyuan Zhang Signed-off-by: Boyuan Zhang Reviewed-by: Christian König Reviewed-by: Leo Liu --- configure.ac | 2 +- src/gallium/state_trackers/va/config.c | 2 +- src/gallium/state_trackers/va/context.c| 20 src/gallium/state_trackers/va/p

[Mesa-dev] [PATCH 1/4] vl: add RefPicList defines for VAAPI HEVC decode

From: Boyuan Zhang Signed-off-by: Boyuan Zhang Reviewed-by: Christian König Reviewed-by: Leo Liu --- src/gallium/include/pipe/p_video_state.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gallium/include/pipe/p_video_state.h b/src/gallium/include/pipe/p_video_state.h index 7d1315

[Mesa-dev] [PATCH 0/4] HEVC support for VA-API

The series support HEVC codec for VA-API and fix for VDPAU they are tested with the latest ffmpeg and gstreamer-vaapi plugins. Boyuan Zhang (4): vl: add RefPicList defines for VAAPI HEVC decode radeon/uvd: implement and add flag for VAAPI HEVC decode st/va: add VAAPI HEVC decode support s

Re: [Mesa-dev] [PATCH 11/20] i965/fs: Append uniform entries to the gather table

On Fri, Oct 23, 2015 at 12:38 PM, Francisco Jerez wrote: > Matt Turner writes: > >> On Fri, Oct 23, 2015 at 11:23 AM, Francisco Jerez >> wrote: >>> Abdiel Janulgue writes: >>> This patch generates the gather table entries for ordinary uniforms if they are present. The uniform constan

Re: [Mesa-dev] [PATCH 11/20] i965/fs: Append uniform entries to the gather table

Matt Turner writes: > On Fri, Oct 23, 2015 at 11:23 AM, Francisco Jerez > wrote: >> Abdiel Janulgue writes: >> >>> This patch generates the gather table entries for ordinary uniforms >>> if they are present. The uniform constants here will later be packed >>> together with UBO constants. >>> >

Re: [Mesa-dev] [RFC 18/21] mesa/extensions: Remove extra memsets on gl_extensions

On 2015-10-22 03:32:58, Emil Velikov wrote: > On 19 October 2015 at 23:44, Nanley Chery wrote: > > From: Nanley Chery > > > > Aside from those modified in this commit, all gl_extensions structs are > > zero-initialized by default. There is therefore no need to memset the > > structs to 0. Also, r

Re: [Mesa-dev] [RFC 18/21] mesa/extensions: Remove extra memsets on gl_extensions

On Thu, Oct 22, 2015 at 3:32 AM, Emil Velikov wrote: > On 19 October 2015 at 23:44, Nanley Chery wrote: > > From: Nanley Chery > > > > Aside from those modified in this commit, all gl_extensions structs are > > zero-initialized by default. There is therefore no need to memset the > > structs to

Re: [Mesa-dev] [PATCH 11/20] i965/fs: Append uniform entries to the gather table

On Fri, Oct 23, 2015 at 11:23 AM, Francisco Jerez wrote: > Abdiel Janulgue writes: > >> This patch generates the gather table entries for ordinary uniforms >> if they are present. The uniform constants here will later be packed >> together with UBO constants. >> >> Signed-off-by: Abdiel Janulgue

[Mesa-dev] [PATCH 2/2] [v3] i965/skl: PCI ID cleanup and brand strings

A few new PCI ids are added here, and two are removed (0x190B, 0x192A) because it no longer seems to exist anywhere. v2: Update commit message to reflect the removal of 0x192a as well. Only use ascii characters (Ilia) v3: I misinterpreted the table. I don't actually know the brand strings for GT4

Re: [Mesa-dev] [PATCH 11/20] i965/fs: Append uniform entries to the gather table

Abdiel Janulgue writes: > This patch generates the gather table entries for ordinary uniforms > if they are present. The uniform constants here will later be packed > together with UBO constants. > > Signed-off-by: Abdiel Janulgue > --- > src/mesa/drivers/dri/i965/brw_fs.cpp | 18 ++

Re: [Mesa-dev] [PATCH 2/3] util: Add list_is_single() helper function

On 10/23/2015 08:00 PM, Jason Ekstrand wrote: > On Fri, Oct 23, 2015 at 10:51 AM, Matt Turner wrote: >> On Fri, Oct 23, 2015 at 8:55 AM, Eduardo Lima Mitev wrote: >>> Returns true is the list has exactly one element, otherwise returns false. >>> --- >>> src/util/list.h | 8 >>> 1 file c

Re: [Mesa-dev] [PATCH 2/3] util: Add list_is_single() helper function

On 10/23/2015 07:51 PM, Matt Turner wrote: > On Fri, Oct 23, 2015 at 8:55 AM, Eduardo Lima Mitev wrote: >> Returns true is the list has exactly one element, otherwise returns false. >> --- >> src/util/list.h | 8 >> 1 file changed, 8 insertions(+) >> >> diff --git a/src/util/list.h b/src

[Mesa-dev] [PATCH 2/2] [v2] i965/skl: PCI ID cleanup and brand strings

A few new PCI ids are added here, and two are removed (0x190B, 0x192A) because it no longer seems to exist anywhere. v2: Update commit message to reflect the removal of 0x192a as well. Only use ascii characters (Ilia) Signed-off-by: Ben Widawsky --- include/pci_ids/i965_pci_ids.h | 41 +

[Mesa-dev] [PATCH 1/2] [v2] i965/skl: Add GT4 PCI IDs

Like other gen8+ hardware, the hardware automatically scales up thread counts and URB sizes, so there is no need to do anything but add the PCI IDs. FINISHME: This patch still needs testing before merge. v2: Remove the PCI ID removal. That should be done as part of the next patch. Cc: mesa-sta..

Re: [Mesa-dev] [PATCH 2/3] util: Add list_is_single() helper function

On Fri, Oct 23, 2015 at 10:51 AM, Matt Turner wrote: > On Fri, Oct 23, 2015 at 8:55 AM, Eduardo Lima Mitev wrote: >> Returns true is the list has exactly one element, otherwise returns false. >> --- >> src/util/list.h | 8 >> 1 file changed, 8 insertions(+) >> >> diff --git a/src/util/l

[Mesa-dev] [PATCH 1/2] intel: Add SKL GT4 PCI IDs

Cc: Kristian Høgsberg Cc: Damien Lespiau Signed-off-by: Ben Widawsky --- intel/intel_chipset.h | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h index 253ea71..6c8dc73 100644 --- a/intel/intel_chipset.h +++ b/intel/int

[Mesa-dev] [PATCH 2/2] intel: Cleanup SKL PCI ID definitions.

This removes ones which aren't used 0x190b, 192a), and adds some new ones. I kept the original names where possible. Cc: Kristian Høgsberg Cc: Damien Lespiau Signed-off-by: Ben Widawsky --- intel/intel_chipset.h | 46 ++ 1 file changed, 26 insertions

Re: [Mesa-dev] [PATCH 2/2] i965/skl: PCI ID cleanup and brand strings

On Fri, Oct 23, 2015 at 01:44:38PM -0400, Ilia Mirkin wrote: > On Fri, Oct 23, 2015 at 1:37 PM, Ben Widawsky > wrote: > > A few new PCI ids are added here, and one is removed (0x190B) because it no > > longer seems to exist anywhere. > > > > Signed-off-by: Ben Widawsky > > --- > > include/pci_id

Re: [Mesa-dev] [PATCH 10/20] i965: Include UBO parameter sizes in push constant parameters

Abdiel Janulgue writes: > Now that we consider UBO constants as push constants, we need to include > the sizes of the UBO's constant slots in the visitor's uniform slot sizes. > This information is needed to properly pack vector constants tightly next to > each other. > > Signed-off-by: Abdiel Ja

Re: [Mesa-dev] [PATCH 1/2] i965/skl: Add GT4 PCI IDs

On Fri, Oct 23, 2015 at 10:37:29AM -0700, Ben Widawsky wrote: > Like other gen8+ hardware, the hardware automatically scales up thread counts > and URB sizes, so there is no need to do anything but add the PCI IDs. > > FINISHME: This patch still needs testing before merge. > > Cc: mesa-sta...@lis

Re: [Mesa-dev] [RFC 05/21] mesa/extensions: Add extension::version

On Thu, Oct 22, 2015 at 11:02 AM, Chad Versace wrote: > On Mon 19 Oct 2015, Nanley Chery wrote: > > From: Nanley Chery > > > > Enable limiting advertised extension support by context version with > > finer granularity. GLuint is chosen over smaller datatypes because, > > when this field is event

Re: [Mesa-dev] [RFC 05/21] mesa/extensions: Add extension::version

On Thu, Oct 22, 2015 at 3:17 AM, Emil Velikov wrote: > On 19 October 2015 at 23:36, Nanley Chery wrote: > > From: Nanley Chery > > > > Enable limiting advertised extension support by context version with > > finer granularity. GLuint is chosen over smaller datatypes because, > > when this field

Re: [Mesa-dev] [PATCH 2/3] util: Add list_is_single() helper function

On Fri, Oct 23, 2015 at 8:55 AM, Eduardo Lima Mitev wrote: > Returns true is the list has exactly one element, otherwise returns false. > --- > src/util/list.h | 8 > 1 file changed, 8 insertions(+) > > diff --git a/src/util/list.h b/src/util/list.h > index b98ce59..2b03461 100644 > ---

Re: [Mesa-dev] [RFC 10/21] mesa: Remove equality check in helper functions

On Wed, Oct 21, 2015 at 11:43 PM, Erik Faye-Lund wrote: > On Tue, Oct 20, 2015 at 12:44 AM, Nanley Chery > wrote: > > From: Nanley Chery > > > > Since the version numbers being compared are integral and we don't ever > > expect gl_context::Version to be equal to 0, subtract 1 from the rhs of >

Re: [Mesa-dev] [PATCH 2/2] i965/skl: PCI ID cleanup and brand strings

On Fri, Oct 23, 2015 at 1:37 PM, Ben Widawsky wrote: > A few new PCI ids are added here, and one is removed (0x190B) because it no > longer seems to exist anywhere. > > Signed-off-by: Ben Widawsky > --- > include/pci_ids/i965_pci_ids.h | 40 ++-- > 1 file chan

[Mesa-dev] [PATCH 2/2] i965/skl: PCI ID cleanup and brand strings

A few new PCI ids are added here, and one is removed (0x190B) because it no longer seems to exist anywhere. Signed-off-by: Ben Widawsky --- include/pci_ids/i965_pci_ids.h | 40 ++-- 1 file changed, 22 insertions(+), 18 deletions(-) diff --git a/include/pci_id

[Mesa-dev] [PATCH 1/2] i965/skl: Add GT4 PCI IDs

Like other gen8+ hardware, the hardware automatically scales up thread counts and URB sizes, so there is no need to do anything but add the PCI IDs. FINISHME: This patch still needs testing before merge. Cc: mesa-sta...@lists.freedesktop.org Signed-off-by: Ben Widawsky --- include/pci_ids/i965_

Re: [Mesa-dev] [PATCH 07/20] i965: Assign hw-binding table index for uniform constant buffer block

Abdiel Janulgue writes: > Assign the uploaded uniform block with hardware binding table indices. > This is indexed by the resource streamer to fetch the constant buffers > referred to by our gather table entries. > > Signed-off-by: Abdiel Janulgue > --- > src/mesa/drivers/dri/i965/gen6_vs_state

Re: [Mesa-dev] [PATCH 06/20] i965: Assign hw-binding table index for each UBO constant buffer.

Abdiel Janulgue writes: > To be able to refer to a constant buffer, the resource streamer needs > to index it with a hardware binding table entry. This blankets the ubo > buffers with hardware binding table indices. > > Gather constants hardware fetches in 16-entry binding table blocks. > So we n

Re: [Mesa-dev] [PATCH v3 5/7] radeonsi: Implement DCC fast clear.

On Fri, Oct 23, 2015 at 4:57 PM, Marek Olšák wrote: > On Fri, Oct 23, 2015 at 1:57 PM, Bas Nieuwenhuizen > wrote: >> On Fri, Oct 23, 2015 at 1:52 PM, Marek Olšák wrote: >>> On Fri, Oct 23, 2015 at 1:30 PM, Bas Nieuwenhuizen >>> wrote: On Fri, Oct 23, 2015 at 12:50 PM, Marek Olšák wrote: >

Re: [Mesa-dev] [PATCH 05/20] i965: Store gather table information in the program data

Abdiel Janulgue writes: > The resource streamer is able to gather and pack sparsely-located > constant data from any buffer object by a referring to a gather table > This patch adds support for keeping track of these constant data > fetches into a gather table. > > The gather table is generated f

[Mesa-dev] [PATCH 1/2] radeonsi: add support for Stoney asics (v3)

From: Samuel Li v2 (agd): rebase on mesa master, split pci ids to separate commit v3 (agd): use carrizo for llvm processor name for llvm 3.7 and older Signed-off-by: Samuel Li --- src/gallium/drivers/radeon/r600_pipe_common.c | 6 ++ src/gallium/drivers/radeon/radeon_winsys.h| 1 + src

Re: [Mesa-dev] [PATCH 2/3] i965/fs: Make emit_uniformize a no-op for immediates

On Fri, Oct 23, 2015 at 5:38 AM, Francisco Jerez wrote: > Kristian Høgsberg writes: > >> On Tue, Oct 20, 2015 at 11:56 AM, Francisco Jerez >> wrote: >>> Kristian Høgsberg writes: >>> On Tue, Oct 20, 2015 at 3:16 AM, Francisco Jerez wrote: > Kristian Høgsberg writes: >

Re: [Mesa-dev] [PATCH 3/3] i965/nir/opt_peephole_ffma: Bypass fusion if any operand of fadd and fmul is a const

On 10/23/2015 06:22 PM, Patrick Baggett wrote: > > > On Fri, Oct 23, 2015 at 10:55 AM, Eduardo Lima Mitev > wrote: > > When both fadd and fmul instructions have at least one operand that is a > constant and it is only used once, the total number of instructions

Re: [Mesa-dev] [PATCH 0/2] Nir: Allow CSE of SSBO loads

On Thu, Oct 22, 2015 at 11:13 PM, Iago Toral wrote: > On Thu, 2015-10-22 at 09:09 -0700, Jason Ekstrand wrote: >> On Thu, Oct 22, 2015 at 4:21 AM, Iago Toral Quiroga >> wrote: >> > I implemented this first as a separate optimization pass in GLSL IR [1], >> > but >> > Curro pointed out that this

Re: [Mesa-dev] [PATCH 3/3] i965/nir/opt_peephole_ffma: Bypass fusion if any operand of fadd and fmul is a const

On Fri, Oct 23, 2015 at 10:55 AM, Eduardo Lima Mitev wrote: > When both fadd and fmul instructions have at least one operand that is a > constant and it is only used once, the total number of instructions can > be reduced from 3 (1 ffma + 2 load_const) to 2 (1 fmul + 1 fadd); because > the consta

Re: [Mesa-dev] [PATCH] i965/vec4: check opcode on vec4_instruction::reads_flag(channel)

On 23/10/15 17:46, Kenneth Graunke wrote: > On Friday, October 23, 2015 04:04:35 PM Alejandro Piñeiro wrote: >> Commit f17b78 added an alternative reads_flag(channel) that returned >> if the instruction was reading a specific channel flag. By mistake it >> only took into account the predicate, but

[Mesa-dev] [PATCH 2/3] util: Add list_is_single() helper function

Returns true is the list has exactly one element, otherwise returns false. --- src/util/list.h | 8 1 file changed, 8 insertions(+) diff --git a/src/util/list.h b/src/util/list.h index b98ce59..2b03461 100644 --- a/src/util/list.h +++ b/src/util/list.h @@ -99,6 +99,14 @@ static inline bo

[Mesa-dev] [PATCH 3/3] i965/nir/opt_peephole_ffma: Bypass fusion if any operand of fadd and fmul is a const

When both fadd and fmul instructions have at least one operand that is a constant and it is only used once, the total number of instructions can be reduced from 3 (1 ffma + 2 load_const) to 2 (1 fmul + 1 fadd); because the constants will be progagated as immediate operands of fmul and fadd. This p

Re: [Mesa-dev] [PATCH 04/20] i965: Allocate space on the gather pool for UBO entries

Francisco Jerez writes: > Abdiel Janulgue writes: > >> If there are UBO constant entries, append them to >> stage_state->push_const_size. >> The gather pool contains the combined entries of both ordinary uniforms >> and UBO constants. >> >> Signed-off-by: Abdiel Janulgue >> --- >> src/mesa/dr

Re: [Mesa-dev] [PATCH] i965/vec4: check opcode on vec4_instruction::reads_flag(channel)

On Friday, October 23, 2015 04:04:35 PM Alejandro Piñeiro wrote: > Commit f17b78 added an alternative reads_flag(channel) that returned > if the instruction was reading a specific channel flag. By mistake it > only took into account the predicate, but when the opcode is > VS_OPCODE_UNPACK_FLAGS_SIM

Re: [Mesa-dev] [PATCH 04/20] i965: Allocate space on the gather pool for UBO entries

Abdiel Janulgue writes: > If there are UBO constant entries, append them to > stage_state->push_const_size. > The gather pool contains the combined entries of both ordinary uniforms > and UBO constants. > > Signed-off-by: Abdiel Janulgue > --- > src/mesa/drivers/dri/i965/gen6_vs_state.c | 20 +

Re: [Mesa-dev] [PATCH 4/4] gallivm: fix tex offsets with mirror repeat linear

On 22/10/15 23:42, srol...@vmware.com wrote: From: Roland Scheidegger Can't see why anyone would ever want to use this, but it was clearly broken. This fixes the piglit texwrap offset test using this combination. --- src/gallium/auxiliary/gallivm/lp_bld_sample_soa.c | 9 + 1 file cha

Re: [Mesa-dev] [PATCH 03/20] i965: Allocate space on the gather pool for plain uniforms

Francisco Jerez writes: > Abdiel Janulgue writes: > >> Reserve space in the gather pool where the gathered uniforms are flushed. >> >> Signed-off-by: Abdiel Janulgue >> --- >> src/mesa/drivers/dri/i965/gen6_vs_state.c | 8 >> 1 file changed, 8 insertions(+) >> >> diff --git a/src/mesa

Re: [Mesa-dev] [PATCH 1/2] radeonsi: add support for Stoney asics (v2)

On Fri, Oct 23, 2015 at 5:11 PM, Alex Deucher wrote: > On Thu, Oct 22, 2015 at 10:44 PM, Michel Dänzer wrote: >> On 23.10.2015 01:09, Alex Deucher wrote: >>> From: Samuel Li >>> >>> v2 (agd): rebase on mesa master, split pci ids to >>> separate commit >>> >>> Signed-off-by: Samuel Li >> >> [...

Re: [Mesa-dev] [PATCH 03/20] i965: Allocate space on the gather pool for plain uniforms

Abdiel Janulgue writes: > Reserve space in the gather pool where the gathered uniforms are flushed. > > Signed-off-by: Abdiel Janulgue > --- > src/mesa/drivers/dri/i965/gen6_vs_state.c | 8 > 1 file changed, 8 insertions(+) > > diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c >

Re: [Mesa-dev] [PATCH 1/2] radeonsi: add support for Stoney asics (v2)

On Thu, Oct 22, 2015 at 10:44 PM, Michel Dänzer wrote: > On 23.10.2015 01:09, Alex Deucher wrote: >> From: Samuel Li >> >> v2 (agd): rebase on mesa master, split pci ids to >> separate commit >> >> Signed-off-by: Samuel Li > > [...] > >> @@ -540,6 +541,7 @@ const char *r600_get_llvm_processor_na

[Mesa-dev] [Bug 92626] [BYT] piglit glx@glx-query-drawable subtests failing

https://bugs.freedesktop.org/show_bug.cgi?id=92626 Jairo Miramontes changed: What|Removed |Added Component|GLX |Drivers/DRI/i965 Assignee|m

Re: [Mesa-dev] [PATCH v3 5/7] radeonsi: Implement DCC fast clear.

On Fri, Oct 23, 2015 at 1:57 PM, Bas Nieuwenhuizen wrote: > On Fri, Oct 23, 2015 at 1:52 PM, Marek Olšák wrote: >> On Fri, Oct 23, 2015 at 1:30 PM, Bas Nieuwenhuizen >> wrote: >>> On Fri, Oct 23, 2015 at 12:50 PM, Marek Olšák wrote: On Fri, Oct 23, 2015 at 12:17 PM, Bas Nieuwenhuizen

[Mesa-dev] [Bug 92366] [BSW SKL] Regression: glx@glx-swap-event_async failed

https://bugs.freedesktop.org/show_bug.cgi?id=92366 Ben Widawsky changed: What|Removed |Added Status|NEW |NEEDINFO CC|

[Mesa-dev] [Bug 92634] gallium's vl_mpeg12_decoder does not work with st/va

https://bugs.freedesktop.org/show_bug.cgi?id=92634 --- Comment #6 from Christian König --- (In reply to Julien Isorce from comment #5) > Just to be sure I understand correctly, do you mean the fix should actually > be done in st/va directly, right ? Yes, calling begin_picture() should be delayed

Re: [Mesa-dev] [PATCH 02/20] i965: Enable gather push constants

Abdiel Janulgue writes: > The 3DSTATE_GATHER_POOL_ALLOC is used to enable or disable the gather > push constants feature within a context. This patch provides the toggle > functionality of using gather push constants to program constant data > within a batch. > > Using gather push constants requi

[Mesa-dev] [PATCH] i965/vec4: select predicate based on writemask for sel emissions

Equivalent to commit 4eebeb but with sel operations. In this case we select the PredCtrl based on the writemask. This change allows cmod propagation to optimize out several instructions. Shader-db numbers: total instructions in shared programs: 6235835 -> 6228008 (-0.13%) instructions in affected

[Mesa-dev] [Bug 92366] [BSW SKL] Regression: glx@glx-swap-event_async failed

https://bugs.freedesktop.org/show_bug.cgi?id=92366 cprigent changed: What|Removed |Added Summary|[BSW] Regression: |[BSW SKL] Regression: |glx@

[Mesa-dev] [PATCH] i965/vec4: check opcode on vec4_instruction::reads_flag(channel)

Commit f17b78 added an alternative reads_flag(channel) that returned if the instruction was reading a specific channel flag. By mistake it only took into account the predicate, but when the opcode is VS_OPCODE_UNPACK_FLAGS_SIMD4X2 there isn't any predicate, but the flag are used. That mistake caus

Re: [Mesa-dev] [PATCH] st/va: pass picture desc to begin and decode

On 23.10.2015 14:25, Julien Isorce wrote: At least vl_mpeg12_decoder uses the picture desc in begin_frame and decode_bitstream. https://bugs.freedesktop.org/show_bug.cgi?id=92634 Signed-off-by: Julien Isorce Reviewed-by: Christian König --- src/gallium/state_trackers/va/picture.c | 4 ++

Re: [Mesa-dev] [PATCH 2/3] i965/fs: Make emit_uniformize a no-op for immediates

Kristian Høgsberg writes: > On Tue, Oct 20, 2015 at 11:56 AM, Francisco Jerez > wrote: >> Kristian Høgsberg writes: >> >>> On Tue, Oct 20, 2015 at 3:16 AM, Francisco Jerez >>> wrote: Kristian Høgsberg writes: > On Mon, Oct 19, 2015 at 4:19 AM, Francisco Jerez > wrote: >>

Re: [Mesa-dev] [PATCH v2 0/8] SSBO optimizations

Kristian Høgsberg Kristensen writes: > Here's an updated and expanded ssbo optimization series. I found a bit > of low-hanging fruit around dynamic ssbo array indexing. I removed the > IMM shortcut in emit_uniformize() and added the constant propagation > for the read and write opcodes. The resul

Re: [Mesa-dev] [PATCH 1/2] gbm: Add a flag to enable creation of rotated scanout buffers

On Fri, Oct 23, 2015 at 12:18:39PM +0900, Michel Dänzer wrote: > On 23.10.2015 10:44, Vivek Kasireddy wrote: > > For certain platforms that support rotated scanout buffers, currently, > > there is no way to create them with the GBM DRI interface. This flag > > will instruct the DRI driver to create

[Mesa-dev] [Bug 92634] gallium's vl_mpeg12_decoder does not work with st/va

https://bugs.freedesktop.org/show_bug.cgi?id=92634 --- Comment #5 from Julien Isorce --- (In reply to Christian König from comment #4) > Please submit "st/va: pass picture desc to begin and decode" to the mesa > mailing list. That looks like a bug to me which should be fixed asap. Thx. Done sent.

[Mesa-dev] [Bug 92634] gallium's vl_mpeg12_decoder does not work with st/va

https://bugs.freedesktop.org/show_bug.cgi?id=92634 Julien Isorce changed: What|Removed |Added Attachment #119139|0 |1 is obsolete|

[Mesa-dev] [PATCH] st/va: pass picture desc to begin and decode

At least vl_mpeg12_decoder uses the picture desc in begin_frame and decode_bitstream. https://bugs.freedesktop.org/show_bug.cgi?id=92634 Signed-off-by: Julien Isorce --- src/gallium/state_trackers/va/picture.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/s

Re: [Mesa-dev] [PATCH v3 5/7] radeonsi: Implement DCC fast clear.

On Fri, Oct 23, 2015 at 1:52 PM, Marek Olšák wrote: > On Fri, Oct 23, 2015 at 1:30 PM, Bas Nieuwenhuizen > wrote: >> On Fri, Oct 23, 2015 at 12:50 PM, Marek Olšák wrote: >>> On Fri, Oct 23, 2015 at 12:17 PM, Bas Nieuwenhuizen >>> wrote: On Thu, Oct 22, 2015 at 12:12 PM, Marek Olšák wrote:

Re: [Mesa-dev] [PATCH v2 7/8] i965/fs: Optimize ssbo stores

Kristian Høgsberg Kristensen writes: > Write groups of enabled components together. > > Signed-off-by: Kristian Høgsberg Kristensen > --- > src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 56 > +++- > 1 file changed, 26 insertions(+), 30 deletions(-) > > diff --git a/src

Re: [Mesa-dev] [PATCH v3 5/7] radeonsi: Implement DCC fast clear.

On Fri, Oct 23, 2015 at 1:30 PM, Bas Nieuwenhuizen wrote: > On Fri, Oct 23, 2015 at 12:50 PM, Marek Olšák wrote: >> On Fri, Oct 23, 2015 at 12:17 PM, Bas Nieuwenhuizen >> wrote: >>> On Thu, Oct 22, 2015 at 12:12 PM, Marek Olšák wrote: > diff --git a/src/gallium/drivers/radeonsi/si_descripto

Re: [Mesa-dev] [PATCH v2 8/8] i965/fs: Allow copy propagating into new surface access opcodes

Kristian Høgsberg Kristensen writes: > Signed-off-by: Kristian Høgsberg Kristensen > --- > src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp | 15 +++ > 1 file changed, 15 insertions(+) > > diff --git a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp > b/src/mesa/drivers/

Re: [Mesa-dev] [PATCH v2 6/8] i965/fs: Drop offset_reg temporary in ssbo load

Kristian Høgsberg Kristensen writes: > Now that we don't read each component one-by-one, we don't need the > temoprary vgrf for the offset. More importantly, this register was type > UD while the nir source was type D. This broke copy propagation and left > a redundant MOV in the generated code.

Re: [Mesa-dev] [PATCH v2 5/8] i965/fs: Avoid scalar destinations in emit_uniformize()

Kristian Høgsberg writes: > On Thu, Oct 22, 2015 at 12:24 PM, Matt Turner wrote: >> On Thu, Oct 22, 2015 at 11:37 AM, Kristian Høgsberg Kristensen >> wrote: >>> The scalar destination registers break copy propagation. Instead compute >>> the results to a regular register and then reference a co

Re: [Mesa-dev] [PATCH v3 5/7] radeonsi: Implement DCC fast clear.

On Fri, Oct 23, 2015 at 12:50 PM, Marek Olšák wrote: > On Fri, Oct 23, 2015 at 12:17 PM, Bas Nieuwenhuizen > wrote: >> On Thu, Oct 22, 2015 at 12:12 PM, Marek Olšák wrote: diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c i

Re: [Mesa-dev] [PATCH 0/2] Nir: Allow CSE of SSBO loads

Connor Abbott writes: > On Thu, Oct 22, 2015 at 10:37 AM, Francisco Jerez > wrote: >> Connor Abbott writes: >> >>> On Thu, Oct 22, 2015 at 7:21 AM, Iago Toral Quiroga >>> wrote: I implemented this first as a separate optimization pass in GLSL IR [1], but Curro pointed out tha

[Mesa-dev] [Bug 92634] gallium's vl_mpeg12_decoder does not work with st/va

https://bugs.freedesktop.org/show_bug.cgi?id=92634 --- Comment #4 from Christian König --- Please submit "st/va: pass picture desc to begin and decode" to the mesa mailing list. That looks like a bug to me which should be fixed asap. Regarding "vl_mpeg12_decoder: support st/va where intra_matrix

Re: [Mesa-dev] [PATCH v3 5/7] radeonsi: Implement DCC fast clear.

On Fri, Oct 23, 2015 at 12:17 PM, Bas Nieuwenhuizen wrote: > On Thu, Oct 22, 2015 at 12:12 PM, Marek Olšák wrote: >>> diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c >>> b/src/gallium/drivers/radeonsi/si_descriptors.c >>> index 5548cba3..a277fa5 100644 >>> --- a/src/gallium/drivers/ra

Re: [Mesa-dev] [PATCH 0/7] RadeonSI: Unbind shaders properly

On Fri, Oct 23, 2015 at 5:08 AM, Michel Dänzer wrote: > On 23.10.2015 08:12, Marek Olšák wrote: >> This series unbinds shaders properly in bind_(vs/fs/etc.)_state, because any >> context can release them now, therefore we can't rely on unbinding in >> delete_shader. This is basically a fix for s

[Mesa-dev] [PATCH] gallivm: Explicitly disable unsupported CPU features.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92214 --- src/gallium/auxiliary/gallivm/lp_bld_misc.cpp | 69 --- 1 file changed, 31 insertions(+), 38 deletions(-) diff --git a/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp b/src/gallium/auxiliary/gallivm/lp_bld_mis

[Mesa-dev] [Bug 92634] gallium's vl_mpeg12_decoder does not work with st/va

https://bugs.freedesktop.org/show_bug.cgi?id=92634 --- Comment #3 from Julien Isorce --- Created attachment 119140 --> https://bugs.freedesktop.org/attachment.cgi?id=119140&action=edit vl_mpeg12_decoder: support st/va where intra_matrix can be set after begin_frame -- You are receiving this m

[Mesa-dev] [Bug 92634] gallium's vl_mpeg12_decoder does not work with st/va

https://bugs.freedesktop.org/show_bug.cgi?id=92634 --- Comment #2 from Julien Isorce --- Created attachment 119139 --> https://bugs.freedesktop.org/attachment.cgi?id=119139&action=edit st/va: pass picture desc to begin and decode -- You are receiving this mail because: You are the QA Contact

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