On Sat, Oct 3, 2015 at 12:06 AM, Kenneth Graunke wrote:
> On Friday, October 02, 2015 05:04:21 PM Ilia Mirkin wrote:
>> On Fri, Oct 2, 2015 at 4:47 PM, Ian Romanick wrote:
>> > On 10/01/2015 12:15 PM, Ilia Mirkin wrote:
>> >> On Thu, Oct 1, 2015 at 3:12 PM, Ian Romanick wrote:
>> >>> I'm just
>>
On Fri, Oct 2, 2015 at 5:57 PM, Kenneth Graunke wrote:
> Unfortunately it has to stay in gen6_gs_visitor.
Why do we still need it in gen6_gs_visitor?
> Signed-off-by: Kenneth Graunke
> ---
> src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp | 6 ++
> src/mesa/drivers/dri/i965/brw_vec4_gs_v
On Oct 2, 2015 8:51 PM, "Kenneth Graunke" wrote:
>
> On Friday, October 02, 2015 07:48:47 PM Jason Ekstrand wrote:
> > ---
> > src/mesa/drivers/dri/i965/brw_nir.c | 6 ++
> > 1 file changed, 2 insertions(+), 4 deletions(-)
> >
> > diff --git a/src/mesa/drivers/dri/i965/brw_nir.c
b/src/mesa/dr
On Friday, October 02, 2015 05:04:21 PM Ilia Mirkin wrote:
> On Fri, Oct 2, 2015 at 4:47 PM, Ian Romanick wrote:
> > On 10/01/2015 12:15 PM, Ilia Mirkin wrote:
> >> On Thu, Oct 1, 2015 at 3:12 PM, Ian Romanick wrote:
> >>> I'm just
> >>> wondering because Mesa doesn't support that extension. How
On Friday, October 02, 2015 07:48:47 PM Jason Ekstrand wrote:
> ---
> src/mesa/drivers/dri/i965/brw_nir.c | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_nir.c
> b/src/mesa/drivers/dri/i965/brw_nir.c
> index cc9430c..4f19655 100644
> -
Scratch this patch. It's not needed.
On Fri, Oct 2, 2015 at 7:48 PM, Jason Ekstrand wrote:
> ---
> src/mesa/drivers/dri/i965/brw_context.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h
> b/src/mesa/drivers/dri/i965/brw_context.h
> index 19a
---
src/mesa/drivers/dri/i965/brw_nir.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c
b/src/mesa/drivers/dri/i965/brw_nir.c
index cc9430c..4f19655 100644
--- a/src/mesa/drivers/dri/i965/brw_nir.c
+++ b/src/mesa/drivers/dri/i965/brw_n
---
src/mesa/drivers/dri/i965/brw_context.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 19a5117..e3b8d0d 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_cont
Now that everything comes in through NIR, we can pick this directly out of
the shader source and don't need to reference the gl_fragment_program.
---
src/mesa/drivers/dri/i965/brw_wm.c | 39 +++---
1 file changed, 15 insertions(+), 24 deletions(-)
diff --git a/src/
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 6 +++---
src/mesa/drivers/dri/i965/brw_nir.c| 2 +-
src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 4 ++--
4 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/src/m
This is a common enough operation that it's nice to not have to think about
the arguments to foreach_list_typed every time.
---
src/glsl/nir/nir.h | 3 +++
src/glsl/nir/nir_lower_clip.c | 4 ++--
src/glsl/nir/nir_lower_io.c | 2
https://bugs.freedesktop.org/show_bug.cgi?id=92265
Bug ID: 92265
Summary: Black windows in weston after update mesa to 11.0.2-1
Product: Mesa
Version: unspecified
Hardware: All
OS: Linux (All)
Status: NEW
https://bugs.freedesktop.org/show_bug.cgi?id=92263
Tapani Pälli changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://bugs.freedesktop.org/show_bug.cgi?id=92264
Tapani Pälli changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://bugs.freedesktop.org/show_bug.cgi?id=92264
Bug ID: 92264
Summary: [softpipe] piglit arb_direct_state_access-texunits
regression
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Linux (All)
The series is
Reviewed-by: Matt Turner
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https://bugs.freedesktop.org/show_bug.cgi?id=92263
Bug ID: 92263
Summary: [swrast] piglit gl-2.1-pbo regression
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Keywords: bis
I'm not sure if this is correct or if we should just return NULL in
this case like the "case" statement above that does.
Marek
On Sat, Oct 3, 2015 at 12:48 AM, Emil Velikov wrote:
> Otherwise the user has no way of using it, and we'll try to access the
> linear one.
>
> Cc: Mauro Rossi
> Cc: Ch
After some testing, I realized this patch causes problems. DATA_FORMAT
with ADD_TID=1 means STRIDE[14:17] only if the instruction is untyped
MUBUF, but Mesa only uses ADD_TID with typed MUBUF (tbuffer in
particular).
Marek
On Thu, Oct 1, 2015 at 10:27 AM, Christian König
wrote:
> On 01.10.2015 0
Unfortunately it has to stay in gen6_gs_visitor.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp | 6 ++
src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.h | 3 ---
src/mesa/drivers/dri/i965/gen6_gs_visitor.h | 9 +++--
3 files changed, 9 inserti
Signed-off-by: Kenneth Graunke
---
src/glsl/nir/glsl_to_nir.cpp | 2 ++
src/glsl/nir/nir.h | 3 +++
2 files changed, 5 insertions(+)
diff --git a/src/glsl/nir/glsl_to_nir.cpp b/src/glsl/nir/glsl_to_nir.cpp
index 4dd6287..efaa73e 100644
--- a/src/glsl/nir/glsl_to_nir.cpp
+++ b/src/glsl/
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
index c673ccd..74ef728 100644
--- a/src/m
I only scanned through then briefly, but they look good to me.
Assuming Jenkins agrees,
Reviewed-by: Jason Ekstrand
Let's actually push it this time. :-)
On Fri, Oct 2, 2015 at 2:52 PM, Kenneth Graunke wrote:
> Geometry and tessellation shaders process multiple vertices; their
> inputs are arr
https://bugs.freedesktop.org/show_bug.cgi?id=91596
--- Comment #16 from Emil Velikov ---
(In reply to Emil Velikov from comment #14)
> (In reply to Ilia Mirkin from comment #13)
> > Er nevermind. Before it was malloc'd but now it's calloc'd.
>
> The most creepy part is that with the extension di
Otherwise the user has no way of using it, and we'll try to access the
linear one.
Cc: Mauro Rossi
Cc: Chih-Wei Huang
Cc: "11.0"
Fixes: c2c2e9ab604(egl: implement EGL_KHR_gl_colorspace (v2))
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91596
Signed-off-by: Emil Velikov
---
src/egl/d
https://bugs.freedesktop.org/show_bug.cgi?id=91596
--- Comment #15 from Emil Velikov ---
(In reply to Chih-Wei Huang from comment #11)
> Mesa still doesn't support PIXEL_FORMAT_RGBA_?
It should, depending on how exactly you define the formats. I've looked a while
back for some android docume
https://bugs.freedesktop.org/show_bug.cgi?id=91596
--- Comment #14 from Emil Velikov ---
(In reply to Ilia Mirkin from comment #13)
> Er nevermind. Before it was malloc'd but now it's calloc'd.
The most creepy part is that with the extension disabled, we can never get to
the srgb configs, as GLC
get_io_offset() already walks the dereference chain and discovers
whether or not we have an indirect; we can just return that rather than
computing it a second time via deref_has_indirect(). This means moving
the call a bit earlier.
By returning a nir_ssa_def *, we can pass back both an existence
Geometry and tessellation shaders process multiple vertices; their
inputs are arrays indexed by the vertex number. While GLSL makes
this look like a normal array, it can be very different behind the
scenes.
On Intel hardware, all inputs for a particular vertex are stored
together - as if they wer
On Fri, Oct 2, 2015 at 5:37 PM, Connor Abbott wrote:
> The heuristic we're using is rather lame, since it assumes everything is
> non-uniform and loops execute 50 times, but it should be enough for
> measuring improvements in the scheduler that don't result in a change in
> the number of instructi
Here's a series to fix some things I found with i965's instruction
scheduler. It also makes us print out an estimate of the cycle count,
which the shader-db patches then make use of to enable us to better
measure the impact of scheduler changes. Perhaps the most important
patch is patch 3, which fi
We'll need this for the scheduler too, since it wants to know when the
live ranges of payload registers end in order to model them in our
register pressure calculations.
Signed-off-by: Connor Abbott
---
src/mesa/drivers/dri/i965/brw_fs.h| 2 +
src/mesa/drivers/dri/i965/brw_fs_re
Signed-off-by: Connor Abbott
---
report.py | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/report.py b/report.py
index bc3a640..f9445dd 100755
--- a/report.py
+++ b/report.py
@@ -48,14 +48,19 @@ def get_result_string(p, b, a):
p = p + ' '
return p + change(
Now that we have three separate things we want to measure (instructions,
cycles, and loops), it's impractical to keep adding special code for
changes in each thing. Instead, for each program in before and after we
store a table of measurement -> value, and when reporting we loop over
each measureme
The heuristic we're using is rather lame, since it assumes everything is
non-uniform and loops execute 50 times, but it should be enough for
measuring improvements in the scheduler that don't result in a change in
the number of instructions.
Signed-off-by: Connor Abbott
---
src/mesa/drivers/dri/
The issue time for an instruction is how many cycles it takes to
actually put it into the pipeline. If there's a pipeline stall that
causes the instruction to be delayed, we should first take that into
account to figure out when the instruction would start executing and
*then* add the issue time. T
Although write-after-write dependencies have the same latency as
read-after-write dependencies due to how the register scoreboard works,
write-after-read dependencies aren't checked by the EU at all, so
they're purely a constraint on how the scheduler can order the
instructions.
Signed-off-by: Con
Previously, we were using some heuristics to try and detect when a write
was about to begin a live range, or when a read was about to end a live
range. We never used the liveness analysis information used by the
register allocator, though, which meant that the scheduler's and the
allocator's ideas
Before, we would only do scheduling after register allocation if we
spilled, despite the fact that the pre-RA scheduler was only supposed to
be for register pressure and set the latencies of every instruction to
1. This meant that unless we spilled, which we rarely do, then we never
considered inst
On 2 October 2015 at 19:59, Rob Clark wrote:
> On Fri, Oct 2, 2015 at 2:41 PM, Emil Velikov wrote:
>> On 2 October 2015 at 19:02, Rob Clark wrote:
>>> On Fri, Oct 2, 2015 at 1:46 PM, Emil Velikov
>>> wrote:
On 2 October 2015 at 17:11, Rob Clark wrote:
> On Fri, Oct 2, 2015 at 11:49 A
On Fri, Oct 2, 2015 at 4:47 PM, Ian Romanick wrote:
> On 10/01/2015 12:15 PM, Ilia Mirkin wrote:
>> On Thu, Oct 1, 2015 at 3:12 PM, Ian Romanick wrote:
>>> I'm just
>>> wondering because Mesa doesn't support that extension. How is this even
>>> being hit?
>>
>> See 81d2fd91a90 (mesa: add NV_read
The series is
Reviewed-by: Matt Turner
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On 10/01/2015 12:15 PM, Ilia Mirkin wrote:
> On Thu, Oct 1, 2015 at 3:12 PM, Ian Romanick wrote:
>> I'm just
>> wondering because Mesa doesn't support that extension. How is this even
>> being hit?
>
> See 81d2fd91a90 (mesa: add NV_read_{depth,stencil,depth_stencil} extensions)
Okay, that's wei
On 10/02/2015 01:30 PM, Ville Syrjälä wrote:
> On Sat, Oct 03, 2015 at 02:55:57AM +0800, Chih-Wei Huang wrote:
>> 2015-05-22 1:21 GMT+08:00 Ville Syrjälä :
>>> On Sat, May 16, 2015 at 01:36:44AM +0800, Chih-Wei Huang wrote:
2015-04-13 19:00 GMT+08:00 Ville Syrjälä :
Glad to see the p
On Sat, Oct 03, 2015 at 02:55:57AM +0800, Chih-Wei Huang wrote:
> 2015-05-22 1:21 GMT+08:00 Ville Syrjälä :
> > On Sat, May 16, 2015 at 01:36:44AM +0800, Chih-Wei Huang wrote:
> >> 2015-04-13 19:00 GMT+08:00 Ville Syrjälä :
> >>
> >> Glad to see the patches to improve i915 driver.
> >> I thought In
On Friday, October 02, 2015 12:08:07 PM Jason Ekstrand wrote:
> On Thu, Oct 1, 2015 at 11:13 AM, Kenneth Graunke
> wrote:
> > get_io_offset() already walks the dereference chain and discovers
> > whether or not we have an indirect; we can just return that rather than
> > computing it a second tim
https://bugs.freedesktop.org/show_bug.cgi?id=91596
--- Comment #13 from Ilia Mirkin ---
(In reply to Ilia Mirkin from comment #12)
> Looking over that patch, I noticed this hunk:
>
>memcpy(&conf->base, &base, sizeof base);
>if (double_buffer) {
> - conf->dri_double_config
https://bugs.freedesktop.org/show_bug.cgi?id=91596
--- Comment #12 from Ilia Mirkin ---
Looking over that patch, I noticed this hunk:
memcpy(&conf->base, &base, sizeof base);
if (double_buffer) {
- conf->dri_double_config = dri_config;
- conf->dri_single_config = NU
On Wednesday, September 30, 2015 12:06:38 PM Iago Toral Quiroga wrote:
> This fixes a bug that Curro pointed out: we only allocate entries for
> UBOs at the moment. This a problem when a shader defines more
> than 12 combined UBO and SSBO surfaces. This is done with patch 3.
>
> patch 4 simply add
On Thu, Oct 1, 2015 at 11:13 AM, Kenneth Graunke wrote:
> get_io_offset() already walks the dereference chain and discovers
> whether or not we have an indirect; we can just return that rather than
> computing it a second time. This means moving the call a bit earlier.
>
> More importantly, I'm a
On Thursday, October 01, 2015 06:50:26 PM Jason Ekstrand wrote:
> This series does a bunch of code-shuffling with the end objective of
> getting the gl_* data structures out of the backend compiler. Now that we
> have NIR, we would like the compiler to be a NIR -> binary translator and
> not be lo
On Fri, Oct 2, 2015 at 2:41 PM, Emil Velikov wrote:
> On 2 October 2015 at 19:02, Rob Clark wrote:
>> On Fri, Oct 2, 2015 at 1:46 PM, Emil Velikov
>> wrote:
>>> On 2 October 2015 at 17:11, Rob Clark wrote:
On Fri, Oct 2, 2015 at 11:49 AM, Emil Velikov
wrote:
> On 1 October 2015
On 2 October 2015 at 19:02, Rob Clark wrote:
> On Fri, Oct 2, 2015 at 1:46 PM, Emil Velikov wrote:
>> On 2 October 2015 at 17:11, Rob Clark wrote:
>>> On Fri, Oct 2, 2015 at 11:49 AM, Emil Velikov
>>> wrote:
On 1 October 2015 at 20:44, Rob Clark wrote:
> From: Rob Clark
>
>
https://bugs.freedesktop.org/show_bug.cgi?id=91596
--- Comment #11 from Chih-Wei Huang ---
(In reply to Emil Velikov from comment #10)
> In the few moments that android-x86 was up I've noticed a very interesting
> commit [1]. In case you don't have a local copy, it enables a workaround
> #1019450
On Thu, Oct 1, 2015 at 11:13 AM, Kenneth Graunke wrote:
> Geometry and tessellation shaders process multiple vertices; their
> inputs are arrays indexed by the vertex number. While GLSL makes
> this look like a normal array, it can be very different behind the
> scenes.
>
> On Intel hardware, all
On Fri, Oct 2, 2015 at 1:26 PM, Connor Abbott wrote:
> On Fri, Oct 2, 2015 at 12:56 PM, Matt Turner wrote:
>> On Fri, Oct 2, 2015 at 9:28 AM, Connor Abbott wrote:
>>> Some loops may have phi nodes that look like:
>>>
>>> foo = ...
>>> loop {
>>> bar = phi(foo, bar)
>>> ...
>>> }
>>>
>>>
On Fri, Oct 2, 2015 at 2:09 AM, Iago Toral wrote:
> On Wed, 2015-09-30 at 18:41 -0700, Jason Ekstrand wrote:
>> Previously, we were counting up uniforms as we set them up. However, this
>> count should be exactly identical to shader->num_uniforms provided by
>> nir_assign_var_locations. (If it's
On 10/02/2015 07:46 PM, Ilia Mirkin wrote:
On Mon, Sep 28, 2015 at 5:12 AM, Tapani Pälli wrote:
Commit 4639cea2921669527eb43dcb49724c05afb27e8e added packed varyings
as part of program resource list. We need to take this to account with
all functions dealing with active input attributes.
Patch
On Fri, Oct 2, 2015 at 1:46 PM, Emil Velikov wrote:
> On 2 October 2015 at 17:11, Rob Clark wrote:
>> On Fri, Oct 2, 2015 at 11:49 AM, Emil Velikov
>> wrote:
>>> On 1 October 2015 at 20:44, Rob Clark wrote:
From: Rob Clark
Signed-off-by: Rob Clark
---
Drop the idea o
On Fri, Oct 2, 2015 at 2:51 AM, Iago Toral wrote:
> On Thu, 2015-10-01 at 20:22 -0400, Ilia Mirkin wrote:
>> Signed-off-by: Ilia Mirkin
>> ---
>> src/glsl/link_uniforms.cpp | 8
>> 1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/src/glsl/link_uniforms.cpp b/src/glsl/l
On Fri, Oct 2, 2015 at 7:50 PM, Ilia Mirkin wrote:
> On Fri, Oct 2, 2015 at 1:48 PM, Marek Olšák wrote:
>> On Fri, Oct 2, 2015 at 4:12 PM, Roland Scheidegger
>> wrote:
>>> Am 02.10.2015 um 12:19 schrieb Marek Olšák:
On Fri, Oct 2, 2015 at 3:13 AM, Roland Scheidegger
wrote:
> Can
Hi Marc,
On 29 September 2015 at 10:31, Marc Dietrich wrote:
> As expressed before, using hidden attribute only hides some hack on how to
> find the head of the dispatch entry table afaict.
>
> I just replaced it with shared_dispatch_stub_0() and this works for shared-
> glapi case, but not witho
On Fri, Oct 2, 2015 at 1:48 PM, Marek Olšák wrote:
> On Fri, Oct 2, 2015 at 4:12 PM, Roland Scheidegger wrote:
>> Am 02.10.2015 um 12:19 schrieb Marek Olšák:
>>> On Fri, Oct 2, 2015 at 3:13 AM, Roland Scheidegger
>>> wrote:
Can't say I'm a big fan of doing essentially the same thing with
>
On 2 October 2015 at 17:11, Rob Clark wrote:
> On Fri, Oct 2, 2015 at 11:49 AM, Emil Velikov
> wrote:
>> On 1 October 2015 at 20:44, Rob Clark wrote:
>>> From: Rob Clark
>>>
>>> Signed-off-by: Rob Clark
>>> ---
>>> Drop the idea of more ambitious re-arrangement if libs, but keep the
>>> pipe-
On Fri, Oct 2, 2015 at 4:12 PM, Roland Scheidegger wrote:
> Am 02.10.2015 um 12:19 schrieb Marek Olšák:
>> On Fri, Oct 2, 2015 at 3:13 AM, Roland Scheidegger
>> wrote:
>>> Can't say I'm a big fan of doing essentially the same thing with
>>> different methods, but well it's coming from GL, and if
On Fri, Oct 2, 2015 at 3:25 AM, Iago Toral wrote:
> On Wed, 2015-09-30 at 18:41 -0700, Jason Ekstrand wrote:
>> The way we deal with ARB program uniforms is basically the same in both the
>> vec4 and the fs backend. This commit takes the best parts of both
>> implementations and pulls the common
On Fri, Oct 2, 2015 at 12:32 AM, Iago Toral wrote:
> On Wed, 2015-09-30 at 18:41 -0700, Jason Ekstrand wrote:
>> Previously, pack_uniform_registers worked based on the size of the uniform
>> as given to us when we initially set up the uniforms. However, we have to
>> walk through the uniforms and
On Fri, Oct 2, 2015 at 12:56 PM, Matt Turner wrote:
> On Fri, Oct 2, 2015 at 9:28 AM, Connor Abbott wrote:
>> Some loops may have phi nodes that look like:
>>
>> foo = ...
>> loop {
>> bar = phi(foo, bar)
>> ...
>> }
>>
>> in which case we can remove the phi node and replace all uses of '
On Fri, Oct 2, 2015 at 9:28 AM, Connor Abbott wrote:
> Some loops may have phi nodes that look like:
>
> foo = ...
> loop {
> bar = phi(foo, bar)
> ...
> }
>
> in which case we can remove the phi node and replace all uses of 'bar'
> with 'foo'. In particular, there are some L4D2 vertex sha
On Mon, Sep 28, 2015 at 5:12 AM, Tapani Pälli wrote:
> Commit 4639cea2921669527eb43dcb49724c05afb27e8e added packed varyings
> as part of program resource list. We need to take this to account with
> all functions dealing with active input attributes.
>
> Patch fixes the issue by adding additional
Matt Turner writes:
> On Fri, Oct 2, 2015 at 2:52 AM, Francisco Jerez wrote:
>> Jason Ekstrand writes:
>>
>>> On Oct 1, 2015 12:18 PM, "Matt Turner" wrote:
On Fri, Aug 7, 2015 at 9:31 AM, Neil Roberts wrote:
> Adds nir_src_is_dynamically_uniform which returns true if the source
Some loops may have phi nodes that look like:
foo = ...
loop {
bar = phi(foo, bar)
...
}
in which case we can remove the phi node and replace all uses of 'bar'
with 'foo'. In particular, there are some L4D2 vertex shaders with loops
that, after optimization, look like:
/* succs:
On Fri, Oct 2, 2015 at 2:52 AM, Francisco Jerez wrote:
> Jason Ekstrand writes:
>
>> On Oct 1, 2015 12:18 PM, "Matt Turner" wrote:
>>>
>>> On Fri, Aug 7, 2015 at 9:31 AM, Neil Roberts wrote:
>>> > Adds nir_src_is_dynamically_uniform which returns true if the source
>>> > is known to be dynamica
On Fri, Oct 2, 2015 at 11:49 AM, Emil Velikov wrote:
> On 1 October 2015 at 20:44, Rob Clark wrote:
>> From: Rob Clark
>>
>> Signed-off-by: Rob Clark
>> ---
>> Drop the idea of more ambitious re-arrangement if libs, but keep the
>> pipe-loader refactoring. With this at least drm_gralloc could
On 1 October 2015 at 20:44, Rob Clark wrote:
> From: Rob Clark
>
> Signed-off-by: Rob Clark
> ---
> Drop the idea of more ambitious re-arrangement if libs, but keep the
> pipe-loader refactoring. With this at least drm_gralloc could still
> dlopen() gallium_dri.so and then use the pipe-loader A
Neil Roberts writes:
> Francisco Jerez writes:
>
>> Sigh, it's really awful that our hardware only supports a single sample
>> index for the whole SIMD thread... I was thinking though that there
>> might be a better alternative to running the sample-index interpolator
>> query in a loop: The "P
Am 02.10.2015 um 12:19 schrieb Marek Olšák:
> On Fri, Oct 2, 2015 at 3:13 AM, Roland Scheidegger wrote:
>> Can't say I'm a big fan of doing essentially the same thing with
>> different methods, but well it's coming from GL, and if it helps some
>> drivers...
>>
>> Acked-by: Roland Scheidegger
>
Matt Turner writes:
>> +static fs_reg
>> +get_num_samples_reg(fs_visitor *v)
>> +{
>> + struct gl_program_parameter_list *params = v->prog->Parameters;
>> + static gl_state_index tokens[STATE_LENGTH] = {
>
> I suspect this isn't thread-safe.
Do you mean because the tokens array is static? I
Francisco Jerez writes:
> Sigh, it's really awful that our hardware only supports a single sample
> index for the whole SIMD thread... I was thinking though that there
> might be a better alternative to running the sample-index interpolator
> query in a loop: The "Per Slot Offset" interpolator q
Matt Turner writes:
> On Fri, Aug 7, 2015 at 9:31 AM, Neil Roberts wrote:
>> If a non-const sample number is given to interpolateAtSample it will
>> now generate an indirect send message with the sample ID similar to
>> how non-const sampler array indexing works. Previously non-const
>> values w
On 1 October 2015 at 09:32, Emil Velikov wrote:
> On 28 September 2015 at 18:59, Kyle Brenneman wrote:
>> Rearranged the GLX_ALIAS macro in glextensions.h so that it will pick up
>> the renames from glx_mangle.h.
>>
>> Fixed the alias attribute for glXGetProcAddress when USE_MGL_NAMESPACE is
>> d
I think this never got a review, anyone willing to take it?
Iago
On Mon, 2015-09-14 at 13:49 +0200, Iago Toral Quiroga wrote:
> When we find indirect indexing into an array, the current implementation
> of the array spliiting optimization pass does not look further into the
> expression tree. How
On Fri, Sep 18, 2015 at 08:37:13AM -0700, Kenneth Graunke wrote:
> Signed-off-by: Kenneth Graunke
Causes
==823== Conditional jump or move depends on uninitialised value(s)
==823==at 0xB09020C: convert_block (nir_lower_system_values.c:68)
==823==by 0xB079FB8: foreach_cf_node (nir.c:1310)
Reviewed-by: Iago Toral Quiroga
On Wed, 2015-09-30 at 18:41 -0700, Jason Ekstrand wrote:
> ---
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 19 ---
> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 21 -
> 2 files changed, 16 insertions(+), 24 deletions(-)
>
>
On Wed, 2015-09-30 at 18:41 -0700, Jason Ekstrand wrote:
> The way we deal with GLSL uniforms and builtins is basically the same in
> both the vec4 and the fs backend. This commit takes the best parts of both
> implementations and pulls the common code into a shared helper function.
> ---
> src/m
On Wed, 2015-09-30 at 18:41 -0700, Jason Ekstrand wrote:
> The way we deal with ARB program uniforms is basically the same in both the
> vec4 and the fs backend. This commit takes the best parts of both
> implementations and pulls the common code into a shared helper function.
> ---
> src/mesa/dr
On Fri, Oct 2, 2015 at 3:13 AM, Roland Scheidegger wrote:
> Can't say I'm a big fan of doing essentially the same thing with
> different methods, but well it's coming from GL, and if it helps some
> drivers...
>
> Acked-by: Roland Scheidegger
If all drivers start supporting the CAP, we could rem
Jason Ekstrand writes:
> On Oct 1, 2015 12:18 PM, "Matt Turner" wrote:
>>
>> On Fri, Aug 7, 2015 at 9:31 AM, Neil Roberts wrote:
>> > Adds nir_src_is_dynamically_uniform which returns true if the source
>> > is known to be dynamically uniform. This will be used in a later patch
>> > to add a wo
On Wed, 2015-09-30 at 18:41 -0700, Jason Ekstrand wrote:
> Previously, we were counting up uniforms as we set them up. However, this
> count should be exactly identical to shader->num_uniforms provided by
> nir_assign_var_locations. (If it's not, we're in trouble anyway because
> that means that
https://bugs.freedesktop.org/show_bug.cgi?id=92236
Axel Davy changed:
What|Removed |Added
Status|REOPENED|RESOLVED
Resolution|---
Reviewed-by: Iago Toral Quiroga
On Wed, 2015-09-30 at 18:41 -0700, Jason Ekstrand wrote:
> It's not used by anything anymore
> ---
> src/mesa/drivers/dri/i965/brw_fs.cpp | 14 --
> src/mesa/drivers/dri/i965/brw_fs.h | 4
> src/mesa/drivers/dri/i965/brw_sha
On Fri, 2015-10-02 at 10:29 +0200, Iago Toral wrote:
> On Wed, 2015-09-30 at 18:41 -0700, Jason Ekstrand wrote:
> > I tried to do this once before but Curro pointed out that having it in
> > backend_shader meant it could use the setup_vec4_uniform_values helper
> > which did different things in vec
On Wed, 2015-09-30 at 18:41 -0700, Jason Ekstrand wrote:
> I tried to do this once before but Curro pointed out that having it in
> backend_shader meant it could use the setup_vec4_uniform_values helper
> which did different things in vec4 and fs. Now the setup_uniform_values
> function differs on
https://bugs.freedesktop.org/show_bug.cgi?id=92236
Axel Davy changed:
What|Removed |Added
Status|RESOLVED|REOPENED
Resolution|NOTOURBUG
https://bugs.freedesktop.org/show_bug.cgi?id=92236
Michel Dänzer changed:
What|Removed |Added
Status|NEW |RESOLVED
Component|Drivers/Gall
Reviewed-by: Iago Toral Quiroga
On Wed, 2015-09-30 at 18:41 -0700, Jason Ekstrand wrote:
> The uniform_vector_size array was only ever used by pack_uniform_registers
> which no longer needs it.
> ---
> src/mesa/drivers/dri/i965/brw_vec4.cpp| 1 -
> src/mesa/drivers/dri/i965/brw_vec4
On 02/10/15 09:39, Ilia Mirkin wrote:
> On Fri, Oct 2, 2015 at 3:34 AM, Samuel Iglesias Gonsálvez
> wrote:
>> On 02/10/15 09:20, Ilia Mirkin wrote:
>>> I'm a little concerned that your random ssbo packing tests didn't pick
>>> this up... can you double-check your script?
>>>
>>
>> The script gen
On Fri, Oct 2, 2015 at 3:34 AM, Samuel Iglesias Gonsálvez
wrote:
> On 02/10/15 09:20, Ilia Mirkin wrote:
>> I'm a little concerned that your random ssbo packing tests didn't pick
>> this up... can you double-check your script?
>>
>
> The script generates shader_runner tests that query GL_MATRIX_ST
Reviewed-by: Samuel Iglesias Gonsálvez
On 02/10/15 09:23, Tapani Pälli wrote:
> Fixes following Piglit test:
> member-invalid-binding-qualifier.frag
>
> Signed-off-by: Tapani Pälli
> ---
> src/glsl/ast_to_hir.cpp | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/src/glsl/ast_
On 02/10/15 09:20, Ilia Mirkin wrote:
> I'm a little concerned that your random ssbo packing tests didn't pick
> this up... can you double-check your script?
>
The script generates shader_runner tests that query GL_MATRIX_STRIDE
using ARB_program_interface_query's calls but it has not support f
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