Re: [Mesa-dev] [RFC 1/2] nir: Add a new lowering pass nir_lower_vec_and_coalesce

On 09/09/2015 07:10 PM, Jason Ekstrand wrote: > > On Sep 8, 2015 23:27, "Eduardo Lima Mitev" > wrote: >> >> This pass will propagate the destination components of a vecN > instructions, >> as destination of the instructions that define its sources; if certain >> condition

Re: [Mesa-dev] [PATCH] r600g: update num_dw in scissor_enable workaround

On 10.09.2015 01:33, Grazvydas Ignotas wrote: > "r600g: apply disable workaround on all scissors" forgot to update > num_dw, fix it. > > Fixes: fbb423b433 "r600g: apply disable workaround on all scissors" > Reported-and-tested-by: Markus Trippelsdorf > Bugzilla: https://bugs.freedesktop.org/show_

Re: [Mesa-dev] [PATCH 4/9] i965: Make intel_miptree_map_raw static

On 09/09/2015 07:18 PM, Ian Romanick wrote: > From: Ian Romanick > > This hasn't been used outside intel_mipmap_tree.c since d5d4ba9 started > using meta instead of the blitter for PBO TexSubImage. While we're here, > > 1. s/intel_miptree_\([^_]\)_raw/miptree_\1_raw/g because we don't > general

[Mesa-dev] [PATCH 8/9] i915: Silence unused parameter warning in intel_miptree_create_layout

From: Ian Romanick The for_bo parameter of intel_miptree_create_layout appears to be unused since 27eedca when Eric removed some Gen5 code (after the i915 and i965 drivers parted ways). intel_mipmap_tree.c: In function 'old_intel_miptree_create_layout': intel_mipmap_tree.c:77:35: warning: unused

[Mesa-dev] [PATCH 1/9] i965: Silence unused parameter warnings in intel_fbo.c

From: Ian Romanick intel_fbo.c: In function 'intel_alloc_window_storage': intel_fbo.c:415:48: warning: unused parameter 'ctx' [-Wunused-parameter] intel_alloc_window_storage(struct gl_context * ctx, struct gl_renderbuffer *rb, ^ intel_fbo.c: In fun

[Mesa-dev] [PATCH 4/9] i965: Make intel_miptree_map_raw static

From: Ian Romanick This hasn't been used outside intel_mipmap_tree.c since d5d4ba9 started using meta instead of the blitter for PBO TexSubImage. While we're here, 1. s/intel_miptree_\([^_]\)_raw/miptree_\1_raw/g because we don't generally prefix static functions. 2. Remove the unused brw para

[Mesa-dev] [PATCH 3/9] i915, i965: Silence unused parameter warnings in intel_mipmap_tree.h

From: Ian Romanick These only occurred in release builds, but they occurred in every file that included intel_mipmap_tree.h. Lots of spam. :( intel_mipmap_tree.h: In function 'intel_miptree_check_level_layer': intel_mipmap_tree.h:595:59: warning: unused parameter 'mt' [-Wunused-parameter] inte

[Mesa-dev] [PATCH 5/9] i915: Remove prototype for nonexistent brw_miptree_layout

From: Ian Romanick Hasn't existed in the i915 source since the i915 and i965 drivers parted ways. Signed-off-by: Ian Romanick --- src/mesa/drivers/dri/i915/intel_mipmap_tree.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/mesa/drivers/dri/i915/intel_mipmap_tree.h b/src/mesa/drivers

[Mesa-dev] [PATCH 2/9] i965: Silence unused parameter warnings in intel_mipmap_tree.c

From: Ian Romanick The target parameter of compute_msaa_layout appears to be unused since 83b83fb when support for CMS textures was added for Gen7. The brw parameter of intel_get_non_msrt_mcs_alignment appears to be unused since e92fbdc when the GEN check (along with the "can we fast clear" deci

[Mesa-dev] [PATCH 9/9] i915, i965: Silence unused parameter warnings in intel_batchbuffer_advance

From: Ian Romanick These only occurred in release builds, but they occurred in every file that included intel_batchbuffer.h. Lots of spam. :( intel_batchbuffer.h: In function 'intel_batchbuffer_advance': intel_batchbuffer.h:153:47: warning: unused parameter 'brw' [-Wunused-parameter] intel_bat

[Mesa-dev] [PATCH 6/9] i915: Silence unused parameter warnings

From: Ian Romanick intel_mipmap_tree.c: In function 'old_intel_miptree_unmap_raw': intel_mipmap_tree.c:726:51: warning: unused parameter 'intel' [-Wunused-parameter] intel_miptree_unmap_raw(struct intel_context *intel, ^ Signed-off-by: Ian Rom

[Mesa-dev] [PATCH 7/9] i915, i965: Silence unused parameter warnings in intel_miptree_unmap_gtt

From: Ian Romanick intel_mipmap_tree.c: In function 'intel_miptree_unmap_gtt': intel_mipmap_tree.c:777:34: warning: unused parameter 'map' [-Wunused-parameter] struct intel_miptree_map *map, ^ intel_mipmap_tree.c:778:17: warning: unused parameter 'level' [-W

Re: [Mesa-dev] [PATCH v4 (part2) 20/59] glsl: Add parser/compiler support for std430 interface packing qualifier

On 09/09/2015 03:32 AM, Samuel Iglesias Gonsálvez wrote: > On 31/08/15 08:38, Samuel Iglesias Gonsálvez wrote: >> On 29/08/15 02:27, Jordan Justen wrote: >>> Hmm, you quoted the extension spec, but the 4.30 spec has: "When using >>> the std430 storage layout, shader storage blocks will be laid out

Re: [Mesa-dev] [PATCH] meta: Use result of texture coordinate clamping operation

On Wed, Sep 9, 2015 at 6:19 PM, Ian Romanick wrote: > On 09/09/2015 04:55 PM, Anuj Phogat wrote: >> On Wed, Sep 9, 2015 at 11:30 AM, Ian Romanick wrote: >>> I'm pretty sure our implementation of this extension is complete >>> rubbish. I have attached an image from the blit-scaled test. This >>>

Re: [Mesa-dev] [PATCH] ralloc: Use __attribute__((destructor)) instead of atexit(3)

On 09/07/2015 06:54 AM, Jose Fonseca wrote: > On 07/09/15 10:17, Jean-Sébastien Pédron wrote: >> On 04.09.2015 01:37, Matt Turner wrote: >>> You need to test for this support in configure.ac. It's as simple as >>> adding a call to AX_GCC_FUNC_ATTRIBUTE in the existing alphabetized >>> list and then

Re: [Mesa-dev] [PATCH 2/2] glsl/cs: Initialize gl_LocalInvocationIndex in main()

On 08/23/2015 01:50 AM, Jordan Justen wrote: > We initialize gl_LocalInvocationIndex based on the extension spec > formula: > > gl_LocalInvocationIndex = > gl_LocalInvocationID.z * gl_WorkGroupSize.x * gl_WorkGroupSize.y + > gl_LocalInvocationID.y * gl_WorkGroupSize.x + >

Re: [Mesa-dev] [PATCH 00/10] i965: add ARB_shader_texture_image_samples support

On Thursday, August 27, 2015 11:48:29 PM Ilia Mirkin wrote: > This should include everything. I sent a test for textureSamples to > piglit a while ago, not sure how to test imageSamples -- apparently ms > images aren't entirely supported on i965? But I'm not sure via what > feat that happens. > >

Re: [Mesa-dev] [PATCH] meta: Use result of texture coordinate clamping operation

On 09/09/2015 04:55 PM, Anuj Phogat wrote: > On Wed, Sep 9, 2015 at 11:30 AM, Ian Romanick wrote: >> I'm pretty sure our implementation of this extension is complete >> rubbish. I have attached an image from the blit-scaled test. This >> result cannot be useful to anyone. >> > Paul Berry and I a

Re: [Mesa-dev] [PATCH] meta: Use result of texture coordinate clamping operation

On Wed, Sep 9, 2015 at 11:30 AM, Ian Romanick wrote: > I'm pretty sure our implementation of this extension is complete > rubbish. I have attached an image from the blit-scaled test. This > result cannot be useful to anyone. > Resending it with link to the image in place of big attachment. Paul

[Mesa-dev] [PATCH 05/11] nir/from_ssa: Use instr_rewrite_dest

--- src/glsl/nir/nir_from_ssa.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/glsl/nir/nir_from_ssa.c b/src/glsl/nir/nir_from_ssa.c index 084f43d..eaf883d 100644 --- a/src/glsl/nir/nir_from_ssa.c +++ b/src/glsl/nir/nir_from_ssa.c @@ -512,9 +512,7 @@ rewrite_ssa_def(nir

[Mesa-dev] [PATCH 06/11] nir/lower_vec_to_movs: Add a state struct

While we're here, we also fix up a couple of potential ralloc-parenting bugs. In particular, we were calling nir_src_copy with the shader as the mem context instead of the instruction. --- src/glsl/nir/nir_lower_vec_to_movs.c | 22 -- 1 file changed, 16 insertions(+), 6 deleti

[Mesa-dev] [PATCH 09/11] nir/lower_vec_to_movs: Get rid of start_idx and swizzle compacting

Previously, we did this thing with keeping track of a separate start_idx which was different from the iteration variable. I think this was a relic of the way that GLSL IR implements writemasks. In NIR, if a given bit in the writemask is unset then that channel is just "unused", not missing. In p

[Mesa-dev] [PATCH 11/11] HACK: nir/lower_vec_to_movs: Coalesce into destinations of fdot instructions

This is labeled HACK because it relies on the validator not validating destination write-masks with respect to nir_op_infos[op].output_size and relies on the fact that the i965 vec4 hardware does an implicit splat of any dot-product results. Technically, nir_op_fdotN produces a single component th

[Mesa-dev] [PATCH 08/11] i965/vec4_nir: Use partial SSA form rather than full non-SSA

We made this switch in the FS backend some time ago and it seems to make a number of things a bit easier. --- src/mesa/drivers/dri/i965/brw_nir.c| 2 +- src/mesa/drivers/dri/i965/brw_vec4.h | 1 + src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 21 ++--- 3 files change

[Mesa-dev] [PATCH 07/11] nir/lower_vec_to_movs: Handle partially SSA shaders

--- src/glsl/nir/nir_lower_vec_to_movs.c | 18 -- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/src/glsl/nir/nir_lower_vec_to_movs.c b/src/glsl/nir/nir_lower_vec_to_movs.c index e297cb8..7d31e36 100644 --- a/src/glsl/nir/nir_lower_vec_to_movs.c +++ b/src/glsl/nir/

[Mesa-dev] [PATCH 10/11] nir/lower_vec_to_movs: Coalesce movs on-the-fly when possible

The old pass blindly inserted a bunch of moves into the shader with no concern for whether or not it was really needed. This adds code to try and coalesce into the destination of the instruction providing the value. Shader-db results for vec4 shaders on Haswell: total instructions in shared p

[Mesa-dev] [PATCH 01/11] nir: Fix a bunch of ralloc parenting errors

As of a10d4937, we would really like things associated with an instruction to be allocated out of that instruction and not out of the shader. In particular, you should be passing the instruction that will ultimately be holding the source into nir_src_copy rather than an arbitrary memory context.

[Mesa-dev] [PATCH 02/11] nir: Remove the mem_ctx parameter from ssa_def_rewrite_uses

--- src/glsl/nir/nir.c| 2 +- src/glsl/nir/nir.h| 2 +- src/glsl/nir/nir_control_flow.c | 2 +- src/glsl/nir/nir_from_ssa.c | 5 ++--- src/glsl/nir/nir_lower_alu_to_scalar.c| 6 ++ src/glsl/nir/nir_

[Mesa-dev] [PATCH 04/11] nir: Add a function for rewriting instruction destinations

--- src/glsl/nir/nir.c | 24 src/glsl/nir/nir.h | 2 ++ 2 files changed, 26 insertions(+) diff --git a/src/glsl/nir/nir.c b/src/glsl/nir/nir.c index e173b21..0090b08 100644 --- a/src/glsl/nir/nir.c +++ b/src/glsl/nir/nir.c @@ -1175,6 +1175,30 @@ nir_if_rewrite_condition(

[Mesa-dev] [PATCH 03/11] nir: Only unlink sources that are actually valid

--- src/glsl/nir/nir.c | 15 --- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/src/glsl/nir/nir.c b/src/glsl/nir/nir.c index 9a22fea..e173b21 100644 --- a/src/glsl/nir/nir.c +++ b/src/glsl/nir/nir.c @@ -714,9 +714,16 @@ nir_instr_insert(nir_cursor cursor, nir_instr *ins

[Mesa-dev] [PATCH 00/11] Various vec4 NIR improvements

This patch series started out with me suggesting to Eduardo that his coalescing pass would be easier if the shader was in partial SSA. So I started working towards getting the vec4 backend using partial SSA like the FS backend does. Then I started adding more stuff to lower_vec_to_movs and the re

Re: [Mesa-dev] i965/cs: Enable barrier in MEDIA_INTERFACE_DESCRIPTOR

Jordan Justen writes: > Enable barrier in MEDIA_INTERFACE_DESCRIPTOR if the program uses the > barrier() GLSL function. > > On Ivy Bridge and Haswell, this allows the piglit test > tests/spec/arb_compute_shader/execution/simple-barrier-atomics.shader_test > to pass. On gen8, this enables a simila

Re: [Mesa-dev] [Mesa-dev, 5/5] i965/cs: Emit texture surfaces to enable CS sampling

Jordan Justen writes: > Signed-off-by: Jordan Justen > Reviewed-by: Kristian Høgsberg > --- > src/mesa/drivers/dri/i965/brw_context.h | 2 +- > src/mesa/drivers/dri/i965/brw_state_upload.c | 2 ++ > 2 files changed, 3 insertions(+), 1 deletion(-) > > diff --git a/src/mesa/drivers/dri/i96

Re: [Mesa-dev] [Mesa-dev, 4/5] i965/cs: Support texture sampling for CS

Jordan Justen writes: > Signed-off-by: Jordan Justen Looks good - maybe change the subject to i965: Set up sampler state for compute shaders since this really only sets up that part of the state. Reviewed-by: Kristian Høgsberg > --- > src/mesa/drivers/dri/i965/brw_cs.cpp | 14 +

Re: [Mesa-dev] [PATCH] i965: Don't tell the hardware about our UAV access.

Mark Janes writes: > Francisco Jerez writes: > >> Mark Janes writes: >> >>> When I tested this, I saw an intermittent BSW gpu hang. I haven't been >>> able to confirm that it is due to the host-mem-barrier test. >>> >> It would probably be useful to know if the hang is due to any of the >> ima

Re: [Mesa-dev] [PATCH] meta: Use result of texture coordinate clamping operation

On Wed, Sep 9, 2015 at 11:13 AM, Ian Romanick wrote: > From: Ian Romanick > > Previously the result of the complicated clamp() expression just dropped > on the floor: clamp does not modify any of its parameters. Looking at > the surrounding code, I believe this is supposed to modify the value of

Re: [Mesa-dev] [PATCH v2] i915: fixing driver crashes if too few vertices are submitted

On Wed, Sep 09, 2015 at 11:53:54AM -0700, Ian Romanick wrote: > On 09/09/2015 11:16 AM, Marius Predut wrote: > > Comparison with a signed expression and unsigned value > > is converted to unsigned value, reason for minus value is interpreted > > as a big unsigned value. For this case the "for" loop

Re: [Mesa-dev] [PATCH] tgsi/scan: add support to figure out max nesting depth

On Wednesday, September 09, 2015 06:31:06 PM Rob Clark wrote: > From: Rob Clark > > Sometimes a useful thing for compilers (or, for example, tgsi_to_nir) to > know. And pretty trivial for scan to figure this out for us. > > Signed-off-by: Rob Clark > --- > src/gallium/auxiliary/tgsi/tgsi_scan

Re: [Mesa-dev] [Mesa-dev, 3/5] i965/fs: Set first_non_payload_grf in assign_curb_setup

Jordan Justen writes: > first_non_payload_grf may be updated in assign_urb_setup for FS or > assign_vs_urb_setup for VS. Patch looks good, but I think we should clarify in the commit message that we're doing this so that compute will get first_non_payload_grf set up in assign_curb_setup(). Revi

[Mesa-dev] [PATCH] tgsi/scan: add support to figure out max nesting depth

From: Rob Clark Sometimes a useful thing for compilers (or, for example, tgsi_to_nir) to know. And pretty trivial for scan to figure this out for us. Signed-off-by: Rob Clark --- src/gallium/auxiliary/tgsi/tgsi_scan.c | 16 src/gallium/auxiliary/tgsi/tgsi_scan.h | 5 + 2

Re: [Mesa-dev] [Mesa-dev, 3/5] i965/fs: Set first_non_payload_grf in assign_curb_setup

___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] gallium/ttn: Simplify control flow stack handling.

Instead of storing insertion points, we simply store a single stack of control flow nodes representing the nir_if / nir_loop we're currently filling in. When handling ELSE, we can simply switch to the current nir_if's else_list. When handling ENDIF or ENDLOOP, we move the cursor to after the curr

[Mesa-dev] [PATCH] gallium/ttn: fix cursor handling vs builder

From: Rob Clark After inserting instructions the cursor.option becomes _after_instr (even if it started life as an _after_block). So we cannot simply stash the current cursor on the if/loop_stack. Otherwise we end up inserting instructions after the endif/endloop in the block preceeding the if/

[Mesa-dev] [Bug 91889] Planetary Anihilation: Titans display content of other processes buffers

https://bugs.freedesktop.org/show_bug.cgi?id=91889 --- Comment #4 from Krzysztof A. Sobiecki --- It's about one process accessing graphic memory of other process, how it's even possible. Doesn't kernel some kind of memory management facility to prevent that? -- You are receiving this mail becau

Re: [Mesa-dev] Making ext_framebuffer_multisample-accuracy run on non-i965 drivers

Aha, apparently there's a 'depthstencil' option that uses a combined RB. Nevermind! Didn't realize that was the case. On Wed, Sep 9, 2015 at 3:24 PM, Ilia Mirkin wrote: > Both st/mesa and the NVIDIA fail framebuffer completeness on this > command sequence: > > 270 glRenderbufferStorageMultisample

[Mesa-dev] [PATCH] meta: Always bind the texture

From: Ian Romanick We may have been called from glGenerateTextureMipmap with CurrentUnit still set to 0, so we don't know when we can skip binding the texture. Assume that _mesa_BindTexture will be fast if we're rebinding the same texture. Signed-off-by: Ian Romanick Bugzilla: https://bugs.free

Re: [Mesa-dev] [Mesa-dev, 2/5] i965: Run vector splitting for CS in brw_link_shader

Jordan Justen writes: > Signed-off-by: Jordan Justen I'd change the subject to something like i965: Teach is_scalar_shader_stage() about compute shaders since that's the change in the patch and it affects many other lowering/optimization decisions. With that, Reviewed-by: Kristian Høgsbe

Re: [Mesa-dev] [PATCH 2/3] i915: use EmitNoIndirectSampler

Reviewed-by: Ian Romanick On 06/29/2015 12:35 AM, Tapani Pälli wrote: > Signed-off-by: Tapani Pälli > --- > src/mesa/drivers/dri/i915/i915_context.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/src/mesa/drivers/dri/i915/i915_context.c > b/src/mesa/drivers/dri/i915/i915_context.

[Mesa-dev] Making ext_framebuffer_multisample-accuracy run on non-i965 drivers

Both st/mesa and the NVIDIA fail framebuffer completeness on this command sequence: 270 glRenderbufferStorageMultisample(target = GL_RENDERBUFFER, samples = 0, internalformat = GL_RGBA, width = 256, height = 256) 272 glFramebufferRenderbuffer(target = GL_DRAW_FRAMEBUFFER, attachment = GL_COLOR_ATT

Re: [Mesa-dev] [PATCH v1] i915: fixing driver crashes if too few vertices are submitted

Marius Predut writes: > Comparison with a signed expression and unsigned value > is converted to unsigned value, reason for minus value is interpreted > as a big unsigned value. For this case the "for" loop > is going into unexpected behavior. > > Bugzilla: https://bugs.freedesktop.org/show_bug.c

Re: [Mesa-dev] [Mesa-dev, 1/5] i965: Support CS in update_stage_texture_surfaces

Jordan Justen writes: > Signed-off-by: Jordan Justen > > --- > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 9 - > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c > b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c

Re: [Mesa-dev] [PATCH v2] i915/aa: fixing anti-aliasing bug for thinnest width lines

On 09/09/2015 06:59 AM, Marius Predut wrote: > On PNV platform, for 1 pixel line thickness or less, > the general anti-aliasing algorithm gives up, and a garbage line is generated. > Setting a Line Width of 0.0 specifies the rasterization > of the "thinnest" (one-pixel-wide), non-antialiased lines.

Re: [Mesa-dev] [PATCH v2] i915: fixing driver crashes if too few vertices are submitted

On 09/09/2015 11:53 AM, Ian Romanick wrote: > On 09/09/2015 11:16 AM, Marius Predut wrote: >> Comparison with a signed expression and unsigned value >> is converted to unsigned value, reason for minus value is interpreted >> as a big unsigned value. For this case the "for" loop >> is going into une

Re: [Mesa-dev] [PATCH v2] i915: fixing driver crashes if too few vertices are submitted

On 09/09/2015 11:16 AM, Marius Predut wrote: > Comparison with a signed expression and unsigned value > is converted to unsigned value, reason for minus value is interpreted > as a big unsigned value. For this case the "for" loop > is going into unexpected behavior. > > v1:Brian Paul: code style f

Re: [Mesa-dev] [PATCH 1/3] i965: Abort tiled_memcpy path for ReadPixels in case of transfer operations

On Tue, Sep 1, 2015 at 6:58 AM, Emil Velikov wrote: > Hi all > > On 21 August 2015 at 23:04, Anuj Phogat wrote: >> We have a similar check in meta pbo path. >> >> Cc: >> Signed-off-by: Anuj Phogat >> --- >> src/mesa/drivers/dri/i965/intel_pixel_read.c | 4 >> 1 file changed, 4 insertions(

Re: [Mesa-dev] [PATCH v2 1/2] egl/dri2: Close file descriptor on error.

On 09/09/2015 10:59 AM, Emil Velikov wrote: > On 9 September 2015 at 01:43, Ian Romanick wrote: >> On 09/07/2015 01:58 AM, Emil Velikov wrote: >>> From: Matt Turner >>> >>> v2: [Emil Velikov] >>> Rework the error path to a common goto, close only if we own the fd. >>> >>> Signed-off-by: Emil Veli

Re: [Mesa-dev] [PATCH] meta: Use result of texture coordinate clamping operation

In case it's of any interest, nouveau fails many of the blit-scaled tests. However nouveau's MS blits are notoriously bad. [I think I know what's wrong, just don't have the energy to fix it.] OTOH the NVIDIA driver also fails at every scale factor (for 2x and 8x, passes for 4x). On Wed, Sep 9, 20

Re: [Mesa-dev] [PATCH] meta: Use result of texture coordinate clamping operation

I'm pretty sure our implementation of this extension is complete rubbish. I have attached an image from the blit-scaled test. This result cannot be useful to anyone. On 09/09/2015 11:16 AM, Ian Romanick wrote: > On 09/09/2015 11:13 AM, Ian Romanick wrote: >> From: Ian Romanick >> >> Previously

Re: [Mesa-dev] [PATCH 8/9] tgsi: Add code for handling lodq opcode

Yes, using a new function is definitely the right way to go imho. Apart from the things mentioned by Brian, the series looks good to me. Roland Am 09.09.2015 um 12:35 schrieb Krzesimir Nowak: > This introduces new vfunc in tgsi_sampler just for this opcode. I > decided against extending get_sampl

Re: [Mesa-dev] [PATCH 7/9] softpipe: Add functions for computing mipmap level

On Wed, Sep 9, 2015 at 2:17 PM, Roland Scheidegger wrote: > Am 09.09.2015 um 12:35 schrieb Krzesimir Nowak: >> These functions will be used by textureQueryLod. >> --- >> src/gallium/drivers/softpipe/sp_tex_sample.c | 100 >> +-- >> src/gallium/drivers/softpipe/sp_tex_samp

Re: [Mesa-dev] [PATCH 7/9] softpipe: Add functions for computing mipmap level

Am 09.09.2015 um 12:35 schrieb Krzesimir Nowak: > These functions will be used by textureQueryLod. > --- > src/gallium/drivers/softpipe/sp_tex_sample.c | 100 > +-- > src/gallium/drivers/softpipe/sp_tex_sample.h | 7 ++ > 2 files changed, 101 insertions(+), 6 deletions(-

Re: [Mesa-dev] [PATCH] meta: Use result of texture coordinate clamping operation

On 09/09/2015 11:13 AM, Ian Romanick wrote: > From: Ian Romanick > > Previously the result of the complicated clamp() expression just dropped > on the floor: clamp does not modify any of its parameters. Looking at > the surrounding code, I believe this is supposed to modify the value of > tex_co

[Mesa-dev] [PATCH] meta: Use result of texture coordinate clamping operation

From: Ian Romanick Previously the result of the complicated clamp() expression just dropped on the floor: clamp does not modify any of its parameters. Looking at the surrounding code, I believe this is supposed to modify the value of tex_coord. This change (along with a change to avoid the use

Re: [Mesa-dev] [PATCH 6/9] softpipe: Split 3D to 2D coords conversion into separate function.

Am 09.09.2015 um 12:35 schrieb Krzesimir Nowak: > This is to avoid tying the conversion to sampling - textureQueryLod > will need to do the conversion too, but it does not do any sampling. > > So instead of a "sample" vfunc, there is a "convert" vfunc. The > drawback of this approach is that a "no

Re: [Mesa-dev] [PATCH 7/7] i965: Remove redundant test for NULL intel_texture_object

On 09/09/2015 06:39 AM, Chris Wilson wrote: > Having checked whether the base class (gl_texture_object) is NULL, we > know that intel_texture_object itself cannot be NULL. > > Signed-off-by: Chris Wilson > Cc: Jordan Justen > Cc: Jason Ekstrand > Cc: Kenneth Graunke > Cc: Francisco Jerez > --

[Mesa-dev] [Bug 91793] the "bin" directory is not created

https://bugs.freedesktop.org/show_bug.cgi?id=91793 --- Comment #4 from Emil Velikov --- Just had a closer look and it seems that the wgl tests are only build with cmake. Situation seems slightly confusing atm, but if you feel like helping out that'll be appreciated :) -- You are receiving this

Re: [Mesa-dev] [PATCH 5/7] i965: Remove redundant update_state from intelReadPixels()

Regardless of what happens with the rest of this series, I think this is a reasonable cleanup. This patch is Reviewed-by: Ian Romanick On 09/09/2015 06:38 AM, Chris Wilson wrote: > The very first operation performed by _mesa_readpixels() is to call > _mesa_update_state() - we do not need to do

Re: [Mesa-dev] [PATCH v2 1/2] egl/dri2: Close file descriptor on error.

On 9 September 2015 at 01:43, Ian Romanick wrote: > On 09/07/2015 01:58 AM, Emil Velikov wrote: >> From: Matt Turner >> >> v2: [Emil Velikov] >> Rework the error path to a common goto, close only if we own the fd. >> >> Signed-off-by: Emil Velikov >> --- >> src/egl/drivers/dri2/platform_drm.c |

Re: [Mesa-dev] [PATCH 5/9] softpipe: Split code getting a filter into separate function

Am 09.09.2015 um 12:35 schrieb Krzesimir Nowak: > This function will be later used by textureQueryLod. The > img_filter_func are optional, because textureQueryLod will not need > them. > --- > src/gallium/drivers/softpipe/sp_tex_sample.c | 53 > +++- > 1 file changed, 37 i

Re: [Mesa-dev] [PATCH] nvc0: keep track of cb bindings per buffer, use for upload settings

On Wed, Sep 9, 2015 at 3:17 AM, Ilia Mirkin wrote: > CB updates to bound buffers need to go through the CB_DATA endpoints, > otherwise the shader may not notice that the updates happened. > Furthermore, these updates have to go in to the same address as the > bound buffer, otherwise, again, the sh

[Mesa-dev] [PATCH 3/3] i965: Move perf_debug code to brw_codegen_*_prog()

We're trying to avoid a libdrm dependency in the core compiler, so let's move the perf_debug code one level up from the brw_*_emit() helpers to the brw_codegen_*_prog() helpers. Signed-off-by: Kristian Høgsberg Kristensen --- src/mesa/drivers/dri/i965/brw_cs.c | 31 -

[Mesa-dev] [PATCH 1/3] i965: Move compute shader code around

This moves the compute shader code around in order to make the way the code is split up more consistent. There should be no functional changes. Typically we have a few files per stage: brw_vs.c, brw_wm.c brw_gs.c: code to drive code generation and implement precompiling and ca

[Mesa-dev] [PATCH 2/3] i965: Move brw_fs_precompile() to brw_wm.c

All other precompile functions live in the brw_.c files, make fs follow the convention. Signed-off-by: Kristian Høgsberg Kristensen --- src/mesa/drivers/dri/i965/brw_fs.cpp | 58 --- src/mesa/drivers/dri/i965/brw_wm.c | 59 2

[Mesa-dev] [PATCH 0/3] Move libdrm dependencies out of backend compiler

In trying to separate the backend compiler from the core driver, I ran into a couple of inconsistencies with how the compute shader code is split across files. First patch moves code around to follow our convention. The last two patches moves fs precompile and perf debug around to move libdrm depen

Re: [Mesa-dev] [PATCH 3/9] softpipe: Split compute_lambda_lod into two functions

Just a minor nitpick. Am 09.09.2015 um 12:35 schrieb Krzesimir Nowak: > textureQueryLod returns a vec2 with a mipmap information and a > LOD. The latter needs to be not clamped. > --- > src/gallium/drivers/softpipe/sp_tex_sample.c | 55 > > 1 file changed, 39 inserti

Re: [Mesa-dev] [PATCH 2/7] vbo: Add a predraw resolve callback

On Wednesday, September 09, 2015 10:19:10 AM Ian Romanick wrote: > On 09/09/2015 10:10 AM, Kenneth Graunke wrote: > > On Wednesday, September 09, 2015 02:38:56 PM Chris Wilson wrote: > >> A common problem with using HiZ and multisampling is that surfaces need > >> to resolved prior to use. Currentl

Re: [Mesa-dev] [PATCH 2/7] vbo: Add a predraw resolve callback

On 09/09/2015 10:10 AM, Kenneth Graunke wrote: > On Wednesday, September 09, 2015 02:38:56 PM Chris Wilson wrote: >> A common problem with using HiZ and multisampling is that surfaces need >> to resolved prior to use. Currently i965 does this inside its state >> update hook, but that is a comparati

[Mesa-dev] [PATCH v2] i915: fixing driver crashes if too few vertices are submitted

Comparison with a signed expression and unsigned value is converted to unsigned value, reason for minus value is interpreted as a big unsigned value. For this case the "for" loop is going into unexpected behavior. v1:Brian Paul: code style fix. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?

Re: [Mesa-dev] [RFC 1/2] nir: Add a new lowering pass nir_lower_vec_and_coalesce

On Sep 8, 2015 23:27, "Eduardo Lima Mitev" wrote: > > This pass will propagate the destination components of a vecN instructions, > as destination of the instructions that define its sources; if certain > conditions are met. > > If all the components of the destination register in the vecN instruc

Re: [Mesa-dev] [PATCH 2/7] vbo: Add a predraw resolve callback

On Wednesday, September 09, 2015 02:38:56 PM Chris Wilson wrote: > A common problem with using HiZ and multisampling is that surfaces need > to resolved prior to use. Currently i965 does this inside its state > update hook, but that is a comparatively heavyweight operation that need > not be perfor

Re: [Mesa-dev] [Mesa-stable] [PATCH] i965/fs: Fix hang on IVB and VLV with image format mismatch.

On 09/09/2015 05:30 AM, Francisco Jerez wrote: > Ian Romanick writes: > >> On 09/03/2015 06:03 AM, Francisco Jerez wrote: >>> IVB and VLV hang sporadically when an untyped surface read or write >>> message is used to access a surface of format other than RAW, as may >>> happen when there is a mis

Re: [Mesa-dev] [PATCH] i965: Advertise 65536 for GL_MAX_UNIFORM_BLOCK_SIZE.

On 09/08/2015 10:43 PM, Kenneth Graunke wrote: > On Tuesday, September 08, 2015 08:50:41 PM Ian Romanick wrote: >> On 09/08/2015 06:04 PM, Kenneth Graunke wrote: >>> Our old value of 16384 is the minimum value. DirectX apparently >>> requires 65536 at a minimum; that's also what nVidia and the Int

Re: [Mesa-dev] [PATCH] i965: Disallow fast blit paths for CopyTexImage with PixelTransfer ops

On Wed, Sep 9, 2015 at 12:44 PM, Chris Wilson wrote: > On Tue, Sep 08, 2015 at 01:16:11PM -0700, Ian Romanick wrote: >> On 09/06/2015 09:37 AM, Chris Wilson wrote: >> > glCopyTexImage behaves similarly to glReadPixels with respect to the >> > pixel transfer operations. Therefore if any are set we

Re: [Mesa-dev] [PATCH] i965: Disallow fast blit paths for CopyTexImage with PixelTransfer ops

On Tue, Sep 08, 2015 at 01:16:11PM -0700, Ian Romanick wrote: > On 09/06/2015 09:37 AM, Chris Wilson wrote: > > glCopyTexImage behaves similarly to glReadPixels with respect to the > > pixel transfer operations. Therefore if any are set we cannot use the > > simply blit fast paths. > > Do we have

[Mesa-dev] [PATCH] r600g: update num_dw in scissor_enable workaround

"r600g: apply disable workaround on all scissors" forgot to update num_dw, fix it. Fixes: fbb423b433 "r600g: apply disable workaround on all scissors" Reported-and-tested-by: Markus Trippelsdorf Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91921 --- src/gallium/drivers/r600/r600_state_

Re: [Mesa-dev] [PATCH mesa v2 2/2] nv30: Disable msaa unless requested from the env by NV30_MAX_MSAA

On Wed, Sep 9, 2015 at 9:52 AM, Hans de Goede wrote: > Some modern apps try to use msaa without keeping in mind the > restrictions on videomem of older cards. Resulting in dmesg saying: > > [ 1197.850642] nouveau E[soffice.bin[3785]] fail ttm_validate > [ 1197.850648] nouveau E[soffice.bin[3785]

Re: [Mesa-dev] [PATCH mesa v2 1/2] nv30: Fix color resolving for nv3x cards

On Wed, Sep 9, 2015 at 9:52 AM, Hans de Goede wrote: > We do not have a generic blitter on nv3x cards, so we must use the > sifm object for color resolving. > > This commit divides the sources and dest surfaces in to tiles which > match the constraints of the sifm object, so that color resolving >

[Mesa-dev] [PATCH 1/2] drm/i915/gtt: Allow adventurous users to select enable_ppgtt=3

While support for 48b ppgtt is here, parameter enabling it is not known to the sanitize function. Let's update it to allow selecting full_48bit_ppgtt using module parameter. Cc: Michel Thierry Cc: Mika Kuoppala Signed-off-by: Michał Winiarski --- drivers/gpu/drm/i915/i915_gem_gtt.c | 5 +

[Mesa-dev] [RFC libdrm] intel: Softpin support

The goal of this series is to start a discussion whether the interface and implementation of softpin support proposed for libdrm is acceptable by all interested parties. The i915 patches are added so that it's easy to apply the series on latest drm-intel-nightly and libdrm master and start using so

[Mesa-dev] [RFC libdrm] intel: Add support for softpin

Softpin allows userspace to take greater control of GPU virtual address space and eliminates the need of relocations. It can also be used to mirror addresses between GPU and CPU (shared virtual memory). Calls to drm_intel_bo_emit_reloc are still required to build the list of drm_i915_gem_exec_objec

[Mesa-dev] [PATCH v6 2/2] drm/i915: Add soft-pinning API for execbuffer

From: Chris Wilson Userspace can pass in an offset that it presumes the object is located at. The kernel will then do its utmost to fit the object into that location. The assumption is that userspace is handling its own object locations (for example along with full-ppgtt) and that the kernel will

Re: [Mesa-dev] [PATCH 9/9] softpipe: Implement and enable textureQueryLod

On 09/09/2015 04:35 AM, Krzesimir Nowak wrote: Passes the shader piglit tests and introduces no regressions. This commit finally makes use of the refactoring in previous commits. --- src/gallium/drivers/softpipe/sp_screen.c | 2 +- src/gallium/drivers/softpipe/sp_tex_sample.c | 47 ++

Re: [Mesa-dev] [PATCH 8/9] tgsi: Add code for handling lodq opcode

On 09/09/2015 04:35 AM, Krzesimir Nowak wrote: This introduces new vfunc in tgsi_sampler just for this opcode. I decided against extending get_samples vfunc to return the mipmap level and LOD - the function's prototype is already too scary and doing the sampling for textureQueryLod would be a was

Re: [Mesa-dev] [PATCH 7/9] softpipe: Add functions for computing mipmap level

On 09/09/2015 04:35 AM, Krzesimir Nowak wrote: These functions will be used by textureQueryLod. --- src/gallium/drivers/softpipe/sp_tex_sample.c | 100 +-- src/gallium/drivers/softpipe/sp_tex_sample.h | 7 ++ 2 files changed, 101 insertions(+), 6 deletions(-) diff -

Re: [Mesa-dev] [PATCH 6/9] softpipe: Split 3D to 2D coords conversion into separate function.

On 09/09/2015 04:35 AM, Krzesimir Nowak wrote: This is to avoid tying the conversion to sampling - textureQueryLod will need to do the conversion too, but it does not do any sampling. So instead of a "sample" vfunc, there is a "convert" vfunc. The drawback of this approach is that a "noop" conve

Re: [Mesa-dev] [PATCH 5/9] softpipe: Split code getting a filter into separate function

On 09/09/2015 04:35 AM, Krzesimir Nowak wrote: This function will be later used by textureQueryLod. The img_filter_func are optional, because textureQueryLod will not need them. --- src/gallium/drivers/softpipe/sp_tex_sample.c | 53 +++- 1 file changed, 37 insertions(+)

Re: [Mesa-dev] [PATCH 3/9] softpipe: Split compute_lambda_lod into two functions

On 09/09/2015 04:35 AM, Krzesimir Nowak wrote: textureQueryLod returns a vec2 with a mipmap information and a LOD. The latter needs to be not clamped. --- src/gallium/drivers/softpipe/sp_tex_sample.c | 55 1 file changed, 39 insertions(+), 16 deletions(-) diff --g

Re: [Mesa-dev] [PATCH 4/9] softpipe: Put mip_filter_func inside a struct

On 09/09/2015 04:35 AM, Krzesimir Nowak wrote: Putting this function pointer into a struct enables grouping of several related functions in a single place. For now it is just a single function, but the struct will be later extended with a mip_level_func for returning mip level. --- src/gallium/

Re: [Mesa-dev] [PATCH 0/9] Implement textureQueryLod in softpipe

On 09/09/2015 04:35 AM, Krzesimir Nowak wrote: The following patches do some preparatory refactoring in softpipe's sp_tex_sample.{c,h} before actually implementing the feature. There is also a patch that fixes softpipe's textureLod with bias. I caught this bug when finished the textureQueryLod i

Re: [Mesa-dev] [PATCH v6 2/2] drm/i915: Add soft-pinning API for execbuffer

On Wed, Sep 09, 2015 at 04:07:09PM +0200, Michał Winiarski wrote: > From: Chris Wilson > > Userspace can pass in an offset that it presumes the object is located > at. The kernel will then do its utmost to fit the object into that > location. The assumption is that userspace is handling its own o

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