[Mesa-dev] [PATCH] i965: Add Gen8+ VS dispatch_mode assertion.

Suggested by Ben Widawsky. Signed-off-by: Kenneth Graunke Cc: Ben Widawsky --- src/mesa/drivers/dri/i965/gen8_vs_state.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mesa/drivers/dri/i965/gen8_vs_state.c b/src/mesa/drivers/dri/i965/gen8_vs_state.c index 9bfde38..28f5add 100644 --

Re: [Mesa-dev] [PATCH 3/3] i965: Use proper pitch for scalar GS pull constants and UBOs.

On Friday, May 29, 2015 03:59:32 PM Ben Widawsky wrote: > On Fri, May 29, 2015 at 12:26:40PM -0700, Kenneth Graunke wrote: > > See the corresponding code in brw_vs_surface_state.c. > > > > Signed-off-by: Kenneth Graunke > > --- > > src/mesa/drivers/dri/i965/brw_gs_surface_state.c | 10 +++---

Re: [Mesa-dev] [PATCH 1/3] i965: Drop "Vector Mask Enable" bit from 3DSTATE_GS on Gen8+.

On Friday, May 29, 2015 03:04:30 PM Ben Widawsky wrote: > On Fri, May 29, 2015 at 12:26:38PM -0700, Kenneth Graunke wrote: > > The documentation makes it pretty clear that we shouldn't use this: > > > >"Under normal conditions SW shall specify DMask, as the GS stage > > will provide a Disp

Re: [Mesa-dev] [PATCH 2/3] i965: Create a shader_dispatch_mode enum to replace VS/GS fields.

On Friday, May 29, 2015 03:58:03 PM Ben Widawsky wrote: > On Fri, May 29, 2015 at 12:26:39PM -0700, Kenneth Graunke wrote: > > We used to store the GS dispatch mode in brw_gs_prog_data while > > separately storing the VS dispatch mode in brw_vue_prog_data::simd8. > > > > This patch introduces an e

Re: [Mesa-dev] [PATCH] i965: Drop LOAD_PAYLOAD workaround in fs_visitor::emit_urb_writes().

On Saturday, May 30, 2015 08:11:40 AM Jason Ekstrand wrote: > On Sat, May 30, 2015 at 12:34 AM, Kenneth Graunke > wrote: > > Now that Jason's LOAD_PAYLOAD improvements have landed, we don't need > > this. Passing 1 for the number of header registers already takes care > > of setting force_writem

Re: [Mesa-dev] [PATCH] i965: Drop LOAD_PAYLOAD workaround in fs_visitor::emit_urb_writes().

On Sat, May 30, 2015 at 12:34 AM, Kenneth Graunke wrote: > Now that Jason's LOAD_PAYLOAD improvements have landed, we don't need > this. Passing 1 for the number of header registers already takes care > of setting force_writemask_all on the header copy. > > Signed-off-by: Kenneth Graunke > --- >

Re: [Mesa-dev] [PATCH 1/2] configure.ac: enable building GLES1 and GLES2 by default

On 28 May 2015 at 21:48, Matt Turner wrote: > On Thu, May 28, 2015 at 5:07 AM, Emil Velikov > wrote: >> On 27/05/15 16:59, Matt Turner wrote: >>> On Wed, May 27, 2015 at 4:53 AM, Emil Velikov >>> wrote: On 27 May 2015 at 11:23, Dave Airlie wrote: >> Wow, I hadn't expected such a hate

Re: [Mesa-dev] enable pbuffer for drm platform

Hi Ying, On 29 May 2015 at 23:17, Liu, Ying2 wrote: > When we tried to enable EGL on our project, we found that there was no > pbuffer support for drm platform. I got some help from Alan and Kristian. > Thank you so much! I studied platform_drm.c and compared it to other > platforms’ code. Finall

[Mesa-dev] [PATCH] i965: Drop LOAD_PAYLOAD workaround in fs_visitor::emit_urb_writes().

Now that Jason's LOAD_PAYLOAD improvements have landed, we don't need this. Passing 1 for the number of header registers already takes care of setting force_writemask_all on the header copy. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 16 1