Re: [Mesa-dev] [PATCH 02/12] nvc0: add support for setting patch vertices at draw time

On Sun, May 17, 2015 at 1:07 AM, Ilia Mirkin wrote: > Signed-off-by: Ilia Mirkin > --- > src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 1 + > src/gallium/drivers/nouveau/nvc0/nvc0_screen.h | 1 + > src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c | 3 --- > src/gallium/drivers

[Mesa-dev] [PATCH 10/12] nvc0/ir: handle loads from outputs in control shaders

--- src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp index be82944..b5404c8 100644 --- a/src/gallium/dr

[Mesa-dev] [PATCH 09/12] nvc0/ir: patch vertex count is stored in the upper bits

--- src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 4 1 file changed, 4 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp index b61f3c4..be82944 100644 --- a/src/gallium/d

[Mesa-dev] [PATCH 08/12] nv50/ir: add support for reading outputs in tess control shaders

Signed-off-by: Ilia Mirkin --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 14 -- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp index

[Mesa-dev] [PATCH 07/12] nv50/ir: set perPatch flag on load/stores to per-patch varyings

Signed-off-by: Ilia Mirkin --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp index cb9e1be

[Mesa-dev] [PATCH 12/12] nv50/ir: cleanup private enums that have graduated to gallium

Signed-off-by: Ilia Mirkin --- src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 5 - src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 2 -- 2 files changed, 7 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h b/src/gallium/drivers/nouveau/codegen/nv5

[Mesa-dev] [PATCH 00/12] Tessellation support for nvc0

This is enough to enable tessellation support on nvc0. It seems to work a lot better on my GF108 than GK208. I suspect that there's some sort of scheduling shenanigans that need to be adjusted for kepler+. Or perhaps some shader header things. Even with the GF108, I still get occasional blue trian

[Mesa-dev] [PATCH 03/12] nvc0: add handling for set_tess_state callback

Signed-off-by: Ilia Mirkin --- src/gallium/drivers/nouveau/nvc0/nvc0_context.h | 4 src/gallium/drivers/nouveau/nvc0/nvc0_state.c | 19 +++ .../drivers/nouveau/nvc0/nvc0_state_validate.c| 11 +++ 3 files changed, 34 insertions(+) diff --git a/s

[Mesa-dev] [PATCH 02/12] nvc0: add support for setting patch vertices at draw time

Signed-off-by: Ilia Mirkin --- src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 1 + src/gallium/drivers/nouveau/nvc0/nvc0_screen.h | 1 + src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c | 3 --- src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c | 6 ++ 4 files changed, 8

[Mesa-dev] [PATCH 11/12] nvc0/ir: allow tess eval output loads to be CSE'd

These only happen for gl_TessCoord which are constant. Signed-off-by: Ilia Mirkin --- src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv5

[Mesa-dev] [PATCH 01/12] nvc0: preliminary tess support

Uncomment the various functionality that was already there and add in obvious missing bits that parallel vp/gp/fp functionality. Signed-off-by: Ilia Mirkin --- src/gallium/drivers/nouveau/codegen/nv50_ir.cpp| 4 +- .../drivers/nouveau/codegen/nv50_ir_driver.h | 5 --- .../drivers/nou

[Mesa-dev] [PATCH 04/12] nvc0: TESSCOORD comes in as a sysval, not an input

Signed-off-by: Ilia Mirkin --- src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 2 -- src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 19 ++- 2 files changed, 10 insertions(+), 11 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h b/src/

[Mesa-dev] [PATCH 05/12] nvc0/ir: mark varyings as per-patch based on semantic name

Also add proper handling for PATCH semantics Signed-off-by: Ilia Mirkin --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 14 ++ src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 6 ++ 2 files changed, 16 insertions(+), 4 deletions(-) diff --git a/src/ga

[Mesa-dev] [PATCH 06/12] nv50/ir: populate info structure based on new tess properties

Signed-off-by: Ilia Mirkin --- .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 18 ++ 1 file changed, 18 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp index f523318..cb9e1

Re: [Mesa-dev] [PATCH] Fix symbol 'x86_64_entry_start' is already defined when building with LLVM/clang

It seems there is a bug filed against llvm one year ago. https://llvm.org/bugs/show_bug.cgi?id=19778 And the workaround provided in that bug entry is the same as the patch Tomasz proposed. On Fri, May 15, 2015 at 2:57 PM, Emil Velikov wrote: > On 15/05/15 20:25, Brian Paul wrote: >> Has the patc

Re: [Mesa-dev] Mesa 10.6 release plan

On 17 May 2015 at 03:34, Ilia Mirkin wrote: > Those 2 (esp tess) are nowhere close to complete. subroutines needs a > lot of cleanup, and tess needs a lot of core work. I think subroutines is pretty done, I rebased the last changes of it together last week, so I'm not sure what needs doing with i

Re: [Mesa-dev] Drop Haiku swrast code?

On 05/16/2015 07:52 AM, Alexander von Gluck IV wrote: Good morning, I'm pondering dropping the Haiku software rasterization code. (src/mesa/drivers/haiku/swrast/) The Haiku extern "C" gallium changes are complete and llvmpipe is once again compiling + working. The Mesa based swrast code howev

[Mesa-dev] [Bug 90457] New Account Request

https://bugs.freedesktop.org/show_bug.cgi?id=90457 --- Comment #5 from Brian Paul --- (In reply to Carl Worth from comment #4) > (In reply to Brian Paul from comment #3) > > Normally we don't give git privileges until after the individual has some > > history of submitting some good patches. > >

Re: [Mesa-dev] [PATCH] i965: Use NIR by default for vertex shaders on GEN8+

On Sat, May 16, 2015 at 1:07 PM, Jason Ekstrand wrote: > I found a variety of places where the user was doing, for instance, 2 > muls and 4 adds where the result of each mul is used twice. The > result is 6 instructions instead of just the 4 mad's. It's entirely > possible that, thanks to latanc

Re: [Mesa-dev] [PATCH] i965: Use NIR by default for vertex shaders on GEN8+

On Sat, May 16, 2015 at 1:01 PM, Jason Ekstrand wrote: > On Sat, May 16, 2015 at 12:59 PM, Matt Turner wrote: >> On Sat, May 16, 2015 at 12:45 PM, Jason Ekstrand >> wrote: >>> On Sat, May 16, 2015 at 12:12 PM, Matt Turner wrote: On Fri, May 8, 2015 at 3:27 AM, Kenneth Graunke wrote

Re: [Mesa-dev] [PATCH] i965: Use NIR by default for vertex shaders on GEN8+

On Sat, May 16, 2015 at 12:59 PM, Matt Turner wrote: > On Sat, May 16, 2015 at 12:45 PM, Jason Ekstrand wrote: >> On Sat, May 16, 2015 at 12:12 PM, Matt Turner wrote: >>> On Fri, May 8, 2015 at 3:27 AM, Kenneth Graunke >>> wrote: Looking at a couple of the shaders that are still worse off

Re: [Mesa-dev] [PATCH] i965: Use NIR by default for vertex shaders on GEN8+

On Sat, May 16, 2015 at 12:45 PM, Jason Ekstrand wrote: > On Sat, May 16, 2015 at 12:12 PM, Matt Turner wrote: >> On Fri, May 8, 2015 at 3:27 AM, Kenneth Graunke >> wrote: >>> Looking at a couple of the shaders that are still worse off...it looks >>> like a ton of Source shaders used to do MUL/

Re: [Mesa-dev] [PATCH] i965: Use NIR by default for vertex shaders on GEN8+

On Sat, May 16, 2015 at 12:12 PM, Matt Turner wrote: > On Fri, May 8, 2015 at 3:27 AM, Kenneth Graunke wrote: >> Looking at a couple of the shaders that are still worse off...it looks >> like a ton of Source shaders used to do MUL/ADD with an attribute and >> two immediates, and now are doing MOV

Re: [Mesa-dev] [PATCH 1/6] i965/fs: Lower integer multiplication after optimizations.

On Sat, May 16, 2015 at 11:25 AM, Matt Turner wrote: > On Sat, May 16, 2015 at 8:37 AM, Jason Ekstrand wrote: >> On Fri, May 15, 2015 at 2:02 PM, Matt Turner wrote: >>> 32-bit x 32-bit integer multiplication requires multiple instructions >>> until Broadwell. This patch just lets us treat the MU

Re: [Mesa-dev] [PATCH 6/6] i965/fs: Implement integer multiply without mul/mach.

On Sat, May 16, 2015 at 11:35 AM, Matt Turner wrote: > On Sat, May 16, 2015 at 8:36 AM, Jason Ekstrand wrote: >> On Fri, May 15, 2015 at 2:02 PM, Matt Turner wrote: >>> Ivybridge and Baytrail can't use mach with 2Q quarter control, so just >>> do it without the accumulator. Stupid accumulator. >

Re: [Mesa-dev] [PATCH] i965: Use NIR by default for vertex shaders on GEN8+

On Sat, May 16, 2015 at 3:12 PM, Matt Turner wrote: > On Fri, May 8, 2015 at 3:27 AM, Kenneth Graunke wrote: >> Looking at a couple of the shaders that are still worse off...it looks >> like a ton of Source shaders used to do MUL/ADD with an attribute and >> two immediates, and now are doing MOV/

Re: [Mesa-dev] [PATCH] i965: Use NIR by default for vertex shaders on GEN8+

On Fri, May 8, 2015 at 3:27 AM, Kenneth Graunke wrote: > Looking at a couple of the shaders that are still worse off...it looks > like a ton of Source shaders used to do MUL/ADD with an attribute and > two immediates, and now are doing MOV/MOV/MAD. I just looked, and thought that too for a minute

Re: [Mesa-dev] [PATCH 6/6] i965/fs: Implement integer multiply without mul/mach.

On Sat, May 16, 2015 at 8:36 AM, Jason Ekstrand wrote: > On Fri, May 15, 2015 at 2:02 PM, Matt Turner wrote: >> Ivybridge and Baytrail can't use mach with 2Q quarter control, so just >> do it without the accumulator. Stupid accumulator. >> --- >> src/mesa/drivers/dri/i965/brw_fs.cpp | 94 >> +++

Re: [Mesa-dev] [PATCH 1/6] i965/fs: Lower integer multiplication after optimizations.

On Sat, May 16, 2015 at 8:37 AM, Jason Ekstrand wrote: > On Fri, May 15, 2015 at 2:02 PM, Matt Turner wrote: >> 32-bit x 32-bit integer multiplication requires multiple instructions >> until Broadwell. This patch just lets us treat the MUL instruction in >> the FS backend like it operates on Broa

Re: [Mesa-dev] Mesa 10.6 release plan

Those 2 (esp tess) are nowhere close to complete. subroutines needs a lot of cleanup, and tess needs a lot of core work. On Sat, May 16, 2015 at 1:21 PM, Dragomir Ivanov wrote: > If these two go: > GL_ARB_shader_subroutine > GL_ARB_tessellation_shader > > Should the Mesa release be called Mesa 11

Re: [Mesa-dev] Mesa 10.6 release plan

If these two go: GL_ARB_shader_subroutine GL_ARB_tessellation_shader Should the Mesa release be called Mesa 11? Since new major of OGL is reached. Dragomir On Sat, May 16, 2015 at 8:11 PM, Jason Ekstrand wrote: > There was some discussion on IRC today about what the official date > is. A bun

Re: [Mesa-dev] Mesa 10.6 release plan

There was some discussion on IRC today about what the official date is. A bunch of Intel people have been working under the assumption that it's the end of next week, not this week. Was there some non-public discussion and a decision to slip? We would like to get two things in before the branch

Re: [Mesa-dev] [PATCH 04/15] egl: import headers from Khronos EGL registry

On Fri, May 15, 2015 at 12:33 AM, Emil Velikov wrote: >> diff --git a/src/egl/main/egltypedefs.h b/src/egl/main/egltypedefs.h >> index e90959a..2430033 100644 >> --- a/src/egl/main/egltypedefs.h >> +++ b/src/egl/main/egltypedefs.h >> @@ -35,6 +35,8 @@ >> >> #include >> #include >> +#include >

Re: [Mesa-dev] [PATCH 0/6] i965/fs: Integer multiplication improvements

On Fri, May 15, 2015 at 2:02 PM, Matt Turner wrote: > This series reworks how we do integer multiplication in the i965/fs > backend and significantly improves code generation for Broadwell's > scalar vertex shaders with NIR by allowing constant propagation into > the MUL instruction (wow that code

Re: [Mesa-dev] [PATCH 1/6] i965/fs: Lower integer multiplication after optimizations.

On Fri, May 15, 2015 at 2:02 PM, Matt Turner wrote: > 32-bit x 32-bit integer multiplication requires multiple instructions > until Broadwell. This patch just lets us treat the MUL instruction in > the FS backend like it operates on Broadwell, and after optimizations > we lower it into a sequence

Re: [Mesa-dev] [PATCH 6/6] i965/fs: Implement integer multiply without mul/mach.

On Fri, May 15, 2015 at 2:02 PM, Matt Turner wrote: > Ivybridge and Baytrail can't use mach with 2Q quarter control, so just > do it without the accumulator. Stupid accumulator. > --- > src/mesa/drivers/dri/i965/brw_fs.cpp | 94 > +--- > 1 file changed, 66 inserti

[Mesa-dev] Drop Haiku swrast code?

Good morning, I'm pondering dropping the Haiku software rasterization code. (src/mesa/drivers/haiku/swrast/) The Haiku extern "C" gallium changes are complete and llvmpipe is once again compiling + working. The Mesa based swrast code however doesn't have a C state_tracker to hide C++ code behi

Re: [Mesa-dev] i965 implementation of the ARB_shader_image_load_store built-ins. (v3)

Jason Ekstrand writes: > On May 15, 2015 2:40 PM, "Francisco Jerez" wrote: >> >> Jason Ekstrand writes: >> >> > On Fri, May 15, 2015 at 9:51 AM, Francisco Jerez > wrote: >> >> Jason Ekstrand writes: >> >> >> >>> I haven't said much about this series up until now. I've mostly sat >> >>> and w