Extends the syntax of GALLIUM_HUD environment variable to:
- Add options to set the size and exact location of each pane.
- Add an option to limit the maximum allowed value of the X axis on a
pane, clamping the graph down to not go above this value.
- Add an option to auto-adjust the value of the
https://bugs.freedesktop.org/show_bug.cgi?id=89773
Vinson Lee changed:
What|Removed |Added
Keywords||bisected
Blocks|
https://bugs.freedesktop.org/show_bug.cgi?id=79706
Vinson Lee changed:
What|Removed |Added
Depends on||89773
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https://bugs.freedesktop.org/show_bug.cgi?id=89960
Vinson Lee changed:
What|Removed |Added
Blocks||79706
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You are receiving this mail becau
https://bugs.freedesktop.org/show_bug.cgi?id=79706
Vinson Lee changed:
What|Removed |Added
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https://bugs.freedesktop.org/show_bug.cgi?id=89330
Vinson Lee changed:
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The same rationale applies here as for the hash table.
Power of two size should give better performance,
and using the algorithm hash = sh + i/2 + i*i/2
should result in only distinct hash values when hitting collisions.
Difference at 95.0% confidence
-7.9505 +/- 2.44011
-5.04357% +/- 1.54
Add a test to exercise a worst case collision scenario
that may cause us to not be able to find an empty
slot in the table even though it is not full.
This hits the bug in my last revision of the series
converting the hash table to quadratic probing.
Signed-off-by: Thomas Helland
---
src/util/te
This should give better cache locality, less memory consumption,
less code, and should also be faster since we avoid modulo operations.
Also change table size to be power of two.
This gives better performance as we can do bitmasking instead of
modulo operations for fitting the hash in the address s
The performance numbers (shader-db runtime) are:
Difference at 95.0% confidence
-14.7608 +/- 3.36786
-9.05064% +/- 2.06501%
(Original runtime was 160 seconds)
While the profile data looked promising for increasing the
table size we start with, decreasing load factor, and integer hashin
https://bugs.freedesktop.org/show_bug.cgi?id=89018
--- Comment #7 from Jason Ekstrand ---
(In reply to Sami Liedes from comment #6)
> I see this AFAICT exactly same issue with both radeonsi and swrast on recent
> HEAD of mesa, so this is not Intel-specific. FWIW, I also tried with Mesa
> 10.3.7 (
https://bugs.freedesktop.org/show_bug.cgi?id=89018
Sami Liedes changed:
What|Removed |Added
Status|NEEDINFO|NEW
CC|
The description should be "... for people not using --enable-debug and
using -DDEBUG".
Marek
On Sat, Apr 11, 2015 at 9:57 PM, Matt Turner wrote:
> On Sat, Apr 11, 2015 at 12:11 PM, Marek Olšák wrote:
>> From: Marek Olšák
>>
>> ---
>> configure.ac | 4 +++-
>> 1 file changed, 3 insertions(+),
The problem is NDEBUG is defined if --enable-debug isn't used. If I
add -DDEBUG manually to CFLAGS, both DEBUG and NDEBUG will be defined.
That means Gallium assertions will be enabled (because DEBUG is
defined) and Mesa core assertion will be disabled (because NDEBUG is
defined).
I was about to s
On Sat, Apr 11, 2015 at 2:13 PM, Matt Turner wrote:
> Readding mesa-dev@ to Cc.
>
> On Sat, Apr 11, 2015 at 11:06 AM, Darius Goad wrote:
>> Well, I did make a v2, but all that did was fix a bug. How does this not
>> come close?
>
> Well, for instance the i965 driver supports ~5 generations of
> h
On Saturday, April 11, 2015 01:38:44 PM Ben Widawsky wrote:
> Certain platforms support the ability to sample from a texture, and write it
> out
> to the file RT - thus saving a costly send instructions (note that this is a
> potnential win if one wanted to backport to a tag that didn't have the p
On Sat, Apr 11, 2015 at 3:12 PM, Thomas Helland
wrote:
>> Yes, copy propagation probably won't be so useful once we have value
>> range propagation; the former is a special case of the latter. Note
>> that we have a nifty way of actually doing the constant folding
>> (nir_constant_expressions.py a
Reviewed-by: Jason Ekstrand
On Sat, Apr 11, 2015 at 1:38 PM, Ben Widawsky
wrote:
> Certain platforms support the ability to sample from a texture, and write it
> out
> to the file RT - thus saving a costly send instructions (note that this is a
> potnential win if one wanted to backport to a ta
Certain platforms support the ability to sample from a texture, and write it out
to the file RT - thus saving a costly send instructions (note that this is a
potnential win if one wanted to backport to a tag that didn't have the patch
from Topi which removed excess MOVs from LOAD_PAYLOAD - 97caf5fa
Starting with Skylake, the display engine is capable of scanning out from
Y-tiled buffers. As such, we can and should use Y-tiling for better efficiency.
Note that the buffer allocation done for mipmaps will already never allocate an
X-tiled buffer for GEN9.
Signed-off-by: Ben Widawsky
---
src/
On Sat, Apr 11, 2015 at 12:11 PM, Marek Olšák wrote:
> From: Marek Olšák
>
> ---
Ugh, these two functions have been dead since 2012 and 2010. :(
Reviewed-by: Matt Turner
___
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mesa-dev@lists.freedesktop.org
http://lists.freedeskto
On Sat, Apr 11, 2015 at 12:11 PM, Marek Olšák wrote:
> From: Marek Olšák
>
> ---
> configure.ac | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/configure.ac b/configure.ac
> index 4ed4b74..113fb49 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -421,7 +421,9 @@
2015-04-08 18:03 GMT+02:00 Jason Ekstrand :
> On Tue, Apr 7, 2015 at 4:52 PM, Connor Abbott wrote:
>> Hi Thomas,
>>
>> Thanks for submitting a proposal! Some comments/answers below.
>>
>> On Tue, Apr 7, 2015 at 3:34 PM, Thomas Helland
>> wrote:
>>> Hi,
>>>
>>> For those that don't know I've submi
From: Marek Olšák
Cc: 10.4 10.5
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 8a53d80..00d8785 100644
--- a/src/mesa/state_
From: Marek Olšák
---
src/mesa/state_tracker/st_atom_shader.c| 3 +--
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 24
src/mesa/state_tracker/st_glsl_to_tgsi.h | 7 ---
3 files changed, 9 insertions(+), 25 deletions(-)
diff --git a/src/mesa/state_tracker/st_
From: Marek Olšák
This fixes piglit shaders@glsl-fs-uniform-array-loop-unroll with immediate
shader compilation - it's a compiler test, so it has never been translated
to TGSI before.
Cc: 10.4 10.5
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 11 +++
1 file changed, 7 insertions(+)
From: Marek Olšák
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 00d8785..26d859e 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b
From: Marek Olšák
This will allow removing the uniform storage re-association during
TGSI generation at draw time.
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 44 --
1 file changed, 24 insertions(+), 20 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to
Thanks for the lengthy response :)
8. apr. 2015 01.52 skrev "Connor Abbott" :
>
> Hi Thomas,
>
> Thanks for submitting a proposal! Some comments/answers below.
>
> On Tue, Apr 7, 2015 at 3:34 PM, Thomas Helland
> wrote:
> > Hi,
> >
> > For those that don't know I've submitted a proposal for this
From: Marek Olšák
This hack is no longer needed. (see the previous commit)
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 24
1 file changed, 24 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 75
From: Marek Olšák
---
src/mesa/program/prog_parameter.c | 72 ---
src/mesa/program/prog_parameter.h | 9 -
2 files changed, 81 deletions(-)
diff --git a/src/mesa/program/prog_parameter.c
b/src/mesa/program/prog_parameter.c
index cdfe251..53e9813 100644
From: Marek Olšák
---
configure.ac | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/configure.ac b/configure.ac
index 4ed4b74..113fb49 100644
--- a/configure.ac
+++ b/configure.ac
@@ -421,7 +421,9 @@ if test "x$enable_debug" = xyes; then
fi
fi
else
- DEFINE
From: Marek Olšák
---
src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
index 1690194..333f7ae 100644
--- a/src/gallium/drivers/r
On Sat, Apr 11, 2015 at 09:40:36AM -0700, Matt Turner wrote:
> On Sat, Apr 11, 2015 at 2:46 AM, Kenneth Graunke
> wrote:
> > new_prim was declared as a stack variable within a nested scope; we
> > tried to retain a pointer to that data beyond the scope, which is bogus.
> >
> > GCC with -O1 elimin
On Fri, Apr 10, 2015 at 07:39:51PM +0100, Neil Roberts wrote:
> Commit e93566a15c61c33faa changed the message header code needed to
> make Skylake use SIMD4x2 so that it uses a register with width 4
> instead of 8 as the source register in the send message. However it
> also changed the width for t
On Wednesday, April 08, 2015 12:25:27 PM Martin Peres wrote:
> On 08/04/15 10:06, Kenneth Graunke wrote:
> > Previously, we translated into NIR and did all the optimizations and
> > lowering as part of running fs_visitor. This meant that we did all of
> > that work twice for fragment shaders - onc
On Sat, Apr 11, 2015 at 11:25 AM, Ben Widawsky wrote:
> On Fri, 10 Apr 2015 15:49:32 -0700
> Jordan Justen wrote:
>
>> Sounds reasonable. Assuming you build tested, series
>> Reviewed-by: Jordan Justen
>
> Same
> r-b: bwidawsk...
I think this is how we wind up with so many typos in the commit l
On Fri, 10 Apr 2015 15:49:32 -0700
Jordan Justen wrote:
> Sounds reasonable. Assuming you build tested, series
> Reviewed-by: Jordan Justen
Same
r-b: bwidawsk...
Though I am not sure I see the utility of 4 patches instead of 1...
>
> On 2015-04-10 13:45:24, Mark Janes wrote:
> > Please pard
Readding mesa-dev@ to Cc.
On Sat, Apr 11, 2015 at 11:06 AM, Darius Goad wrote:
> Well, I did make a v2, but all that did was fix a bug. How does this not
> come close?
Well, for instance the i965 driver supports ~5 generations of
hardware, three of them that don't support doubles. There's not a
On Sat, Apr 11, 2015 at 10:23 AM, Matt Turner wrote:
> Commit e16c5c90 was replacing 'region' with 'mt', leaving this
> nonsensical code.
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/
On Sat, Apr 11, 2015 at 10:38 AM, Darius Goad wrote:
> This patch set enables ARB_gpu_shader_fp64 for i965.
>
> Darius Goad (3):
> i965/fs: Add basic support for double-precision floating-point types
> for Gen7+
> i965: Add support for double-precision floating-point types on Gen8+.
> il
---
src/mesa/drivers/dri/i965/brw_reg.h | 1 +
src/mesa/drivers/dri/i965/brw_shader.cpp | 19 +--
2 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_reg.h
b/src/mesa/drivers/dri/i965/brw_reg.h
index 924b059..143a667 100644
--- a/src
---
src/gallium/drivers/ilo/ilo_screen.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/drivers/ilo/ilo_screen.c
b/src/gallium/drivers/ilo/ilo_screen.c
index 80ea4c7..e6a8354 100644
--- a/src/gallium/drivers/ilo/ilo_screen.c
+++ b/src/gallium/drivers/ilo/ilo_screen.c
@@ -147,6
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4 ++--
src/mesa/drivers/dri/i965/brw_shader.cpp | 3 ++-
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 1 +
4 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/mesa/
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4 ++--
src/mesa/drivers/dri/i965/brw_shader.cpp | 3 ++-
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 1 +
4 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/mesa/
---
src/gallium/drivers/ilo/ilo_screen.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/drivers/ilo/ilo_screen.c
b/src/gallium/drivers/ilo/ilo_screen.c
index 80ea4c7..4e6988f 100644
--- a/src/gallium/drivers/ilo/ilo_screen.c
+++ b/src/gallium/drivers/ilo/ilo_screen.c
@@ -147,6
---
src/mesa/drivers/dri/i965/brw_reg.h | 1 +
src/mesa/drivers/dri/i965/brw_shader.cpp | 19 +--
2 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_reg.h
b/src/mesa/drivers/dri/i965/brw_reg.h
index 924b059..143a667 100644
--- a/src
This patch set enables ARB_gpu_shader_fp64 for i965.
Darius Goad (3):
i965/fs: Add basic support for double-precision floating-point types
for Gen7+
i965: Add support for double-precision floating-point types on Gen8+.
ilo: Enable ARB_gpu_shader_fp64
src/gallium/drivers/ilo/ilo_screen.
Commit e16c5c90 was replacing 'region' with 'mt', leaving this
nonsensical code.
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.
Coverity is confused by the "float < int / 2" expression and suggests
casting MAX_GLUINT to unsigned, which I believe it was supposed to have
been already.
---
src/mesa/swrast/s_tritemp.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/swrast/s_tritemp.h b/src/mesa/swr
ARB_uniform_buffer_object spec says:
"The total amount of buffer object storage available for any given uniform
block is subject to an implementation-dependent limit; the maximum amount
of available space, in basic machine units, can be queried by calling
GetIntegerv with the constant MAX_UNIFORM_B
On Sat, Apr 11, 2015 at 2:46 AM, Kenneth Graunke wrote:
> new_prim was declared as a stack variable within a nested scope; we
> tried to retain a pointer to that data beyond the scope, which is bogus.
>
> GCC with -O1 eliminated most of the code that set new_prim's fields.
>
> Move the declaration
new_prim was declared as a stack variable within a nested scope; we
tried to retain a pointer to that data beyond the scope, which is bogus.
GCC with -O1 eliminated most of the code that set new_prim's fields.
Move the declaration to fix the bug.
Bugzilla: https://bugs.freedesktop.org/show_bug.c
On Friday, April 10, 2015 10:49:51 PM Ben Widawsky wrote:
> On Fri, Apr 10, 2015 at 07:50:19PM -0700, Kenneth Graunke wrote:
> > On Friday, April 10, 2015 12:52:03 PM Ben Widawsky wrote:
> > > Based originally on a patch from Ken in May 2014 of the same title. Things
> > > changed enough that I did
On Friday, April 10, 2015 03:52:53 PM Ben Widawsky wrote:
> This optimization is disabled by default, and it is recommended to be enabled.
> The docs do not provide much info.
>
> Cc: Ian Romanick
> Cc: "Neil S. Roberts"
> Signed-off-by: Ben Widawsky
> ---
>
> Notes:
> I am enabling this o
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