Hi,
I thought mesa was C++ by now? That API is really C-ish.
OG.
On Wed, Feb 18, 2015 at 2:12 AM, Kenneth Graunke wrote:
> On Friday, February 06, 2015 04:00:10 PM Eric Anholt wrote:
>> v2: Rebase on the nir_opcodes.h python code generation support.
>> v3: Use SSA values, and set an appro
On Tue, Feb 17, 2015 at 02:03:36PM +, Neil Roberts wrote:
> According to the bspec since Skylake the qpitch value in the surface
> formats should be measured in pixels rather than rows for 1D textures.
> ---
> src/mesa/drivers/dri/i965/gen8_surface_state.c | 30
> +++---
>
On Tue, Feb 17, 2015 at 05:39:33PM -0800, Kenneth Graunke wrote:
> There's some debate about whether we should use Meta or BLORP,
> but either should run circles around the BLT engine.
>
> In particular, this means that Gen8+ will use the 3D engine for blits,
> like we do on Gen6-7.
>
> Improves
On Wed, Feb 18, 2015 at 1:14 AM, Kenneth Graunke wrote:
> On Friday, February 13, 2015 11:02:49 PM Ben Widawsky wrote:
>> This was originally part of a single patch which added the extension, and
>> implemented it for i965 classic. For information about the evolution of the
>> patch, please see th
Ok, so I think there are two things left that I'm going to ask for:
1) Add a nir_builder_init(nir_builder *, nir_function_impl *),
nir_builder_insert_after_cf_list(nir_builder *, exec_list *), and if
you feel like it (you could use it in tgsi -> nir) a helper function
nir_builder_init_after_cf_lis
https://bugs.freedesktop.org/show_bug.cgi?id=89199
Bug ID: 89199
Summary: u_math.h:591:4: error: implicit declaration of
function 'ffsll'
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: NetBSD
https://bugs.freedesktop.org/show_bug.cgi?id=79706
Vinson Lee changed:
What|Removed |Added
Depends on||89199
--
You are receiving this mail becau
On Friday, February 13, 2015 11:02:49 PM Ben Widawsky wrote:
> This was originally part of a single patch which added the extension, and
> implemented it for i965 classic. For information about the evolution of the
> patch, please see the subsequent commit.
>
> One difference here as compared to t
On Saturday, February 14, 2015 12:53:42 PM Jordan Justen wrote:
> Signed-off-by: Jordan Justen
> ---
> src/mesa/main/context.h | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/src/mesa/main/context.h b/src/mesa/main/context.h
> index d902ea7..34799ba 100644
> --- a/src/mesa/
On Tuesday, February 17, 2015 04:26:19 PM Ben Widawsky wrote:
> NOTE: The implementation was initially one patch, this. All the history is
> kept
> here, even though all the core mesa changes were moved to the parent of this
> patch.
>
> This patch implements ARB_pipeline_statistics_query. This a
On Tue, Feb 17, 2015 at 3:17 PM, Connor Abbott wrote:
> On Tue, Feb 17, 2015 at 3:04 PM, Francisco Jerez
> wrote:
>> Jason Ekstrand writes:
>>
>>> On Mon, Feb 16, 2015 at 11:39 AM, Francisco Jerez
>>> wrote:
>>>
The round-robin allocation strategy is expected to decrease the amount
o
On 02/17/2015 08:23 PM, Matt Turner wrote:
On Tue, Feb 17, 2015 at 3:27 AM, Tapani Pälli wrote:
Here is a skeleton for the GL_ARB_program_interface_query API functions.
Adding the enum values makes it possible to start introducing changes in
the current shader query functions using these values
https://bugs.freedesktop.org/show_bug.cgi?id=89131
--- Comment #6 from James Harvey ---
@Michel - well, perhaps not... :)
@Park, Jeongmin - Thanks for taking the time to dig into this. I realize this
bug is probably a low priority itme, but if you do find time to add a check for
the failure con
On Tuesday, February 17, 2015 04:59:37 PM Matt Turner wrote:
> On Tue, Feb 17, 2015 at 4:44 PM, Ben Widawsky
> wrote:
> > With scalar VS, it so happens that many vertex shaders will line up in a
> > such a
> > way that two SIMD8 instructions can be collapsed into 1 SIMD16 instruction.
> > For
>
On Tue, Feb 17, 2015 at 06:14:14PM -0800, Ian Romanick wrote:
> On 02/17/2015 04:21 PM, Ben Widawsky wrote:
> > On Tue, Feb 17, 2015 at 11:41:01AM -0800, Ian Romanick wrote:
> >> On 02/13/2015 11:02 PM, Ben Widawsky wrote:
> >>> This was originally part of a single patch which added the extension,
On Tue, Feb 17, 2015 at 11:03:19AM -0800, Jordan Justen wrote:
> An *untested* update for d9cd982d556be560af3bcbcdaf62b6b93eb934a5.
>
> A similar change was needed for CS to allow the piglit test
> tests/spec/arb_compute_shader/execution/simple-barrier-atomics.shader_test
> to pass.
>
> I think t
On Mon, Feb 16, 2015 at 10:25 AM, Matt Turner wrote:
> On Mon, Feb 16, 2015 at 1:36 AM, Marc Dietrich wrote:
>> Avoid redefined symbol errors in clang. Based on a suggestion from
>> Rafael à vila de EspÃndola in
>> http://llvm.org/bugs/show_bug.cgi?id=19778.
>>
>> Signed-off-by: Marc Dietrich
On Tuesday, February 17, 2015 07:31:26 PM Matt Turner wrote:
> To insert an instruction at the end of a basic block, we typically do
> something like
>
>inst = block->last_non_control_flow_inst();
>inst->insert_after(block, new_inst);
>
> But blocks can consist of a single control flow in
To insert an instruction at the end of a basic block, we typically do
something like
inst = block->last_non_control_flow_inst();
inst->insert_after(block, new_inst);
But blocks can consist of a single control flow instruction, so inst
will actually be the exec_list's head sentinel. We shoul
On 02/17/2015 04:35 PM, Ilia Mirkin wrote:
> On Tue, Feb 17, 2015 at 7:12 PM, Jordan Justen
> wrote:
>> +++
>> b/tests/spec/arb_shader_atomic_counters/execution/vs-simple-inc-dec-read.shader_test
>> @@ -0,0 +1,70 @@
>> +# Simple test of atomicCounterIncrement, atomicCounterDecrement and
>> +# ato
Reviewed-by: Matt Turner
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On 02/17/2015 04:21 PM, Ben Widawsky wrote:
> On Tue, Feb 17, 2015 at 11:41:01AM -0800, Ian Romanick wrote:
>> On 02/13/2015 11:02 PM, Ben Widawsky wrote:
>>> This was originally part of a single patch which added the extension, and
>>> implemented it for i965 classic. For information about the evo
On Tue, Feb 17, 2015 at 12:36 PM, Sedat Dilek wrote:
> On Sat, Feb 14, 2015 at 6:20 PM, Dimitry Andric wrote:
>> On 11 Feb 2015, at 11:16, Sedat Dilek wrote:
>>>
>>> On Wed, Feb 11, 2015 at 12:09 AM, Emil Velikov
>>> wrote:
On 10/02/15 13:17, Dimitry Andric wrote:
> On 09 Feb 2015, at
On Tue, Feb 17, 2015 at 12:47 PM, Marc Dietrich wrote:
> Am Dienstag, 17. Februar 2015, 12:42:00 schrieb Sedat Dilek:
>> On Tue, Feb 17, 2015 at 12:38 PM, Marc Dietrich wrote:
>> > Am Dienstag, 17. Februar 2015, 11:58:06 schrieb Sedat Dilek:
>> >> On Tue, Feb 17, 2015 at 10:40 AM, Marc Dietrich
On Mon, Feb 16, 2015 at 12:45 PM, Marc Dietrich wrote:
> Am Montag, 16. Februar 2015, 12:42:19 schrieb Sedat Dilek:
>> On Mon, Feb 16, 2015 at 10:39 AM, Marc Dietrich wrote:
>> > Am Samstag, 14. Februar 2015, 18:20:12 schrieb Dimitry Andric:
>> >> On 11 Feb 2015, at 11:16, Sedat Dilek wrote:
>>
On Tue, Feb 17, 2015 at 10:40 AM, Marc Dietrich wrote:
> Avoid redefined symbol errors in clang. Based on a suggestion from
> Rafael Ávila de Espíndola in
> http://llvm.org/bugs/show_bug.cgi?id=19778.
>
> Signed-off-by: Marc Dietrich
> ---
> v2: - no change
> v3: - include util directory in Make
On Tue, Feb 17, 2015 at 10:40 AM, Marc Dietrich wrote:
> This adds clang/gcc visibility macro detection to configure and util/macros.h.
> This is can be used to conveniently add e.g. a "HIDDEN" attribute to a
> function.
>
> Signed-off-by: Marc Dietrich
> ---
> v2: use VISIBILITY_*FLAGS instead
On Tue, Feb 17, 2015 at 10:12 AM, Marc Dietrich wrote:
> Am Dienstag, 17. Februar 2015, 10:05:33 schrieb Sedat Dilek:
>> On Mon, Feb 16, 2015 at 12:45 PM, Marc Dietrich wrote:
>> > Am Montag, 16. Februar 2015, 12:42:19 schrieb Sedat Dilek:
>> >> On Mon, Feb 16, 2015 at 10:39 AM, Marc Dietrich wr
On Tue, Feb 17, 2015 at 12:59 PM, Marc Dietrich wrote:
> Am Dienstag, 17. Februar 2015, 12:53:17 schrieb Sedat Dilek:
>> On Tue, Feb 17, 2015 at 12:47 PM, Marc Dietrich wrote:
>> > Am Dienstag, 17. Februar 2015, 12:42:00 schrieb Sedat Dilek:
>> >> On Tue, Feb 17, 2015 at 12:38 PM, Marc Dietrich
On Tue, Feb 17, 2015 at 12:38 PM, Marc Dietrich wrote:
> Am Dienstag, 17. Februar 2015, 11:58:06 schrieb Sedat Dilek:
>> On Tue, Feb 17, 2015 at 10:40 AM, Marc Dietrich wrote:
>> > Avoid redefined symbol errors in clang. Based on a suggestion from
>> > Rafael Ávila de Espíndola in
>> > http://ll
On Tue, Feb 17, 2015 at 12:59 PM, Marc Dietrich wrote:
> Am Dienstag, 17. Februar 2015, 12:53:17 schrieb Sedat Dilek:
>> On Tue, Feb 17, 2015 at 12:47 PM, Marc Dietrich wrote:
>> > Am Dienstag, 17. Februar 2015, 12:42:00 schrieb Sedat Dilek:
>> >> On Tue, Feb 17, 2015 at 12:38 PM, Marc Dietrich
On Tue, Feb 17, 2015 at 10:40 AM, Marc Dietrich wrote:
> Patch 1 adds a check for the compilers visibility macro to configure.ac.
> Patch 2 avoids redefined symbol errors in clang of the tls entry points.
> Based on a suggestion from Rafael Ávila de Espíndola
>
> in http://llvm.org/bugs/show_bug
On Tue, Feb 17, 2015 at 04:59:37PM -0800, Matt Turner wrote:
> On Tue, Feb 17, 2015 at 4:44 PM, Ben Widawsky
> wrote:
> > With scalar VS, it so happens that many vertex shaders will line up in a
> > such a
> > way that two SIMD8 instructions can be collapsed into 1 SIMD16 instruction.
> > For
>
On Sat, Feb 14, 2015 at 6:20 PM, Dimitry Andric wrote:
> On 11 Feb 2015, at 11:16, Sedat Dilek wrote:
>>
>> On Wed, Feb 11, 2015 at 12:09 AM, Emil Velikov
>> wrote:
>>> On 10/02/15 13:17, Dimitry Andric wrote:
On 09 Feb 2015, at 18:52, Sedat Dilek wrote:
>
> On Mon, Feb 9, 2015 at
On Tue, Feb 17, 2015 at 1:26 PM, Marc Dietrich wrote:
> Am Dienstag, 17. Februar 2015, 13:13:28 schrieb Sedat Dilek:
>> On Tue, Feb 17, 2015 at 12:38 PM, Marc Dietrich wrote:
>> > Am Dienstag, 17. Februar 2015, 11:58:06 schrieb Sedat Dilek:
>> >> On Tue, Feb 17, 2015 at 10:40 AM, Marc Dietrich w
On Tue, Feb 03, 2015 at 03:16:51PM +, danielx.j.van.der.w...@intel.com
wrote:
> From: Daniel van der Wath
>
> The value stored in "handle" is trashed before being copied into the
> surface's sid. Use the original value from "whandle->handle" instead.
> This fixes a bug with Weston running o
Signed-off-by: Haixia Shi
---
src/egl/drivers/dri2/platform_drm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/egl/drivers/dri2/platform_drm.c
b/src/egl/drivers/dri2/platform_drm.c
index 02e87f7..834387f 100644
--- a/src/egl/drivers/dri2/platform_drm.c
+++ b/src/egl
The NULL platform is for off-screen rendering only. Render node support is
required.
Only consider the render nodes. Do not use normal nodes as they require
auth hooks.
Signed-off-by: Haixia Shi
---
src/egl/drivers/dri2/Makefile.am | 5 ++
src/egl/drivers/dri2/egl_dri2.c | 13 ++-
s
There's some debate about whether we should use Meta or BLORP,
but either should run circles around the BLT engine.
In particular, this means that Gen8+ will use the 3D engine for blits,
like we do on Gen6-7.
Improves performance in "copypixrate -blit -back" (from Mesa demos)
by 232.037% +/- 3.15
On Friday, February 06, 2015 04:00:10 PM Eric Anholt wrote:
> v2: Rebase on the nir_opcodes.h python code generation support.
> v3: Use SSA values, and set an appropriate writemask on dot products.
> v4: Make the arguments be SSA references as well. This lets you stack up
> expressions in the
On Tue, Feb 17, 2015 at 4:44 PM, Ben Widawsky
wrote:
> With scalar VS, it so happens that many vertex shaders will line up in a such
> a
> way that two SIMD8 instructions can be collapsed into 1 SIMD16 instruction.
> For
> example
>
> The following two MOVs
> mov(8) g124<1>Fg6<8
On Tue, Feb 17, 2015 at 4:40 PM, Eric Anholt wrote:
> As far as I know, none of the others (i915 i965 nouveau r200 radeon) could
> appear on an ARM device.
> ---
I'm not going to object, but I've always thought [1] it was somewhat
absurd that a person could run configure without specifying what
d
On Tuesday, February 17, 2015 04:17:48 PM Matt Turner wrote:
> On Tue, Feb 17, 2015 at 3:45 PM, Kenneth Graunke
> wrote:
> > On Wednesday, February 04, 2015 08:21:24 PM Matt Turner wrote:
[snip]
> >> + /* Remove constants from the table that don't have enough uses to make
> >> them
> >> +*
With scalar VS, it so happens that many vertex shaders will line up in a such a
way that two SIMD8 instructions can be collapsed into 1 SIMD16 instruction. For
example
The following two MOVs
mov(8) g124<1>Fg6<8,8,1>F { align1 1Q
compacted };
mov(8) g
As far as I know, none of the others (i915 i965 nouveau r200 radeon) could
appear on an ARM device.
---
configure.ac | 4
1 file changed, 4 insertions(+)
diff --git a/configure.ac b/configure.ac
index d4cf4b8..e9bd4cf 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1115,6 +1115,10 @@ if tes
On Tue, Feb 17, 2015 at 7:21 PM, Ben Widawsky
wrote:
> On Tue, Feb 17, 2015 at 11:41:01AM -0800, Ian Romanick wrote:
>> On 02/13/2015 11:02 PM, Ben Widawsky wrote:
>> > This was originally part of a single patch which added the extension, and
>> > implemented it for i965 classic. For information a
On Wed, 18 Feb 2015 01:17:32 +0100, Dave Airlie wrote:
From: Dave Airlie
When we schedule an instructions with undefined value, we
eventually will use 0, which is a constant, however sb wasn't
taking this into account and creating ops with illegal scalar
swizzles.
this replaces my fix for op
On Sunday, February 01, 2015 01:17:19 PM Eric Anholt wrote:
> I'm pretty happy with how it turned out. What I'm not sure on is that
> I've got a couple of places where I replicated another transformation,
> like fsat(fsat(a)) -> fsat(a) but with a lowered fsat. I could see
> potentially having on
On Tue, Feb 17, 2015 at 7:12 PM, Jordan Justen
wrote:
> +++
> b/tests/spec/arb_shader_atomic_counters/execution/vs-simple-inc-dec-read.shader_test
> @@ -0,0 +1,70 @@
> +# Simple test of atomicCounterIncrement, atomicCounterDecrement and
> +# atomicCounter being used in the VS.
> +
> +[require]
>
NOTE: The implementation was initially one patch, this. All the history is kept
here, even though all the core mesa changes were moved to the parent of this
patch.
This patch implements ARB_pipeline_statistics_query. This addition to GL does
not add a new API. Instead, it adds new tokens to the ex
On Tue, Feb 17, 2015 at 11:41:01AM -0800, Ian Romanick wrote:
> On 02/13/2015 11:02 PM, Ben Widawsky wrote:
> > This was originally part of a single patch which added the extension, and
> > implemented it for i965 classic. For information about the evolution of the
> > patch, please see the subsequ
On Tue, Feb 17, 2015 at 3:45 PM, Kenneth Graunke wrote:
> On Wednesday, February 04, 2015 08:21:24 PM Matt Turner wrote:
>> total instructions in shared programs: 5885407 -> 5940958 (0.94%)
>> instructions in affected programs: 3617311 -> 3672862 (1.54%)
>> helped:
On Tue, Feb 17, 2015 at 6:44 PM, Eric Anholt wrote:
> Connor Abbott writes:
>
>> On Tue, Feb 17, 2015 at 3:52 PM, Eric Anholt wrote:
>>> Matt Turner writes:
>>>
From: Jason Ekstrand
This adds a parent_instr field similar to the one for ssa_def. The
difference here is that
From: Dave Airlie
When we schedule an instructions with undefined value, we
eventually will use 0, which is a constant, however sb wasn't
taking this into account and creating ops with illegal scalar
swizzles.
this replaces my fix for op3 in t slots.
Signed-off-by: Dave Airlie
---
src/gallium
Simple test of atomicCounterIncrement, atomicCounterDecrement and
atomicCounter being used in the VS.
Signed-off-by: Jordan Justen
---
tests/all.py | 3 +
.../execution/vs-simple-inc-dec-read.shader_test | 70 ++
2 files changed, 73 in
On Wednesday, February 04, 2015 08:21:25 PM Matt Turner wrote:
> And then the opt_combine_constants() pass will pull them out into
> registers. This will allow us to do some algebraic optimizations on MAD
> and LRP.
>
> total instructions in shared programs: 5946656 -> 5931320 (-0.26%)
> instructi
On Tue, Feb 17, 2015 at 5:25 PM, Ian Romanick wrote:
> So... is there are 3rd group, and do we care enough to do the work
> necessary to support them?
Wine maybe? (They're compat-only for now, although some work is being
done to support core, but that might only be for their D3D10+ layer.)
But pe
On Wednesday, February 04, 2015 08:21:24 PM Matt Turner wrote:
> total instructions in shared programs: 5885407 -> 5940958 (0.94%)
> instructions in affected programs: 3617311 -> 3672862 (1.54%)
> helped:3
> HURT: 23556
> GAINED:
Connor Abbott writes:
> On Tue, Feb 17, 2015 at 3:52 PM, Eric Anholt wrote:
>> Matt Turner writes:
>>
>>> From: Jason Ekstrand
>>>
>>> This adds a parent_instr field similar to the one for ssa_def. The
>>> difference here is that the parent_instr field on a nir_register can be
>>> NULL if the
On 02/17/2015 02:12 PM, Matt Turner wrote:
> On Tue, Feb 17, 2015 at 1:59 PM, Connor Abbott wrote:
>> On Tue, Feb 17, 2015 at 4:41 PM, Alan Coopersmith
>> wrote:
>>> On 02/17/15 10:21 AM, Emil Velikov wrote:
Hi Alan,
On 16/02/15 02:41, Alan Coopersmith wrote:
>
> When
On 02/17/2015 01:21 PM, Alan Coopersmith wrote:
> On 02/17/15 11:47 AM, Ian Romanick wrote:
>> Does this build problem still exist?
>>
>> https://bugs.freedesktop.org/show_bug.cgi?id=86944
>
> It does, until this series is applied.
>
> "../../src/glsl/glsl_parser_extras.cpp", line 1455: Error: Ba
(Cross posting to mesa-dev.)
On 02/17/2015 01:54 PM, Ilia Mirkin wrote:
> On Tue, Feb 17, 2015 at 4:45 PM, Ilia Mirkin wrote:
>> On Tue, Feb 17, 2015 at 4:34 PM, Ian Romanick wrote:
>>> "Dependencies
>>>
>>> OpenGL 2.0 is required."
>>>
>>> This means Mesa will need a flag for the extension
On Tue, Feb 17, 2015 at 1:59 PM, Connor Abbott wrote:
> On Tue, Feb 17, 2015 at 4:41 PM, Alan Coopersmith
> wrote:
>> On 02/17/15 10:21 AM, Emil Velikov wrote:
>>>
>>> Hi Alan,
>>>
>>> On 16/02/15 02:41, Alan Coopersmith wrote:
When compiling in C99 or C++11 modes, Solaris defines isnor
On Tue, Feb 17, 2015 at 4:41 PM, Alan Coopersmith
wrote:
> On 02/17/15 10:21 AM, Emil Velikov wrote:
>>
>> Hi Alan,
>>
>> On 16/02/15 02:41, Alan Coopersmith wrote:
>>>
>>> When compiling in C99 or C++11 modes, Solaris defines isnormal() as
>>> a macro via , which causes the function definition to
On Tue, Feb 17, 2015 at 1:30 PM, Ben Widawsky
wrote:
> On Tue, Feb 17, 2015 at 11:37:44AM -0800, Ian Romanick wrote:
>> On 02/13/2015 11:02 PM, Ben Widawsky wrote:
>> > From: Jordan Justen
>> >
>> > Signed-off-by: Jordan Justen
>> > Reviewed-by: Ben Widawsky
>> > ---
>> > src/mesa/main/context
On 02/17/15 10:21 AM, Emil Velikov wrote:
Hi Alan,
On 16/02/15 02:41, Alan Coopersmith wrote:
When compiling in C99 or C++11 modes, Solaris defines isnormal() as
a macro via , which causes the function definition to become
too mangled to compile.
Is this series sufficient to get mesa working
On Tue, Feb 17, 2015 at 11:37:44AM -0800, Ian Romanick wrote:
> On 02/13/2015 11:02 PM, Ben Widawsky wrote:
> > From: Jordan Justen
> >
> > Signed-off-by: Jordan Justen
> > Reviewed-by: Ben Widawsky
> > ---
> > src/mesa/main/context.h | 11 +++
> > 1 file changed, 11 insertions(+)
> >
https://bugs.freedesktop.org/show_bug.cgi?id=86944
--- Comment #12 from Alan Coopersmith ---
http://patchwork.freedesktop.org/patch/42582/ fixes this for me when
building with Solaris Studio 12.4 compilers.
--
You are receiving this mail because:
You are the assignee for the bug.
__
Reviewed-by: Marek Olšák
Marek
On Tue, Feb 17, 2015 at 9:15 AM, Michel Dänzer wrote:
> From: Michel Dänzer
>
> This reverts commit 0e9cdedd2e3943bdb7f3543a3508b883b167e427.
>
> It caused the grass to disappear in The Talos Principle.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=8
On 02/17/15 11:47 AM, Ian Romanick wrote:
Does this build problem still exist?
https://bugs.freedesktop.org/show_bug.cgi?id=86944
It does, until this series is applied.
"../../src/glsl/glsl_parser_extras.cpp", line 1455: Error: Badly formed
expression.
is what the third patch in my series fi
On Tue, Feb 17, 2015 at 3:52 PM, Eric Anholt wrote:
> Matt Turner writes:
>
>> From: Jason Ekstrand
>>
>> This adds a parent_instr field similar to the one for ssa_def. The
>> difference here is that the parent_instr field on a nir_register can be
>> NULL if the register does not have a unique
Matt Turner writes:
> From: Jason Ekstrand
>
> This adds a parent_instr field similar to the one for ssa_def. The
> difference here is that the parent_instr field on a nir_register can be
> NULL if the register does not have a unique definition or if that
> definition does not dominate all its
Brian Paul writes:
> If a fragment program wrote to more than one color buffer, the
> first fragment color got replicated to all dest buffers. This
> fixes 5 piglit FBO tests, including fbo-drawbuffers-arbfp.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45348
> Cc: "10.4, 10.5"
T
On Tue, Feb 17, 2015 at 3:04 PM, Francisco Jerez wrote:
> Jason Ekstrand writes:
>
>> On Mon, Feb 16, 2015 at 11:39 AM, Francisco Jerez
>> wrote:
>>
>>> The round-robin allocation strategy is expected to decrease the amount
>>> of false dependencies created by the register allocator and give the
Connor Abbott writes:
> On Tue, Feb 17, 2015 at 8:15 AM, Francisco Jerez
> wrote:
>> Connor Abbott writes:
>>
>>> Hi Francisco,
>>>
>> Hi Connor, and thank you for your feedback.
>>
>>> A few comments:
>>>
>>> 1) This is just a difference in definitions, but to me an
>>> optimistically-colored
Jason Ekstrand writes:
> On Mon, Feb 16, 2015 at 11:39 AM, Francisco Jerez
> wrote:
>
>> The round-robin allocation strategy is expected to decrease the amount
>> of false dependencies created by the register allocator and give the
>> post-RA scheduling pass more freedom to move instructions aro
On Tue, Feb 17, 2015 at 8:15 AM, Francisco Jerez wrote:
> Connor Abbott writes:
>
>> Hi Francisco,
>>
> Hi Connor, and thank you for your feedback.
>
>> A few comments:
>>
>> 1) This is just a difference in definitions, but to me an
>> optimistically-colored node is a node that we pushed onto the
On Tue, Feb 17, 2015 at 2:00 PM, Jason Ekstrand wrote:
>
>
> On Mon, Feb 16, 2015 at 11:39 AM, Francisco Jerez
> wrote:
>
>
> UINT_MAX would be clearer than ~0
>
>>
>> int i;
>>
>> while (progress) {
>> @@ -483,12 +490,16 @@ ra_simplify(struct ra_graph *g)
>>
>>if (!progress && be
This patch is
Reviewed-by: Connor Abbott
I'll leave it to the others to review the i965 stuff as I'm not as
well-versed in it, although it makes sense to me.
On Tue, Feb 17, 2015 at 2:46 PM, Matt Turner wrote:
> From: Jason Ekstrand
>
> This adds a parent_instr field similar to the one for ss
With just a quick look, this patch is
Reviewed-by: Ian Romanick
On 02/17/2015 11:46 AM, Matt Turner wrote:
> Gen8+ support was just broken, since MUL now consumes 32-bits from both
> sources. Fixes 986 piglit tests on my BDW.
>
> total instructions in shared programs: 8010869 -> 8010307 (-0.01%
Reviewed-by: Ian Romanick
On 02/14/2015 04:25 AM, Eduardo Lima Mitev wrote:
> Fixes 3 dEQP tests:
> * dEQP-GLES3.functional.negative_api.state.get_program_info_log
> * dEQP-GLES3.functional.negative_api.state.get_shader_info_log
> * dEQP-GLES3.functional.negative_api.state.get_programiv
> ---
>
Reviewed-by: Ian Romanick
And I think Ken gave an R-b too.
On 02/11/2015 02:35 AM, Iago Toral Quiroga wrote:
> The intel driver code, and apparently all other Mesa drivers, call
> _mesa_initialize_context early in the CreateContext hook. That
> function will end up calling _mesa_init_texture whi
On Tuesday, February 10, 2015 04:40:46 PM Eduardo Lima Mitev wrote:
> From: Iago Toral Quiroga
>
> From 14.5.2.2. Wide Lines of the OpenGL spec 4.5:
>
> "(...)Let w be the width rounded to the nearest integer (...). If the
> line segment has endpoints given by (x0,y0) and (x1,y1) in window
> co
total instructions in shared programs: 8013221 -> 8010869 (-0.03%)
instructions in affected programs: 475925 -> 473573 (-0.49%)
helped:2350
---
src/mesa/drivers/dri/i965/brw_fs.h | 3 ++
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 81 ++
From: Jason Ekstrand
This adds a parent_instr field similar to the one for ssa_def. The
difference here is that the parent_instr field on a nir_register can be
NULL if the register does not have a unique definition or if that
definition does not dominate all its uses. We set this field in the
o
Does this build problem still exist?
https://bugs.freedesktop.org/show_bug.cgi?id=86944
On 02/15/2015 06:41 PM, Alan Coopersmith wrote:
> The macro is defined to provide a trailing ; so this caused the expansion
> to end in ";;" which made the Solaris Studio compilers issue warnings for
> every l
Does this build problem still exist?
On 02/15/2015 06:41 PM, Alan Coopersmith wrote:
> The macro is defined to provide a trailing ; so this caused the expansion
> to end in ";;" which made the Solaris Studio compilers issue warnings for
> every line of:
> "builtin_type_macros.h", line 113: Warn
Gen8+ support was just broken, since MUL now consumes 32-bits from both
sources. Fixes 986 piglit tests on my BDW.
total instructions in shared programs: 8010869 -> 8010307 (-0.01%)
instructions in affected programs: 37244 -> 36682 (-1.51%)
helped:113
GAINED:
On 02/13/2015 11:02 PM, Ben Widawsky wrote:
> This was originally part of a single patch which added the extension, and
> implemented it for i965 classic. For information about the evolution of the
> patch, please see the subsequent commit.
>
> One difference here as compared to the original mega
On 02/13/2015 11:02 PM, Ben Widawsky wrote:
> From: Jordan Justen
>
> Signed-off-by: Jordan Justen
> Reviewed-by: Ben Widawsky
> ---
> src/mesa/main/context.h | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/src/mesa/main/context.h b/src/mesa/main/context.h
> index d902ea
On Wednesday, February 11, 2015 11:35:35 AM Iago Toral Quiroga wrote:
> The intel driver code, and apparently all other Mesa drivers, call
> _mesa_initialize_context early in the CreateContext hook. That
> function will end up calling _mesa_init_texture which will do:
>
> ctx->Texture.CubeMapSeaml
An *untested* update for d9cd982d556be560af3bcbcdaf62b6b93eb934a5.
A similar change was needed for CS to allow the piglit test
tests/spec/arb_compute_shader/execution/simple-barrier-atomics.shader_test
to pass.
I think the previous change will fix cases that write atomics, such as
atomicCounterIn
On Mon, Feb 16, 2015 at 11:39 AM, Francisco Jerez
wrote:
> The round-robin allocation strategy is expected to decrease the amount
> of false dependencies created by the register allocator and give the
> post-RA scheduling pass more freedom to move instructions around. On
> the other hand it has
On 02/17/2015 11:23 AM, Laura Ekstrand wrote:
Previously array textures were not working with GetCompressedTextureImage,
leading to failures in the test
arb_direct_state_access/getcompressedtextureimage.c.
Tested on Haswell.
---
src/mesa/main/texgetimage.c | 4 ++--
1 file changed, 2 insertio
On Tue, Feb 17, 2015 at 04:41:41PM +0200, Francisco Jerez wrote:
> Tom Stellard writes:
>
> > On Tue, Feb 17, 2015 at 03:23:05PM +0200, Francisco Jerez wrote:
> >> The round-robin allocation strategy is expected to decrease the amount
> >> of false dependencies created by the register allocator a
On Tue, Feb 17, 2015 at 3:27 AM, Tapani Pälli wrote:
> Here is a skeleton for the GL_ARB_program_interface_query API functions.
> Adding the enum values makes it possible to start introducing changes in
> the current shader query functions using these values.
>
> Plan is to build a resource list d
Previously array textures were not working with GetCompressedTextureImage,
leading to failures in the test
arb_direct_state_access/getcompressedtextureimage.c.
Tested on Haswell.
---
src/mesa/main/texgetimage.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/main/
Hi Alan,
On 16/02/15 02:41, Alan Coopersmith wrote:
> When compiling in C99 or C++11 modes, Solaris defines isnormal() as
> a macro via , which causes the function definition to become
> too mangled to compile.
>
Is this series sufficient to get mesa working again with Solaris ?
Afaics there is a
On 16/02/2015 18:22, Emil Velikov wrote:
With commit c39dbfdd0f7(auxiliary/vl: bring back the VL code for the dri
targets) we did not fully consider users of dri-swrast alone. Thus we
ended up trying to compile the dri2 specific code on platform which lack
it - Cygwin for example.
Cc: "10.5"
Cc
Hey,
Why not move these two patches before the one introducing BufferRange?
Also, I wouldn't mind seeing them squashed together since the previous patch
alone does not change any behaviour.
On 12/02/15 04:05, Laura Ekstrand wrote:
---
src/mesa/main/teximage.c | 46 +--
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