Re: [Mesa-dev] [PATCH] i965/gen8: Check correct number of blitter dwords

Last time I was digging around in the blitter code, I came across this and meant to fix it. Didn't happen though. Reviewed-but-not-tested-by: Jason Ekstrand On Wed, Dec 10, 2014 at 8:03 PM, Ben Widawsky wrote: > The odds of having this patch make a difference on Gen8+ are probably very > low.

Re: [Mesa-dev] [PATCH v3 01/24] mesa/format_utils: Fix a bug in unorm_to_float helper function

On Dec 10, 2014 8:13 PM, "Michel Dänzer" wrote: > > On 11.12.2014 01:08, Jason Ekstrand wrote: > > > > > > On Tue, Dec 9, 2014 at 10:53 PM, Michel Dänzer > > wrote: > > > > On 09.12.2014 21:06, Iago Toral Quiroga wrote: > > > From: Jason Ekstrand > > > > > >

Re: [Mesa-dev] [PATCH v3 01/24] mesa/format_utils: Fix a bug in unorm_to_float helper function

On 11.12.2014 01:08, Jason Ekstrand wrote: > > > On Tue, Dec 9, 2014 at 10:53 PM, Michel Dänzer > wrote: > > On 09.12.2014 21:06, Iago Toral Quiroga wrote: > > From: Jason Ekstrand > > > > > This patch fixes the return

[Mesa-dev] [PATCH] i965/gen8: Check correct number of blitter dwords

The odds of having this patch make a difference on Gen8+ are probably very low. Only compile tested. Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/intel_blit.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/

[Mesa-dev] [Bug 86788] (bisected) 32bit UrbanTerror 4.1 timedemo sse4.1 segfault...

https://bugs.freedesktop.org/show_bug.cgi?id=86788 smoki changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Mesa-dev] [Bug 86788] (bisected) 32bit UrbanTerror 4.1 timedemo sse4.1 segfault...

https://bugs.freedesktop.org/show_bug.cgi?id=86788 --- Comment #14 from smoki --- Fix is commited to mesa f1b5f2b157a092e93590bd43544fbf2671edab36 Closing. -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mail

[Mesa-dev] [PATCH] mesa/drivers: Add missing mesautil lib to Haiku swrast

* Resolves missing util_format_linear_to_srgb_8unorm_table symbol. --- src/mesa/drivers/haiku/swrast/SConscript | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/haiku/swrast/SConscript b/src/mesa/drivers/haiku/swrast/SConscript index 2c25f72..907325e 100644 --- a/src/mesa/driv

Re: [Mesa-dev] Compiling llvm windows name mangled

Thank you, I will investigate if I can get a windows build to work, and see how difficult it is, as we kind of want to have a single process in windows to load both OpenGL, and Mesa3D at the sometime, and the ability to use either simultaneously. Cheers Jason From: Jose Fonseca mailto:jfons..

Re: [Mesa-dev] [Mesa-stable] [PATCH] egl: Added NULL check in eglCreateContext

On 10.12.2014 07:02, Chad Versace wrote: On 12/08/2014 01:45 PM, Ian Romanick wrote: On 12/02/2014 12:10 AM, Valentin Corfu wrote: With this check we can avoid segmentation fault when invalid value used during eglCreateContext. Cc: mesa-sta...@lists.freedesktop.org Cc: mesa-dev@lists.freedes

Re: [Mesa-dev] Build mesa for Intel platform

On Mon, Aug 25, 2014 at 7:00 PM, Ian Romanick wrote: > On 08/25/2014 06:26 AM, Victor Rodriguez wrote: >> >> HI >> >> I am new in Mesa. I am trying to compile mesa in a x86 system. After >> installing all the required packages and ussing the following configure >> command line: >> >> ./configure -

Re: [Mesa-dev] [PATCH 1/3] gallium: add TGSI_SEMANTIC_VERTEXID_ZEROBASE and TGSI_SEMANTIC_BASEVERTEX

On 12/10/2014 05:09 PM, Roland Scheidegger wrote: Am 11.12.2014 um 00:53 schrieb Brian Paul: On 12/10/2014 02:22 PM, srol...@vmware.com wrote: From: Roland Scheidegger Plus a new PIPE_CAP_VERTEXID_NOOFFSET query. The idea is that drivers not supporting vertex ids with base vertex offset appli

Re: [Mesa-dev] [PATCH 3/3] st/mesa: use vertex id lowering according to pipe cap bit.

Am 11.12.2014 um 00:53 schrieb Brian Paul: > On 12/10/2014 02:22 PM, srol...@vmware.com wrote: >> From: Roland Scheidegger >> >> Tested with llvmpipe, seems to work, though no driver requests it for >> now. > > It looks like all drivers (including llvmpipe) return 0 for the > PIPE_CAP_VERTEXID_NO

Re: [Mesa-dev] [PATCH 1/3] gallium: add TGSI_SEMANTIC_VERTEXID_ZEROBASE and TGSI_SEMANTIC_BASEVERTEX

Am 11.12.2014 um 00:53 schrieb Brian Paul: > On 12/10/2014 02:22 PM, srol...@vmware.com wrote: >> From: Roland Scheidegger >> >> Plus a new PIPE_CAP_VERTEXID_NOOFFSET query. The idea is that drivers not >> supporting vertex ids with base vertex offset applied (so, only support >> d3d10-style verte

Re: [Mesa-dev] [PATCH 1/3] gallium: add TGSI_SEMANTIC_VERTEXID_ZEROBASE and TGSI_SEMANTIC_BASEVERTEX

On 12/10/2014 02:22 PM, srol...@vmware.com wrote: From: Roland Scheidegger Plus a new PIPE_CAP_VERTEXID_NOOFFSET query. The idea is that drivers not supporting vertex ids with base vertex offset applied (so, only support d3d10-style vertex ids) will get such a d3d10-style vertex id instead - wi

Re: [Mesa-dev] [PATCH 3/3] st/mesa: use vertex id lowering according to pipe cap bit.

On 12/10/2014 02:22 PM, srol...@vmware.com wrote: From: Roland Scheidegger Tested with llvmpipe, seems to work, though no driver requests it for now. It looks like all drivers (including llvmpipe) return 0 for the PIPE_CAP_VERTEXID_NOOFFSET query. --- src/mesa/state_tracker/st_extensio

Re: [Mesa-dev] [PATCH] radeonsi: force NaNs to 0

Hi Matt, This is a temporary workaround and not a permanent fix. I think it's not even correct for later GL versions (that we don't support yet). I have mixed feelings about this patch, but we must fix the Unreal Engine issues somehow and this is the best we've got and it's easy to revert. Marek

Re: [Mesa-dev] [PATCH] radeonsi: implement legacy RCP behavior to fix Unreal engine demos

Odd indeed. Maybe it was really meant for d3d10level9 shaders or something (would allow to share more code compiling d3d9 or d3d10 shaders that way I guess, you could use all the same instructions and just set that bit, and you said newer chips don't have the legacy instructions so I guess that bit

Re: [Mesa-dev] [PATCH] radeonsi: force NaNs to 0

r600g uses DX9 opcodes, avoiding NaNs by default. Marek On Wed, Dec 10, 2014 at 11:19 PM, Alex Deucher wrote: > On Wed, Dec 10, 2014 at 5:08 PM, Marek Olšák wrote: >> From: Marek Olšák >> >> This fixes incorrect rendering in Unreal Engine demos. >> I don't know why it's called "dx10 clamp mode

Re: [Mesa-dev] [PATCH] radeonsi: force NaNs to 0

> On Dec 10, 2014, at 5:08 PM, Marek Olšák wrote: > > From: Marek Olšák > > This fixes incorrect rendering in Unreal Engine demos. > I don't know why it's called "dx10 clamp mode". MSDN doesn't mention it. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83510 >

Re: [Mesa-dev] [PATCH] radeonsi: force NaNs to 0

On Wed, Dec 10, 2014 at 5:08 PM, Marek Olšák wrote: > From: Marek Olšák > > This fixes incorrect rendering in Unreal Engine demos. > I don't know why it's called "dx10 clamp mode". MSDN doesn't mention it. Reviewed-by: Alex Deucher Stable? Does r600g need this as well? It has the same field

[Mesa-dev] [PATCH] radeonsi: force NaNs to 0

From: Marek Olšák This fixes incorrect rendering in Unreal Engine demos. I don't know why it's called "dx10 clamp mode". MSDN doesn't mention it. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83510 --- src/gallium/drivers/radeonsi/si_state_shaders.c | 12 1 file changed, 8

Re: [Mesa-dev] [PATCH 3/3] st/mesa: use vertex id lowering according to pipe cap bit.

Patches 1 & 3: Reviewed-by: Marek Olšák Marek On Wed, Dec 10, 2014 at 10:22 PM, wrote: > From: Roland Scheidegger > > Tested with llvmpipe, seems to work, though no driver requests it for now. > --- > src/mesa/state_tracker/st_extensions.c | 4 > src/mesa/state_tracker/st_glsl_to_t

Re: [Mesa-dev] [PATCH 1/3] gallium: add TGSI_SEMANTIC_VERTEXID_ZEROBASE and TGSI_SEMANTIC_BASEVERTEX

On Wed, Dec 10, 2014 at 10:22 PM, wrote: > From: Roland Scheidegger > > Plus a new PIPE_CAP_VERTEXID_NOOFFSET query. The idea is that drivers not > supporting vertex ids with base vertex offset applied (so, only support > d3d10-style vertex ids) will get such a d3d10-style vertex id instead - >

Re: [Mesa-dev] [PATCH] radeonsi: implement legacy RCP behavior to fix Unreal engine demos

It affects all floating-point instructions and it works like an output modifier. If DX10 doesn't allow it, then I don't know why it's called "DX10 mode". Marek On Wed, Dec 10, 2014 at 9:55 PM, Roland Scheidegger wrote: > Hmm so would that apply to all vector alu ops? Weird (dx10 certainly > does

[Mesa-dev] [PATCH 3/3] st/mesa: use vertex id lowering according to pipe cap bit.

From: Roland Scheidegger Tested with llvmpipe, seems to work, though no driver requests it for now. --- src/mesa/state_tracker/st_extensions.c | 4 src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 8 ++-- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/src/mesa/state_tra

[Mesa-dev] [PATCH 1/3] gallium: add TGSI_SEMANTIC_VERTEXID_ZEROBASE and TGSI_SEMANTIC_BASEVERTEX

From: Roland Scheidegger Plus a new PIPE_CAP_VERTEXID_NOOFFSET query. The idea is that drivers not supporting vertex ids with base vertex offset applied (so, only support d3d10-style vertex ids) will get such a d3d10-style vertex id instead - with the caveat they'll also need to handle the baseve

[Mesa-dev] [PATCH 2/3] draw: implement support for the VERTEXID_ZEROBASE and BASEVERTEX semantics.

From: Roland Scheidegger This fixes 4 vertexid related piglit tests with llvmpipe due to switching behavior of vertexid to the one gl expects. (Won't fix non-llvm draw path since we don't get the basevertex currently.) --- src/gallium/auxiliary/draw/draw_llvm.c | 40 ++--

Re: [Mesa-dev] [PATCH] radeonsi: implement legacy RCP behavior to fix Unreal engine demos

Hmm so would that apply to all vector alu ops? Weird (dx10 certainly does not generally clamp NaNs to zero). Roland Am 10.12.2014 um 21:40 schrieb Marek Olšák: > From the SI ISA: > > "Used by the vector ALU to force DX10-style treatment of NaNs: when > set, clamp NaN to zero; otherwise, pass NaN

Re: [Mesa-dev] [PATCH] r600: fix FMASK allocation on r600/700

It uses the libdrm surface allocator and FMASK is 2D tiled. Maybe the rounding of bpp affects the pitch in a bad way. Marek On Wed, Dec 10, 2014 at 4:06 PM, Alex Deucher wrote: > On Wed, Dec 10, 2014 at 5:40 AM, Marek Olšák wrote: >> bpe is in bytes, not bits, so you're overallocating the size

Re: [Mesa-dev] [PATCH] radeonsi: implement legacy RCP behavior to fix Unreal engine demos

From the SI ISA: "Used by the vector ALU to force DX10-style treatment of NaNs: when set, clamp NaN to zero; otherwise, pass NaN through." Marek On Wed, Dec 10, 2014 at 9:33 PM, Roland Scheidegger wrote: > I am curious, how does this bit change the shader (or shader operations, > export, or wha

Re: [Mesa-dev] [PATCH 1/5] gallium/util: add a helper util_create_shader_from_text, cleanup some code

Indeed, locales can cause problems. Would "vsnprintf_l" that overrides the current locale or "uselocale" address your concerns? vsnprintf_l: http://www.unix.com/man-page/osx/3/printf_l/ uselocale: http://man7.org/linux/man-pages/man3/uselocale.3.html Marek On Wed, Dec 10, 2014 at 8:50 PM, Jose

Re: [Mesa-dev] [PATCH] radeonsi: implement legacy RCP behavior to fix Unreal engine demos

I am curious, how does this bit change the shader (or shader operations, export, or whatever). I guess you're referring to the bit saying "Drives dx10 clamp in spi_sq newWave cmd" settable separately for each shader type but that doesn't mean much to me :-). Roland Am 10.12.2014 um 21:16 schrieb

Re: [Mesa-dev] [PATCH] radeonsi: implement legacy RCP behavior to fix Unreal engine demos

Wow, yes! The DX10_CLAMP bit fixes this issue too. I guess we don't have to use legacy instructions now. Marek On Mon, Dec 8, 2014 at 5:05 AM, Michel Dänzer wrote: > On 04.12.2014 21:34, Marek Olšák wrote: >> From: Marek Olšák >> >> Discussion: https://bugs.freedesktop.org/show_bug.cgi?id=83510

Re: [Mesa-dev] [PATCH 1/5] gallium/util: add a helper util_create_shader_from_text, cleanup some code

On 09/12/14 11:28, Marek Olšák wrote: From: Marek Olšák It's exposed, because I plan to use it elsewhere later. I hesitate in repeating myself, but I can't close my eyes. This is such a bad idea, at so many levels. How will this cope when the application is running on a different locale,

Re: [Mesa-dev] [PATCH] i965: Disable unlit-centroid workaround on Gen < 6.

On Mon, Dec 8, 2014 at 11:08 PM, Matt Turner wrote: > Back to the original commit (8313f444) adding the workaround, we were > enabling it on gens <= 7, even though gens <= 5 can't do multisampling. By the way, on Ironlake: total instructions in shared programs: 4358478 -> 4349671 (-0.20%) instru

[Mesa-dev] [Bug 87136] Incorrect/undefined behavior from shifting an integer too far

https://bugs.freedesktop.org/show_bug.cgi?id=87136 --- Comment #3 from Bruce Dawson --- (In reply to Brian Paul from comment #2) > Created attachment 110683 [details] [review] > patch to fix the issues in s_span.c > > Hi Bruce! Long time no see (err, email). > > Here's a patch which I believe

Re: [Mesa-dev] [PATCH] i965/vec4: Drop writemasks on scratch reads.

Reviewed-by: Matt Turner ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 87136] Incorrect/undefined behavior from shifting an integer too far

https://bugs.freedesktop.org/show_bug.cgi?id=87136 --- Comment #2 from Brian Paul --- Created attachment 110683 --> https://bugs.freedesktop.org/attachment.cgi?id=110683&action=edit patch to fix the issues in s_span.c Hi Bruce! Long time no see (err, email). Here's a patch which I believe wi

[Mesa-dev] [Bug 87136] Incorrect/undefined behavior from shifting an integer too far

https://bugs.freedesktop.org/show_bug.cgi?id=87136 Brian Paul changed: What|Removed |Added Status|RESOLVED|REOPENED Resolution|WONTFIX

Re: [Mesa-dev] [PATCH v3 01/24] mesa/format_utils: Fix a bug in unorm_to_float helper function

On Tue, Dec 9, 2014 at 10:53 PM, Michel Dänzer wrote: > On 09.12.2014 21:06, Iago Toral Quiroga wrote: > > From: Jason Ekstrand > > > > This patch fixes the return of a wrong value when x is lower than > > -MAX_INT(src_bits) as the result would not be between [-1.0 1.0]. > > > > v2 by Samuel Igl

Re: [Mesa-dev] [PATCH] r600: fix FMASK allocation on r600/700

On Wed, Dec 10, 2014 at 5:40 AM, Marek Olšák wrote: > bpe is in bytes, not bits, so you're overallocating the size 8 times. > No wonder it works. > > As far as I can see, FMASK allocation is the same on R600 and > Evergreen. Since the allocator accepts bpe in bytes, I multiplied > nr_samples with

Re: [Mesa-dev] Compiling llvm windows name mangled

I never tried, but it doesn't surprise that ?USE_MGL_NAMESPACE doesn't work properly on Windows. At very least the src/mesa/drivers/windows/gdi and src/gallium/targets/libgl-gdi targets will fail because the .DEF files there explicitly request the non-mangled symbols. Not sure if src/mesa/dr

Re: [Mesa-dev] [PATCH 1/1] clover: Use switch

Jan Vesely writes: > THis way we get a warning if an enum value is not handled > > v2: codestyle > > Signed-off-by: Jan Vesely > Reviewed-by: Francisco Jerez Thanks, pushed. > --- > src/gallium/state_trackers/clover/core/kernel.cpp | 44 > ++- > 1 file changed, 19 insert

Re: [Mesa-dev] [PATCH 1/4] i965/byt: Allow 128 bpp to be linear or Y-tiled on

On Tue, Dec 09, 2014 at 04:02:57PM -0800, Ben Widawsky wrote: > Let's assume that this IVB specific feature exists on BYT too, since it's very > much like IVB > > Signed-off-by: Ben Widawsky > --- > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletio

Re: [Mesa-dev] r600/sb loop issue

On 12/09/2014 07:39 AM, Vadim Girlin wrote: On 12/09/2014 05:18 AM, Dave Airlie wrote: On 8 December 2014 at 20:41, Vadim Girlin wrote: On 12/06/2014 07:13 AM, Vadim Girlin wrote: On 12/04/2014 01:43 AM, Dave Airlie wrote: Hi Vadim, I've been looking with Glenn's help into a bug in sb for

Re: [Mesa-dev] [PATCH] r600: fix FMASK allocation on r600/700

bpe is in bytes, not bits, so you're overallocating the size 8 times. No wonder it works. As far as I can see, FMASK allocation is the same on R600 and Evergreen. Since the allocator accepts bpe in bytes, I multiplied nr_samples with bpp and divided by 8. 2xMSAA: bpp = 2 bits nr_samples = log2(bp

[Mesa-dev] [PATCH] i965/vec4: Drop writemasks on scratch reads.

This code is complete nonsense and has apparently existed since I first implemented register spilling in the VS two years ago. Scratch reads are SEND messages, which ignore the destination writemask. The comment about "data that may not have been written to scratch" is also confusing - we always

Re: [Mesa-dev] [PATCH v3 00/12] Scalar VS for BDW+

On Thursday, December 04, 2014 10:02:21 PM Kristian Høgsberg wrote: > Here's v3 of the scalar vs series. Changes from v2 > > - Bail out of constant propagation early if source is saturated (from Matt). > > - Fixed the half-finished, broken vec4 -> vue key and prog_data rename. > > - Add '***