Untyped Atomic Operation messages are illegal for non-RAW formats.
I have no idea why it worked before; the documentation claims it
shouldn't be allowed and the simulator enforces it.
Some arithmetic sleight of hand happens in this patch:
Previously, we allocated a R32G32B32A32 buffer. However,
This is basically a copy and paste of gen7_create_constant_surface, but
with the parameters filled in to offer a simpler interface.
It will diverge shortly.
I didn't bother adding it to the vtable for now since shader time is
only exposed on Gen7+.
NOTE: This is a candidate for the 9.1 branch.
C
This mini-series fixes some bugs I discovered with INTEL_DEBUG=shader_time.
Patch 1 is critical: without it, enabling shader time caused GPU hangs on
Haswell because we were sending the wrong message to the wrong shared
function.
Patches 2 and 3 are less clear cut. From my reading of the BSpec/PR
Haswell's "Data Cache" data port is a single unit, but split into two
SFIDs to allow for more message types without adding more bits in the
message descriptor.
Untyped Atomic Operations are now message 0010 in the second data cache
data port, rather than 6 in the first.
NOTE: This is a candidate
https://bugs.freedesktop.org/show_bug.cgi?id=60395
--- Comment #2 from Matt Turner ---
Have you contributed to Mesa before? Usually we want a history of
contributions.
--
You are receiving this mail because:
You are the assignee for the bug.
___
mesa-
Fixes resource leak defect reported by Coverity.
Signed-off-by: Vinson Lee
---
src/gallium/drivers/nv30/nv30_screen.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/drivers/nv30/nv30_screen.c
b/src/gallium/drivers/nv30/nv30_screen.c
index f3faf8a..7825697 100644
--- a/src/galli
https://bugs.freedesktop.org/show_bug.cgi?id=60143
--- Comment #4 from Daniel van Vugt ---
Created attachment 74319
--> https://bugs.freedesktop.org/attachment.cgi?id=74319&action=edit
[PATCH] gbm: Remember to init format on gbm_dri_bo_create
--
You are receiving this mail because:
You are th
https://bugs.freedesktop.org/show_bug.cgi?id=60395
Priority: medium
Bug ID: 60395
Assignee: mesa-dev@lists.freedesktop.org
Summary: Developer account request
Severity: normal
Classification: Unclassified
OS: All
Rep
https://bugs.freedesktop.org/show_bug.cgi?id=60395
--- Comment #1 from commanderan...@yahoo.com ---
Created attachment 74318
--> https://bugs.freedesktop.org/attachment.cgi?id=74318&action=edit
GPG Key
--
You are receiving this mail because:
You are the assignee for the bug.
__
Hi Christian,
I'm still unable to get the glsl1-while-loop with continue test to pass
on R600 with the new structurizer. For this test, the structurizer is
producing strange code and I'm not sure if it is correct. I have
attached the full before and after dumps to this email. Here is the
suspec
On 02/06/2013 02:10 PM, Paul Berry wrote:
Background:
All of the GLSL specs from GLSL 1.30 (and GLSL ES 3.00) onward contain
language requiring certain integer variables to be declared with the
"flat" keyword, but they differ in exactly *when* the rule is enforced:
(a) GLSL 1.30 and 1.40 say th
The default alignment is 4, so this fast path was rarely hit. Rather
than introduce logic to handle alignment, just use the Mesa core
function.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=46632
Cc: n...@linux.intel.com
---
src/mesa/drivers/dri/intel/intel_pixel_read.c | 13 -
We'd been ad-hoc inserting instructions in some SEND messages with no
knowledge of when it was required (so extra instructions), but not all SENDs
(so not often enough). This should do much better than that, though it's
still flow-control-ignorant.
Bugzilla: https://bugs.freedesktop.org/show_bug.
Fixes broken clipping in supertuxkart and presumably many other applications.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=51471
NOTE: Candidate for the stable branches.
---
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 20
1 file changed, 8 insertions(+), 12 d
The code was rather broken for non-XYZW on 8-wide, but all of our
callers were using XYZW anyway. For my experiments with using writemask
on texturing, I've been using manual header setup in the compiler
backends, since we want to actually know what registers are written for
optimization and regis
The hardware just doesn't support it. I suspect this was a regression from
the move to fixed MESA_FORMATs for compressed textures and that previously we
were storing uncompressed for this or something.
Fixes GPU hangs in piglit "texwrap GL_EXT_texture_sRGB-s3tc bordercolor
swizzled" on my GM965.
In 2 of our checks, we were missing BREAK and CONTINUE.
NOTE: Candidate for the stable branches.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 33 +++-
src/mesa/drivers/dri/i965/brw_fs.h |1 +
.../dri/i965/brw_fs_schedule_instructions.cpp |
Tested with softpipe only exposing RGBA formats.
NOTE: This is a candidate for the stable branches.
---
src/mesa/main/pack.c| 26 +
src/mesa/main/texgetimage.c | 45 +++
2 files changed, 71 insertions(+)
diff --git a/src
The Mesa format can be RGBA_REV, the format/type can be
GL_RGBA/GL_UNSIGNED_BYTE, but the actual texture internal format can be
LUMINANCE_ALPHA, INTENSITY, etc. Therefore we should look at the base
internal format as well.
NOTE: This is a candidate for the stable branches.
---
src/mesa/main/t
_mesa_base_tex_format doesn't accept GL_BGR and GL_ABGR_EXT.
NOTE: This is a candidate for the stable branches.
---
src/mesa/main/texgetimage.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/src/mesa/main/texgetimage.c b/src/mesa/main/texgetimage.c
index 3a55
Paul Berry writes:
> Previously, the i965 driver enabled EXT_framebuffer_multisample even
> on pre-gen6 chipsets. However, since we don't support multisampling
> on these chips, we set GL_MAX_SAMPLES=1 (the minimum allowed by
> EXT_framebuffer_multisample), and if the client ever requested a
> m
https://bugs.freedesktop.org/show_bug.cgi?id=49779
Eric Anholt changed:
What|Removed |Added
Priority|medium |low
Assignee|i...@freedesktop.or
Background:
All of the GLSL specs from GLSL 1.30 (and GLSL ES 3.00) onward contain
language requiring certain integer variables to be declared with the "flat"
keyword, but they differ in exactly *when* the rule is enforced:
(a) GLSL 1.30 and 1.40 say that vertex shader outputs having integral typ
On Wed, Feb 6, 2013 at 11:42 AM, Kenneth Graunke wrote:
> All drivers (Gallium, classic i915, i965, radeon, r200, nouveau, and
> swrast) supported it. This patch enables it universally and removes
> the gl_extensions enable bit in favor of dummy_true.
>
> Signed-off-by: Kenneth Graunke
> ---
>
On Wed, Feb 6, 2013 at 4:30 PM, Kristian Høgsberg wrote:
> On Tue, Feb 5, 2013 at 8:43 AM, wrote:
>> From: José Fonseca
>>
>> I'd like to test Mesa OpenGL ES along side with NVIDIA libGL drivers. But
>> without this change, I get a NULL pointer dereference.
>
> Which DRI driver doesn't support
On Tue, Feb 5, 2013 at 8:43 AM, wrote:
> From: José Fonseca
>
> I'd like to test Mesa OpenGL ES along side with NVIDIA libGL drivers. But
> without this change, I get a NULL pointer dereference.
Which DRI driver doesn't support the flush extension? EGL is expected
to flush before swap buffer (
https://bugs.freedesktop.org/show_bug.cgi?id=60143
--- Comment #3 from Kristian Høgsberg ---
(In reply to comment #2)
> Created attachment 74279 [details] [review]
> gbm_dri_bo_create: Remember to initialize format
That looks good, but please also fix create_dumb() and attach output of git
forma
On Wed, Feb 6, 2013 at 11:42 AM, Kenneth Graunke wrote:
> All drivers (Gallium, classic i915, i965, radeon, r200, nouveau, and
> swrast) supported it. This patch enables it universally and removes
> the gl_extensions enable bit in favor of dummy_true.
>
> Signed-off-by: Kenneth Graunke
> ---
Re
https://bugs.freedesktop.org/show_bug.cgi?id=60086
Kristian Høgsberg changed:
What|Removed |Added
Assignee|mesa-dev@lists.freedesktop. |k...@bitplanet.net
All drivers (Gallium, classic i915, i965, radeon, r200, nouveau, and
swrast) supported it. This patch enables it universally and removes
the gl_extensions enable bit in favor of dummy_true.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/intel/intel_extensions.c | 1 -
src/mesa/driver
On Mon, Jan 28, 2013 at 9:50 PM, Ian Romanick wrote:
> On 01/28/2013 05:06 PM, Frank Henigman wrote:
>
>> An assertion in fs_visitor::remove_dead_**constants() would fail on
>> code like this, which accesses a non-existent uniform:
>>uniform vec u[1];
>>...
>>a += u[0] + u[1];
>> Shad
Previously, the i965 driver enabled EXT_framebuffer_multisample even
on pre-gen6 chipsets. However, since we don't support multisampling
on these chips, we set GL_MAX_SAMPLES=1 (the minimum allowed by
EXT_framebuffer_multisample), and if the client ever requested a
multisample buffer, we quietly s
On 02/06/2013 10:43 AM, Paul Berry wrote:
Previous to this patch, there were 13 identical definitions of this
macro in Mesa source. That's ridiculous. This patch consolidates 6
of them to a single definition in src/mesa/main/macros.h.
Unfortunately, I wasn't able to eliminate the remaining def
Previous to this patch, there were 13 identical definitions of this
macro in Mesa source. That's ridiculous. This patch consolidates 6
of them to a single definition in src/mesa/main/macros.h.
Unfortunately, I wasn't able to eliminate the remaining definitions,
since they occur in places that do
From: Roland Scheidegger
This should handle the new lod_zero modifier more correctly.
The runtime-conditional is a bit more complex however we now also do
scalar lod computation when appropriate which should more than make up for it.
The refactoring should also fix an issue with explicit lods
(lo
From: Roland Scheidegger
This optimized filter (when using repeat wrap modes,
linear min/mag/mip filters, pot textures) only applies to 2d textures,
but nothing prevented it from being used for other textures (likely
leading to very bogus sample results).
Note: This is a candidate for the 9.0 br
This fixes a couple of regressions on (probably not just) cayman
---
lib/Target/R600/AMDILISelDAGToDAG.cpp | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/lib/Target/R600/AMDILISelDAGToDAG.cpp
b/lib/Target/R600/AMDILISelDAGToDAG.cpp
index 84223f6..7fc3a2f 100644
--- a/l
From: Michel Dänzer
Also, add assertions to stress that render targets don't support scaled
formats.
20 more little piglits.
Signed-off-by: Michel Dänzer
---
Updated, more extensive patch for 2 extra little piglits.
src/gallium/drivers/radeonsi/si_state.c | 63 ++--
On 5 February 2013 11:34, Paul Berry wrote:
> On 4 February 2013 21:48, Chris Forbes wrote:
>
>> This series adds the core mesa bits and i965 driver support for
>> ARB_texture_multisample.
>>
>> Big changes from V1:
>>- Generally cleaner
>>- GLSL texelFetch() with a multisample sampler i
On 02/06/2013 01:28 AM, Kenneth Graunke wrote:
On 02/05/2013 11:09 PM, Kenneth Graunke wrote:
According to the OpenGL 2.1 specification, Table 6.11 (Coloring),
GL_FOG_COORD_SRC is supposed to be in the fog attribute.
NOTE: This is a candidate for stable branches.
Signed-off-by: Kenneth Graunke
On 4 February 2013 21:48, Chris Forbes wrote:
> On Gen6, lower this to `ld` with lod=0 and an extra sample_index
> parameter.
>
> On Gen7, use `ld2dms`. We don't support CMS yet for multisample
> textures, so we use MCS=0, which does the right thing for both IMS and
> UMS surfaces.
>
> Note: If w
From: Michel Dänzer
Append the overloaded vector type used for passing in the addressing
parameters.
Without this, LLVM uses the same function signature for all those types,
which cannot work.
Fixes problems e.g. with FlightGear and Red Eclipse.
Signed-off-by: Michel Dänzer
---
src/gallium/d
On 4 February 2013 21:48, Chris Forbes wrote:
> On Gen6, lower this to `ld` with lod=0 and an extra sample_index
> parameter.
>
> On Gen7, use `ld2dms`. This takes an additional MCS parameter to support
> compressed multisample surfaces, but we're not enabling them for
> multisample textures for
On Tue, Feb 05, 2013 at 11:16:05PM +0100, Christian König wrote:
> From: Christian König
>
> Remove all the unused code.
>
Reviewed-by: Tom Stellard
> Signed-off-by: Christian König
> ---
> lib/Target/R600/AMDGPUAsmPrinter.cpp |2 +-
> lib/Target/R600/MCTargetDesc/SIMCCodeEmi
On 4 February 2013 21:48, Chris Forbes wrote:
> Gen7 has an erratum affecting the ld_mcs message, making it unsafe to
> use when the surface doesn't have an associated MCS.
>
Would you mind quoting the exact text of the erratum here (and citing the
page number)?
With that addition, this patch i
On 4 February 2013 21:48, Chris Forbes wrote:
> V2: - fix formatting issues
> - generate GL_OUT_OF_MEMORY if teximage cannot be allocated
> - fix for state moving from texobj to image
>
> Signed-off-by: Chris Forbes
> ---
> src/mesa/main/teximage.c | 153
> ++
On 5 February 2013 22:40, Kenneth Graunke wrote:
> The BLT engine has many limitations. Currently, it can only blit
> X-tiled buffers (since we don't have a kernel API to whack the BLT
> tiling mode register), which means all depth/stencil operations get
> punted to meta code, which can be very
Reviewed-by: Jose Fonseca
- Original Message -
> From: Roland Scheidegger
>
> Need to calculate the number of mip levels (if it would be worthwile
> could
> store it in dynamic state).
> While here, the query code also used chan 2 for the lod value.
> This worked with mesa state tracker
On Tue, Feb 05, 2013 at 10:40:28PM +0100, Martin Steigerwald wrote:
> Am Dienstag, 5. Februar 2013 schrieb Daniel Vetter:
> > On Sat, Feb 02, 2013 at 09:22:55PM +0100, Martin Steigerwald wrote:
> > > About these messages: Uhm, bingo:
> > >
> > > merkaba:~> zgrep -i "GPU hung" /var/log/kern.log*
>
https://bugs.freedesktop.org/show_bug.cgi?id=60143
--- Comment #2 from Daniel van Vugt ---
Created attachment 74279
--> https://bugs.freedesktop.org/attachment.cgi?id=74279&action=edit
gbm_dri_bo_create: Remember to initialize format
--
You are receiving this mail because:
You are the assigne
On 02/05/2013 11:09 PM, Kenneth Graunke wrote:
According to the OpenGL 2.1 specification, Table 6.11 (Coloring),
GL_FOG_COORD_SRC is supposed to be in the fog attribute.
NOTE: This is a candidate for stable branches.
Signed-off-by: Kenneth Graunke
---
src/mesa/main/attrib.c | 1 +
1 file ch
51 matches
Mail list logo
