On Tue, May 15, 2012 at 3:49 PM, Kenneth Graunke wrote:
> We should just set the bits of functionality that we support; the
> GL/ES1/ES2 flags in extensions.c will take care of advertising the
> appropriate extensions for the current API.
>
> This enables the GL_EXT_texture_compression_dxt1 extens
https://bugs.freedesktop.org/show_bug.cgi?id=49538
Vinson Lee changed:
What|Removed |Added
CC||jfons...@vmware.com
--
Configure bugmail:
https://bugs.freedesktop.org/show_bug.cgi?id=49539
--- Comment #1 from Vinson Lee 2012-05-15 22:43:39 UTC
---
vs-attrib-ivec4-precision, vs-attrib-uvec4-implied, and
vs-attrib-uvec4-precision have also regressed on softpipe.
--
Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=
Wouldn't it be easier (and more efficient) if you could just reuse the
sampler code which does mipmap minification, i.e. get the texture sizes
from bld.int_size and do a lp_build_minify (followed by extract shuffles)?
Also, is it on purpose that the non-explicit lod path doesn't handle all
cases (u
https://bugs.freedesktop.org/show_bug.cgi?id=49766
Tom Stellard changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|
https://bugs.freedesktop.org/show_bug.cgi?id=49768
Tom Stellard changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|
This extension appears to be written against ES 1.0.
In ES 2.0, you really want to be using FBOs instead.
---
src/mesa/main/extensions.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c
index a843a40..cd76eeb 100644
---
We should just set the bits of functionality that we support; the
GL/ES1/ES2 flags in extensions.c will take care of advertising the
appropriate extensions for the current API.
This enables the GL_EXT_texture_compression_dxt1 extension on ES1/ES2
when libtxc_dxtn is installed or the force_s3tc dri
- Original Message -
> On Wed, May 09, 2012 at 10:01:37AM -0700, Jose Fonseca wrote:
> > Something else is not right here, as
> >
> > lp_build_const_vec(bld->gallivm, type, -1.0)
> >
> > and
> >
> > lp_build_const_int_vec(bld->gallivm, type, -1)
> >
> > should produce the same outpu
Fixes a bunch of glsl 1.10 interpolation piglit tests.
Signed-off-by: Olivier Galibert
---
src/gallium/drivers/llvmpipe/lp_bld_interp.h |2 +-
src/gallium/drivers/llvmpipe/lp_state_fs.c|2 +-
src/gallium/drivers/llvmpipe/lp_state_setup.c |2 +-
3 files changed, 3 insertions(+),
Piglits test for fragment shaders pass, vertex shaders fail. The
actual failure seems to be in the interpolators, and not the
textureSize query.
Signed-off-by: Olivier Galibert
---
src/gallium/auxiliary/draw/draw_llvm_sample.c | 23 +
src/gallium/auxiliary/gallivm/lp_bld_sample.h
On 05/14/2012 06:24 PM, Paul Berry wrote:
[snip]
I'm not going to try to change your mind, but in the spirit of
clarifying the method that was behind my madness:
I did not have the clarity of mind during our discussion today to point
out that in creating the brw_blorp_params class, I was in fact
On 05/13/2012 07:06 AM, Jordan Justen wrote:
Note: This changeset depends on my other changeset:
"move software primitive restart into VBO module"
v1:
* Enable NV_primitive_restart for all hardware. (Software primitive
restart is used where necessary)
* If hardware supports cut in
On 05/14/2012 05:36 PM, Eric Anholt wrote:
I took a little tour of the Intel oglconform failures, and found some
easy fixes. Enjoy.
The series is
Reviewed-by: Ian Romanick
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freede
On 05/13/2012 07:00 AM, Jordan Justen wrote:
v2:
* change non-gallium drivers to not enable NV_primitive_restart
by default. (this matches the current mesa behavior.)
* gallium drivers will continue to use software primitivie restart
where needed and will always declare the NV_primiti
On 05/14/2012 05:36 PM, Eric Anholt wrote:
I took a little tour of the Intel oglconform failures, and found some
easy fixes. Enjoy.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
For t
On 05/15/2012 07:31 AM, Paul Berry wrote:
No functional change. This patch replaces the
brw_blorp_params::exec() method with a global function
brw_blorp_exec() that performs the operation described by the params
data structure.
Reviewed-by: Kenneth Graunke
___
On 05/14/2012 05:36 PM, Eric Anholt wrote:
I managed to completely trash it in 22d81f15.
---
src/glsl/ast_to_hir.cpp | 545 +++
1 file changed, 263 insertions(+), 282 deletions(-)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index
No functional change. This patch replaces the
brw_blorp_params::exec() method with a global function
brw_blorp_exec() that performs the operation described by the params
data structure.
---
src/mesa/drivers/dri/i965/brw_blorp.cpp |6 +++---
src/mesa/drivers/dri/i965/brw_blorp.h|
On Tue, May 15, 2012 at 01:41:25PM +0400, Vadim Girlin wrote:
> With these patches piglit results are finally equal with non-llvm backend.
>
Nice!
> radeon/llvm: add generated files to .gitignore
> radeon/llvm: add names for AMDGPU* passes
> radeon/llvm: fix BUILD_VECTOR lowering for replic
On 05/14/2012 06:36 PM, Eric Anholt wrote:
Fixes piglit GL_ARB_shader_objeccts/getactiveuniform-beginend.
---
src/mesa/main/uniform_query.cpp |2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/main/uniform_query.cpp b/src/mesa/main/uniform_query.cpp
index 08d330a..f5d998f 100644
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/radeon/AMDGPUIntrinsics.td |2 +-
src/gallium/drivers/radeon/R600CodeEmitter.cpp | 15
src/gallium/drivers/radeon/R600Instructions.td |7 ++--
.../drivers/radeon/radeon_setup_tgsi_llvm.c| 37 +
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/r600/r600_llvm.c | 14 +++---
src/gallium/drivers/radeon/AMDGPUIntrinsics.td |2 +-
src/gallium/drivers/radeon/AMDGPUUtil.cpp |2 +
src/gallium/drivers/radeon/R600ISelLowering.cpp| 47 ++
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/radeon/R600GenRegisterInfo.pl |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeon/R600GenRegisterInfo.pl
b/src/gallium/drivers/radeon/R600GenRegisterInfo.pl
index 406f3df..9e7cf61 100644
--- a/src/g
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/r600/r600_llvm.c | 23 ++--
src/gallium/drivers/radeon/AMDGPUIntrinsics.td | 76 +--
src/gallium/drivers/radeon/AMDILFormats.td | 18 +--
.../drivers/radeon/R600IntrinsicsNoOpenCL.td |2 +-
src/g
Should be round_posinf instead of round_neginf.
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/radeon/R600Instructions.td |4 ++--
src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c |2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/radeo
We can save one instruction by lowering it to:
SUB_INT tmp, 0, src
MAX_INT dst, src, tmp
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/radeon/R600LowerInstructions.cpp | 18 +-
1 file changed, 5 insertions(+), 13 deletions(-)
diff --git a/src/gallium/drivers/radeon/R
We expect that all elements will be assigned even if they are equal
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/radeon/AMDILISelLowering.cpp |2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/drivers/radeon/AMDILISelLowering.cpp
b/src/gallium/drivers/radeon/AMDILISelLo
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/radeon/AMDGPUConvertToISA.cpp |3 +++
src/gallium/drivers/radeon/AMDGPULowerInstructions.cpp |2 ++
2 files changed, 5 insertions(+)
diff --git a/src/gallium/drivers/radeon/AMDGPUConvertToISA.cpp
b/src/gallium/drivers/radeon/AMDGP
Signed-off-by: Vadim Girlin
---
src/gallium/drivers/radeon/.gitignore | 18 ++
1 file changed, 18 insertions(+)
create mode 100644 src/gallium/drivers/radeon/.gitignore
diff --git a/src/gallium/drivers/radeon/.gitignore
b/src/gallium/drivers/radeon/.gitignore
new file mode 10
With these patches piglit results are finally equal with non-llvm backend.
radeon/llvm: add generated files to .gitignore
radeon/llvm: add names for AMDGPU* passes
radeon/llvm: fix BUILD_VECTOR lowering for replicated value
radeon/llvm: improve ABS_i32 lowering
radeon/llvm: use correct i
31 matches
Mail list logo