Hi,
Attached is a change to core mesa. This fixes a potential refcount locking
problem with shared OpenGL objects.
This change survives a piglit r600 run on my local machine.
Please review.
Thanks
Mathias
From e0298379c240f3a3885d1db92e0bcf5fc44af953 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ma
https://bugs.freedesktop.org/show_bug.cgi?id=41787
--- Comment #10 from Brian Paul 2011-10-17 16:56:13 PDT ---
Created attachment 52451
--> https://bugs.freedesktop.org/attachment.cgi?id=52451
glut test program
Jose, I extracted some of the commands from the trace into a glut test harness
and
On 10/17/2011 02:45 PM, Eric Anholt wrote:
The spec doesn't explicitly mandate this behavior, but it seems like
the only sensible thing to do (as opposed to assertion failing or
segfaulting).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=40308
---
Oops, looks like I never sent this one
The spec doesn't explicitly mandate this behavior, but it seems like
the only sensible thing to do (as opposed to assertion failing or
segfaulting).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=40308
---
Oops, looks like I never sent this one out for review.
src/mesa/main/mipmap.c |
*ping*. Anything to be done on my end? -tom
tom fogal writes:
> --- =_aa0
> Content-Type: text/plain; charset="us-ascii"
> Content-ID: <27394.131845620...@shigeru.sci.utah.edu>
>
> Hi Ian, Kenneth,
>
> Ian Romanick writes:
> > On 10/10/2011 03:30 PM, tom fogal wrote:
> > > One of
On Mon, Oct 17, 2011 at 05:32:22PM +0200, Michel Dänzer wrote:
> On Son, 2011-10-16 at 18:47 +0200, Marcin Slusarz wrote:
> > On Sun, Oct 16, 2011 at 04:15:14PM +0200, Michel Dänzer wrote:
> > > On Son, 2011-10-16 at 14:54 +0200, Marcin Slusarz wrote:
> > > > On Sun, Oct 16, 2011 at 02:03:16PM +0
On Mon, 17 Oct 2011 07:45:22 -0700, Chad Versace wrote:
> By request, I'm posting the HiZ work in small, digestable portions. If you
> want to see where I'm heading with all this, then see my hiz branch.
>
> The next series will define the HiZ meta-op and execute the buffer
> resolves.
This seri
On Mon, 17 Oct 2011 07:40:57 -0700, Chad Versace wrote:
> The 'mode' param is a bitset of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT.
>
> A future commit will perform buffer resolves in intel_region_map(). So,
> even though the access mode is irrelevant to the GTT, the extra
> information allows us to in
On Mon, 17 Oct 2011 07:27:54 -0700, Chad Versace wrote:
> Don't dereference the color buffer if one isn't attached.
>
> This fixes the following Piglit tests in my experimental HiZ branch:
> glean/logicOp
> glean/paths
These two are
Reviewed-by: Eric Anholt
pgpEDOXeT95md.pgp
Descript
On 10/16/2011 04:37 PM, vlj wrote:
v2 :
- Fix format issue thank to Brian Paul comments.
- UBOs are now sent to program correctly.
I only have whitespace suggestions for this file. The new code should
be formatted the same as the existing code. Some examples below.
---
src/
On 10/16/2011 04:37 PM, vlj wrote:
---
src/mesa/main/bufferobj.c |2 +
src/mesa/main/uniforms.c | 187 +
src/mesa/main/uniforms.h | 15
3 files changed, 204 insertions(+), 0 deletions(-)
diff --git a/src/mesa/main/bufferobj.c b/src/m
On 10/16/2011 04:37 PM, vlj wrote:
---
src/mesa/main/config.h |5
src/mesa/main/mtypes.h | 51 +++
src/mesa/main/shaderobj.c | 10 +++
src/mesa/program/prog_uniform.h |1 +
4 files changed, 67 insertions(+), 0
On Son, 2011-10-16 at 18:47 +0200, Marcin Slusarz wrote:
> On Sun, Oct 16, 2011 at 04:15:14PM +0200, Michel Dänzer wrote:
> > On Son, 2011-10-16 at 14:54 +0200, Marcin Slusarz wrote:
> > > On Sun, Oct 16, 2011 at 02:03:16PM +0200, Marcin Slusarz wrote:
> > > > On Fri, Oct 14, 2011 at 08:22:35AM +
On 10/16/2011 04:37 PM, vlj wrote:
Hi,
I updated coding style thank to Bryan Paul comments.
Besides there are additional work on the API implementation
(although it is still uncomplete) ; the parser should now handles
default UBO layout (even if currently layout is ignored, std140 is the
only la
intel_context::gen field is set by intelInitContext(). So, by calling
intelInitContext() before initializing the vtable, we can can construct
different vtables for different gens.
Specifically, this allows us to set the HiZ operations to be no-ops for
contexts for which HiZ is not enabled.
Signed
If HiZ is enabled for the context, set
hiz_resolve_depthbuffer = gen6_hiz_resolve_depthbuffer
hiz_resolve_hizbuffer = gen6_hiz_resolve_hizbuffer
Otherwise, set the resolve funcs to be no-ops.
Signed-off-by: Chad Versace
---
src/mesa/drivers/dri/i965/brw_vtbl.c | 15 +++
1 f
Add stubs for the following functions:
gen6_hiz_resolve_depthbuffer
gen6_hiz_resolve_hizbuffer
Signed-off-by: Chad Versace
---
src/mesa/drivers/dri/i965/Makefile.sources |1 +
src/mesa/drivers/dri/i965/gen6_hiz.c | 40
src/mesa/drivers/dri/i965/ge
Since neither i830 nor i915 hardware supports HiZ, we set the functions to
be no-ops.
Signed-off-by: Chad Versace
---
src/mesa/drivers/dri/i915/i830_vtbl.c |9 +
src/mesa/drivers/dri/i915/i915_vtbl.c |9 +
2 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/sr
Add the following functions:
hiz_resolve_depthbuffer
hiz_resolve_hizbuffer
Signed-off-by: Chad Versace
---
src/mesa/drivers/dri/intel/intel_context.h | 16
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_context.h
b/src
By request, I'm posting the HiZ work in small, digestable portions. If you
want to see where I'm heading with all this, then see my hiz branch.
The next series will define the HiZ meta-op and execute the buffer
resolves.
___
mesa-dev mailing list
mesa-d
On 10/17/2011 08:42 AM, Brian Paul wrote:
On 10/15/2011 08:46 AM, Christoph Bumiller wrote:
---
src/gallium/docs/source/context.rst | 63
++---
src/gallium/include/pipe/p_defines.h | 19 ++
2 files changed, 68 insertions(+), 14 deletions(-)
Looks good to me.
On 10/15/2011 08:46 AM, Christoph Bumiller wrote:
---
src/gallium/docs/source/context.rst | 63 ++---
src/gallium/include/pipe/p_defines.h | 19 ++
2 files changed, 68 insertions(+), 14 deletions(-)
Looks good to me.
Reviewed-by: Brian Paul
__
The 'mode' param is a bitset of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT.
A future commit will perform buffer resolves in intel_region_map(). So,
even though the access mode is irrelevant to the GTT, the extra
information allows us to intelligently avoid unneccessary buffer resolves.
Signed-off-by: Cha
Replace it with intel_renderbuffer::region::hiz::region.
Signed-off-by: Chad Versace
---
src/mesa/drivers/dri/i965/brw_misc_state.c | 27 +
src/mesa/drivers/dri/intel/intel_context.c | 10 --
src/mesa/drivers/dri/intel/intel_fbo.c | 36 +-
This function allocates the HiZ region and initializes the HiZ control
state for a depthbuffer.
It is wise to define the logic for HiZ region allocation in a single
location, since when MSAA arrives that logic will become more complicated.
Signed-off-by: Chad Versace
---
src/mesa/drivers/dri/in
This eliminates the need for intel_fbo.h to include intel_regions.h on the
next commit. And this function was too large to be inline, anyway.
Signed-off-by: Chad Versace
---
src/mesa/drivers/dri/intel/intel_fbo.c | 12
src/mesa/drivers/dri/intel/intel_fbo.h | 14 ++
Before this commit, intel_renderbuffer_map/unmap() directly called
drm_intel_gem_bo_map_gtt(). Since a buffer resolve may be required before
mapping, though, we need instead need to call intel_region_map().
Signed-off-by: Chad Versace
---
src/mesa/drivers/dri/intel/intel_span.c |7 +++
1
The HiZ control state is used only by depth regions for which HiZ is
enabled. The control state points to the depth region's associated HiZ
region and indicates if any resolve is needed.
A later commit will remove intel_renderbuffer::hiz_region. since that
pointer will be duplicated by intel_rende
This series adds a struct for HiZ control state to intel_region, and with it
replaces intel_renderbuffer::hiz_region and intel_mipmap_tree::hiz_region.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo
On 10/15/2011 08:48 AM, Liu Aleaxander wrote:
From af5e640575db5f7e2db94a98aa75a84a01ee0cf0 Mon Sep 17 00:00:00 2001
From: Yuanhan Liu
Date: Sat, 15 Oct 2011 22:44:18 +0800
Subject: [PATCH] mesa: handle the pbo case for save_Bitmap
Wrap _mesa_unpack_bitmap to handle the case that data is stored
On 10/16/2011 07:59 PM, Yuanhan Liu wrote:
v2: quote the spec; explicitly exclude the GL_BITMAP case to make code
more readable. (comments from Ian)
v3: Cast the offset by GLintptr to remove the compile warning(comments
from Brian).
I also found that I should use _mesa_sizeof_pac
Don't dereference the color buffer if one isn't attached.
This fixes the following Piglit tests in my experimental HiZ branch:
glean/logicOp
glean/paths
Note: This is a candidate for the stable branches.
Signed-off-by: Chad Versace
---
src/mesa/drivers/dri/i965/gen6_cc.c |2 +-
1 fi
During anholt's MapTextureImage refactoring, the call to
intel_tex_image_s8z24_create_renderbuffers was missplaced. It needs to
occur *after* the miptree is allocated.
Signed-off-by: Chad Versace
---
src/mesa/drivers/dri/intel/intel_tex.c | 10 +-
1 files changed, 5 insertions(+), 5 de
This is necessary because i965 will need to call vbo_bind_array() when
cleaning up after a buffer resolve meta-op.
Detailed Explanation
The vbo module tracks vertex attributes separately from the gl_context.
Specifically, the vbo module maintins vertex attributes in
vbo_exec_c
These hooks allow drivers to prepare for and cleanup after a glBegin/glEnd
block.
i965 will use the hooks to avoid avoid recursive calls to FLUSH_VERTICES
during a buffer resolve meta-op.
Detailed Justification
--
When vertices are queued during a glBegin/glEnd block, those ve
In some cases, Intel hardware requires that depth and stencil buffers be
separate. To accommodate swrast, i965 resorts to hackery that causes
a segfault in the fastpaths of draw_depth_stencil_pixels() and
read_depth_stencil_pixels().
The hack is that i965 sets framebuffer->Attachment[BUFFER_DEPTH]
When i965 uses (in the near future) meta-ops to perform buffer resolves,
the meta-op stack exceeds depth 2. I bumped it to 8 because... 8 is bigger
than 2, but not too big.
Signed-off-by: Chad Versace
---
src/mesa/drivers/common/meta.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
If this flag is set, then _mesa_meta_begin/end will save/restore the state of
GL_SELECT and GL_FEEDBACK render modes.
Intel's future buffer resolve meta-ops will require this, since buffer resolves
may occur when the GL_RENDER_MODE is GL_SELECT.
Signed-off-by: Chad Versace
---
src/mesa/drivers/
This is required in order for meta-ops to save/restore the GL_RENDER_MODE
state.
Signed-off-by: Chad Versace
---
src/mesa/main/feedback.c |2 +-
src/mesa/main/feedback.h |3 +++
2 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/src/mesa/main/feedback.c b/src/mesa/main/feedba
HiZ is near completion on i965, and it requires some preliminary changes to
core Mesa. No big changes here; a quick bugfix, redeclaring functions as
non-static, and adding an extra meta-op flag and some functions to the Driver
vtbl.
___
mesa-dev mailing
On 10/15/2011 08:05 PM, Liu Aleaxander wrote:
From 98d4600d74829d16045dd577855b7c9f25e762c2 Mon Sep 17 00:00:00 2001
From: Yuanhan Liu
Date: Sun, 16 Oct 2011 09:13:10 +0800
Subject: [PATCH] mesa: handle PBO access error in display list mode
While dealing with pbo data in display list mode, it d
On 10/15/2011 08:06 PM, Liu Aleaxander wrote:
From d91661686e8d7def96561700092adda57215f0ab Mon Sep 17 00:00:00 2001
From: Yuanhan Liu
Date: Sun, 16 Oct 2011 09:35:33 +0800
Subject: [PATCH] mesa: fix inverted pbo test error at
_mesa_GetnCompressedTexImageARB
It seems like a typo.
Signed-off-by
https://bugs.freedesktop.org/show_bug.cgi?id=18209
Michel Dänzer changed:
What|Removed |Added
AssignedTo|mesa-dev@lists.freedesktop. |xorg-t...@lists.x.org
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