Hi,
Since the lazy gpu flush changes for r600g about two weeks ago, I get broken
mipmaps on my notebooks rv635.
I am not sure if my analysis is right, but it appears to me that flushing the
destination caches like it is done in r600_context_flush_dest_caches is not
sufficient for my rv635. Sin
Hi,
Attached is at patch described as follows:
For creating and reusing already existing buffer objects,
take care of the placement domains.
Have a little more finegrained usage to placement mapping.
This change does not account for the real location of the
buffer object for buffer objects retu
https://bugs.freedesktop.org/show_bug.cgi?id=36702
atswa...@gmail.com changed:
What|Removed |Added
CC||atswa...@gmail.com
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Configure bug
https://bugs.freedesktop.org/show_bug.cgi?id=36702
Summary: git master 41b38bd won't build on amd64
Product: Mesa
Version: git
Platform: x86-64 (AMD64)
OS/Version: Linux (All)
Status: NEW
Severity: normal
Priority:
From: Chad Versace
That is, update brw_context.state.stencil_region and set the dirty bit
BRW_NEW_STENCIL_BUFFER.
Signed-off-by: Chad Versace
---
src/mesa/drivers/dri/i965/brw_vtbl.c |8 +++-
src/mesa/drivers/dri/intel/intel_buffers.c | 13 +
2 files changed, 16 ins
From: Chad Versace
Add additional parameter 'struct intel_region *stencil_region'.
A subsequent patch uses the new parameter to update
brw_context.state.stencil_region.
Signed-off-by: Chad Versace
---
src/mesa/drivers/dri/i915/i915_vtbl.c |3 +++
src/mesa/drivers/dri/i965/brw_vtbl.c
From: Chad Versace
- Add field brw_context.state.stencil_region.
- Define dirty bit BRW_NEW_STENCIL_BUFFER, which signals that
brw_context.state.stencil_region has changed.
- Define 'struct brw_tracked_state brw_stencil_buffer' and add it to
gen4_atoms.
Signed-off-by: Chad Versace
---
src/
From: Chad Versace
... when a HiZ region is present. Also change the hiz bits and depth
format in 3D_STATE_DEPTH_BUFFER.
Signed-off-by: Chad Versace
---
src/mesa/drivers/dri/i965/brw_misc_state.c | 47 +---
1 files changed, 42 insertions(+), 5 deletions(-)
diff --git
From: Chad Versace
Rename variable 'region' to 'depth_region'. This removes naming ambiguity
introduced by the next commit, which introduces the variable 'hiz_region'.
Signed-off-by: Chad Versace
---
src/mesa/drivers/dri/i965/brw_misc_state.c | 26 +-
1 files changed,
From: Chad Versace
When HiZ is enabled, hardware allows rendering to a separate stencil
region and does not allow rendering to a combined depth/stencil region.
So we need to:
1. Set an FBO's status to GL_FRAMEBUFFER_UNSUPPORTED when HiZ is enabled
and its depth and stencil attachments are ide
From: Chad Versace
Hardware does not allow rendering to depth/stencil formats when HiZ is
enabled. Also, a GEM region must be allocated for HiZ.
Signed-off-by: Chad Versace
---
src/mesa/drivers/dri/intel/intel_fbo.c | 36 +++-
1 files changed, 35 insertions(+), 1
From: Chad Versace
When rendering to a depth buffer when HiZ is enabled, a GEM region must be
allocated just for HiZ. There are two potential ways to do this:
1. Allocate a separate HiZ region.
2. Allocate a larger depth region, and let the tail be the HiZ region.
Method 1 is chosen because,
From: Chad Versace
Prefer MESA_FORMAT_X8_Z24 over MESA_FORMAT_S8_Z24 for textures with
internal format GL_DEPTH_COMPONENT*.
i965 needs MESA_FORMAT_X8_Z24 for HiZ.
Signed-off-by: Chad Versace
---
src/mesa/main/texformat.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git
From: Chad Versace
Combined depth/stencil formats cannot be used when HiZ is enabled, so
change intel_context.ctx.TextureFormatSupported accordingly.
Signed-off-by: Chad Versace
---
src/mesa/drivers/dri/intel/intel_context.c|7 ++-
src/mesa/drivers/dri/intel/intel_tex_format.c |
From: Chad Versace
Valid values for INTEL_USE_HIZ are "0" or "1".
Overriding HiZ is useful for performance profiling and testing.
Signed-off-by: Chad Versace
---
src/mesa/drivers/dri/intel/intel_context.c | 24
1 files changed, 24 insertions(+), 0 deletions(-)
diff
From: Chad Versace
Currently, it is always set it to false. Once the HiZ implementation is
complete, it needs to be enabled on Gen >= 5.
Even though support for hiz is present only on gen >= 5, the field belongs
in intel_context, not brw_context, because the functions that interact
with DRI2 and
From: Chad Versace
Begin implementing HiZ for Gen >= 5. Since it's incomplete, the patch series
leaves HiZ disabled default. But you can force enable it with env
INTEL_USE_HIZ=1.
I did a full Piglit run on Gen 5 and found no regressions.
These patches live on my personal hiz branch.
What does
On 04/29/2011 04:13 PM, Eric Anholt wrote:
Fixes glsl-max-varyings.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35614
---
src/mesa/drivers/dri/i965/brw_vs_emit.c | 35 +++---
1 files changed, 27 insertions(+), 8 deletions(-)
Nice catch.
Reviewed-by: Kenn
Fixes glsl-max-varyings.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35614
---
src/mesa/drivers/dri/i965/brw_vs_emit.c | 35 +++---
1 files changed, 27 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c
b/src/mesa/drivers/dri/i
Reviewed-by: Brian Paul
On 04/29/2011 10:13 AM, Marek Olšák wrote:
Tested with softpipe and llvmpipe.
---
src/mesa/state_tracker/st_extensions.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/src/mesa/state_tracker/st_extensions.c
b/src/mesa/state_tracker/st_e
Reviewed-by: Brian Paul
On 04/29/2011 10:13 AM, Marek Olšák wrote:
GL_FIXED should not be accepted in the other gl*Pointer calls in OpenGL.
There is a new piglit for this: arb_es2_compatibility-fixed-type.
---
src/mesa/main/varray.c | 23 +--
1 files changed, 13 insert
https://bugs.freedesktop.org/show_bug.cgi?id=36687
--- Comment #3 from Marek Olšák 2011-04-29 11:18:26 PDT ---
Use: --disable-gallium-r300
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https://bugs.freedesktop.org/show_bug.cgi?id=36687
--- Comment #2 from David Ronis 2011-04-29 11:10:25 PDT
---
Thanks for the quick reply. So mesa requires a new compiler suite just for
one module? Amazing! I've got an R200 here, can I simply disable the R300
module?
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Configure bugmail:
https://bugs.freedesktop.org/show_bug.cgi?id=36687
Alex Deucher changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|
https://bugs.freedesktop.org/show_bug.cgi?id=36687
Summary: [regression] git/master now requires LLVM to build
Product: Mesa
Version: git
Platform: x86 (IA32)
OS/Version: Linux (All)
Status: NEW
Severity: critical
P
Tested with softpipe and llvmpipe.
---
src/mesa/state_tracker/st_extensions.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/src/mesa/state_tracker/st_extensions.c
b/src/mesa/state_tracker/st_extensions.c
index a5324df..030bbc7 100644
--- a/src/mesa/state_tracker/st
GL_FIXED should not be accepted in the other gl*Pointer calls in OpenGL.
There is a new piglit for this: arb_es2_compatibility-fixed-type.
---
src/mesa/main/varray.c | 23 +--
1 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/src/mesa/main/varray.c b/src/mesa/
Looks good.
Reviewed-by: Marek Olšák
On Fri, Apr 29, 2011 at 1:55 PM, Jon TURNEY wrote:
> On 28/04/2011 11:50, Marek Olšák wrote:
>> Would the attached patch be ok with you? Or do you have a better idea?
>
> I'm wondering if it makes any sense to build the various gallium hardware
> drivers whe
On 28/04/2011 11:50, Marek Olšák wrote:
> Would the attached patch be ok with you? Or do you have a better idea?
I'm wondering if it makes any sense to build the various gallium hardware
drivers when not ./configured --with-driver=dri? (at the moment svga i915 i965
r300 are all automatically enabl
Tested-by: Marek Olšák
On Wed, Apr 27, 2011 at 8:53 PM, Christoph Bumiller
wrote:
> Again, with a more detailed explanation added as comments.
>
> On 20.04.2011 17:33, Christoph Bumiller wrote:
>
> On 04/19/2011 04:00 AM, Christoph Bumiller wrote:
>
> On 16.04.2011 18:50, Christoph Bumiller wr
Reviewed-by: Marek Olšák
On Tue, Apr 26, 2011 at 2:17 PM, Jon TURNEY wrote:
> Since commit de579a1 "Include GIT SHA1 in GL version string"
>
> $ git status
> On branch master
> Your branch is ahead of 'origin/master' by 2 commits.
>
> Untracked files:
> (use "git add ..." to include in what
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