[llvm-branch-commits] [llvm] 0785f12 - [X86] Regenerate bmi-intrinsics-fast-isel.ll tests

Author: Simon Pilgrim Date: 2020-12-08T15:36:48Z New Revision: 0785f12e6ebb7cdffe7191b5fe9a430a2979217e URL: https://github.com/llvm/llvm-project/commit/0785f12e6ebb7cdffe7191b5fe9a430a2979217e DIFF: https://github.com/llvm/llvm-project/commit/0785f12e6ebb7cdffe7191b5fe9a430a2979217e.diff LOG:

[llvm-branch-commits] [llvm] e18f8d6 - [X86] Regenerate store-narrow.ll tests

Author: Simon Pilgrim Date: 2020-12-08T15:36:49Z New Revision: e18f8d63bd7f8cb0baa12f142a2542aeb40847d6 URL: https://github.com/llvm/llvm-project/commit/e18f8d63bd7f8cb0baa12f142a2542aeb40847d6 DIFF: https://github.com/llvm/llvm-project/commit/e18f8d63bd7f8cb0baa12f142a2542aeb40847d6.diff LOG:

[llvm-branch-commits] [clang] 25f5df7 - SemaType.cpp - use castAs<> instead of getAs<> for dereferenced pointers

Author: Simon Pilgrim Date: 2020-12-08T16:37:20Z New Revision: 25f5df7e0bc950ad244e8da000ce4248bd41c140 URL: https://github.com/llvm/llvm-project/commit/25f5df7e0bc950ad244e8da000ce4248bd41c140 DIFF: https://github.com/llvm/llvm-project/commit/25f5df7e0bc950ad244e8da000ce4248bd41c140.diff LOG:

[llvm-branch-commits] [llvm] 24184db - [X86] Fold CONCAT(VPERMV3(X, Y, M0), VPERMV3(Z, W, M1)) -> VPERMV3(CONCAT(X, Z), CONCAT(Y, W), CONCAT(M0, M1))

Author: Simon Pilgrim Date: 2020-12-09T14:29:32Z New Revision: 24184dbb82f9eac76c4ffe077fb957a526b1b963 URL: https://github.com/llvm/llvm-project/commit/24184dbb82f9eac76c4ffe077fb957a526b1b963 DIFF: https://github.com/llvm/llvm-project/commit/24184dbb82f9eac76c4ffe077fb957a526b1b963.diff LOG:

[llvm-branch-commits] [llvm] 0ee73bb - [X86] Regenerate vector-reduce-mul.ll with common check prefixes. NFC.

Author: Simon Pilgrim Date: 2020-12-13T14:25:42Z New Revision: 0ee73bb24ab624990175519a8158e966e80f7f92 URL: https://github.com/llvm/llvm-project/commit/0ee73bb24ab624990175519a8158e966e80f7f92 DIFF: https://github.com/llvm/llvm-project/commit/0ee73bb24ab624990175519a8158e966e80f7f92.diff LOG:

[llvm-branch-commits] [llvm] 47321c3 - [X86][SSE] combineReductionToHorizontal - add vXi8 ISD::MUL reduction handling (PR39709)

Author: Simon Pilgrim Date: 2020-12-13T15:22:54Z New Revision: 47321c311bdbe0145b9bf45d822185c37b19fa50 URL: https://github.com/llvm/llvm-project/commit/47321c311bdbe0145b9bf45d822185c37b19fa50 DIFF: https://github.com/llvm/llvm-project/commit/47321c311bdbe0145b9bf45d822185c37b19fa50.diff LOG:

[llvm-branch-commits] [clang] 4855a10 - [X86] Convert fadd/fmul _mm_reduce_* intrinsics to emit llvm.reduction intrinsics (PR47506)

Author: Simon Pilgrim Date: 2020-12-13T15:37:35Z New Revision: 4855a1004d4d87b6c21c510c1724e74a8d37d91a URL: https://github.com/llvm/llvm-project/commit/4855a1004d4d87b6c21c510c1724e74a8d37d91a DIFF: https://github.com/llvm/llvm-project/commit/4855a1004d4d87b6c21c510c1724e74a8d37d91a.diff LOG:

[llvm-branch-commits] [llvm] 8bdfc12 - [X86][AVX] Add additional X86ISD::SUBV_BROADCAST_LOAD test case for D92645

Author: Simon Pilgrim Date: 2020-12-13T16:43:33Z New Revision: 8bdfc1222f7cee4f4c0988e6a03fd090e997b99e URL: https://github.com/llvm/llvm-project/commit/8bdfc1222f7cee4f4c0988e6a03fd090e997b99e DIFF: https://github.com/llvm/llvm-project/commit/8bdfc1222f7cee4f4c0988e6a03fd090e997b99e.diff LOG:

[llvm-branch-commits] [llvm] d5c434d - [X86][SSE] combineX86ShufflesRecursively - add basic handling for combining shuffles of different widths (PR45974)

Author: Simon Pilgrim Date: 2020-12-13T17:18:07Z New Revision: d5c434d7dda25909cd7886e419baf3db3578953e URL: https://github.com/llvm/llvm-project/commit/d5c434d7dda25909cd7886e419baf3db3578953e DIFF: https://github.com/llvm/llvm-project/commit/d5c434d7dda25909cd7886e419baf3db3578953e.diff LOG:

[llvm-branch-commits] [llvm] 5f5a254 - [X86] LowerBUILD_VECTOR - track zero/nonzero elements with APInt masks. NFCI.

Author: Simon Pilgrim Date: 2020-12-14T16:28:45Z New Revision: 5f5a2547c174cf1eaf7874ff02c198629fe02c22 URL: https://github.com/llvm/llvm-project/commit/5f5a2547c174cf1eaf7874ff02c198629fe02c22 DIFF: https://github.com/llvm/llvm-project/commit/5f5a2547c174cf1eaf7874ff02c198629fe02c22.diff LOG:

[llvm-branch-commits] [llvm] release/19.x: [VectorCombine] Do not try to operate on OperandBundles. (#111635) (PR #111796)

https://github.com/RKSimon approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/111796 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/19.x: [VectorCombine] Do not try to operate on OperandBundles. (#111635) (PR #111796)

RKSimon wrote: @davemgreen The CI build failure is confusing - do OperandBundles occur in 19.x? https://github.com/llvm/llvm-project/pull/111796 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/ma

[llvm-branch-commits] [llvm] [X86][APX] Fix wrong encoding of promoted KMOV instructions due to missing NoCD8 (#109579) (PR #109635)

https://github.com/RKSimon approved this pull request. https://github.com/llvm/llvm-project/pull/109635 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/20.x: [X86] Do not combine LRINT and TRUNC (#125848) (PR #125995)

https://github.com/RKSimon approved this pull request. https://github.com/llvm/llvm-project/pull/125995 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [X86] Add atomic vector tests for >1 sizes. (PR #120387)

https://github.com/RKSimon approved this pull request. LGTM - cheers https://github.com/llvm/llvm-project/pull/120387 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-co

[llvm-branch-commits] [llvm] [X86] Add atomic vector tests for >1 sizes. (PR #120387)

@@ -110,3 +110,226 @@ define <1 x bfloat> @atomic_vec1_bfloat(ptr %x) { ret <1 x bfloat> %ret } +define <1 x i64> @atomic_vec1_i64(ptr %x) { RKSimon wrote: add nounwind to get rid of cfi noise https://github.com/llvm/llvm-project/pull/120387 __

[llvm-branch-commits] [llvm] [X86] Manage atomic load of fp -> int promotion in DAG (PR #120386)

@@ -2595,6 +2595,10 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM, setOperationAction(Op, MVT::f32, Promote); } + setOperationPromotedToType(ISD::ATOMIC_LOAD, MVT::f16, MVT::i16); RKSimon wrote: Handle bf16 as well? https://g

[llvm-branch-commits] [llvm] DAG: Avoid breaking legal vector_shuffle with multiple uses (PR #123712)

@@ -23172,6 +23172,11 @@ SDValue DAGCombiner::visitEXTRACT_VECTOR_ELT(SDNode *N) { } if (SVInVec.getOpcode() == ISD::BUILD_VECTOR) { + // TODO: Check if shuffle mask is legal? + if (LegalOperations && TLI.isOperationLegal(ISD::VECTOR_SHUFFLE, VecVT) &&

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Widen <2 x T> vector types for atomic load (PR #120598)

@@ -5907,6 +5910,91 @@ SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) { N->getOperand(1), N->getOperand(2)); } +static std::optional findMemType(SelectionDAG &DAG, + const TargetLowering &TLI, unsig

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Split via Concat vector types for atomic load (PR #120640)

@@ -7071,14 +7071,23 @@ static SDValue LowerAsSplatVectorLoad(SDValue SrcOp, MVT VT, const SDLoc &dl, } // Recurse to find a LoadSDNode source and the accumulated ByteOffest. -static bool findEltLoadSrc(SDValue Elt, LoadSDNode *&Ld, int64_t &ByteOffset) { - if (ISD::isNON_EX

[llvm-branch-commits] [llvm] DAG: Fold bitcast of scalar_to_vector to anyext (PR #122660)

https://github.com/RKSimon approved this pull request. LGTM - cheers https://github.com/llvm/llvm-project/pull/122660 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-co

[llvm-branch-commits] [llvm] DAG: Handle load in SimplifyDemandedVectorElts (PR #122671)

RKSimon wrote: X86TargetLowering::shouldReduceLoadWidth is a mess, resulting in a lot of duplicate aliasaed loads that make very little sense - we're seeing something similar on #122485, but it might take some time to unravel. https://github.com/llvm/llvm-project/pull/122671 __

[llvm-branch-commits] [llvm] DAG: Avoid forming shufflevector from a single extract_vector_elt (PR #122672)

@@ -23855,6 +23863,13 @@ SDValue DAGCombiner::reduceBuildVecToShuffle(SDNode *N) { // VecIn accordingly. bool DidSplitVec = false; if (VecIn.size() == 2) { RKSimon wrote: Doesn't this just check for 2 vector sources, not that there is a single extracti

[llvm-branch-commits] [llvm] DAG: Avoid forming shufflevector from a single extract_vector_elt (PR #122672)

https://github.com/RKSimon edited https://github.com/llvm/llvm-project/pull/122672 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] DAG: Avoid forming shufflevector from a single extract_vector_elt (PR #122672)

https://github.com/RKSimon approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/122672 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] DAG: Avoid forming shufflevector from a single extract_vector_elt (PR #122672)

@@ -23855,6 +23863,13 @@ SDValue DAGCombiner::reduceBuildVecToShuffle(SDNode *N) { // VecIn accordingly. bool DidSplitVec = false; if (VecIn.size() == 2) { RKSimon wrote: Thanks - it's been a while since I touched this code :) https://github.com/llvm/l

[llvm-branch-commits] [llvm] DAG: Fix promote of half freeze (PR #131844)

@@ -2763,7 +2763,10 @@ void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) { #endif report_fatal_error("Do not know how to promote this operator's result!"); -case ISD::BITCAST:R = PromoteFloatRes_BITCAST(N); break; +case ISD::BITCAST: +

[llvm-branch-commits] [llvm] release/20.x: [X86][AVX10.2] Include changes for COMX and VGETEXP from rev. 2 (#132824) (PR #132932)

https://github.com/RKSimon approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/132932 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] [X86] Backport new intrinsic and instruction changes in AVX10.2 (PR #133219)

RKSimon wrote: Although these instructions aren't supported by current hardware this probably needs a release notes entry - wdyt? https://github.com/llvm/llvm-project/pull/133219 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org

[llvm-branch-commits] [clang] [llvm] [X86] Backport new intrinsic and instruction changes in AVX10.2 (PR #133219)

RKSimon wrote: > Doesn't this break ABI by changing intrinsic / builtin numbers? So the headers could still be updated but must use the existing builtins in the backport? https://github.com/llvm/llvm-project/pull/133219 ___ llvm-branch-commits mailin

[llvm-branch-commits] [llvm] release/20.x: [X86][SSE] Don't emit SSE2 load instructions in SSE1-only mode (#134547) (PR #135191)

https://github.com/RKSimon approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/135191 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] release/20.x: [X86][AVX10] Remove VAES and VPCLMULQDQ feature from AVX10.1 (#135489) (PR #135577)

https://github.com/RKSimon approved this pull request. LGTM - cheers https://github.com/llvm/llvm-project/pull/135577 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-co

[llvm-branch-commits] [clang] [X86] Backport saturate-convert intrinsics renaming & YMM rounding intrinsics removal in AVX10.2 (PR #135549)

https://github.com/RKSimon approved this pull request. LGTM as a C/C++ intrinsics rename only cherry pick (the builtins were additionally renamed in trunk). https://github.com/llvm/llvm-project/pull/135549 ___ llvm-branch-commits mailing list llvm-bra

[llvm-branch-commits] [llvm] [X86] Remove extra MOV after widening atomic load (PR #138635)

@@ -1200,6 +1200,13 @@ def : Pat<(i16 (atomic_load_nonext_16 addr:$src)), (MOV16rm addr:$src)>; def : Pat<(i32 (atomic_load_nonext_32 addr:$src)), (MOV32rm addr:$src)>; def : Pat<(i64 (atomic_load_nonext_64 addr:$src)), (MOV64rm addr:$src)>; +def : Pat<(v4i32 (scalar_to_vecto

[llvm-branch-commits] [llvm] [SelectionDAG] Legalize <1 x T> vector types for atomic load (PR #120385)

https://github.com/RKSimon approved this pull request. LGTM with the clang-format warning fix https://github.com/llvm/llvm-project/pull/120385 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailma

[llvm-branch-commits] [llvm] release/20.x: [X86][AVX10.2] Fix unexpected larger scope (#130767) (PR #130774)

https://github.com/RKSimon approved this pull request. https://github.com/llvm/llvm-project/pull/130774 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/20.x: [DAGCombiner] Don't ignore N2's undef elements in `foldVSelectOfConstants` (#129272) (PR #129383)

https://github.com/RKSimon approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/129383 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/20.x: [DAGCombiner] visitFREEZE: Early exit when N is deleted (#128161) (PR #128283)

https://github.com/RKSimon approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/128283 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [DAG][AArch64] Handle truncated buildvectors to allow and(subvector(anyext)) fold. (PR #133915)

https://github.com/RKSimon approved this pull request. LGTM - cheers https://github.com/llvm/llvm-project/pull/133915 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-co

[llvm-branch-commits] [llvm] [DAG][AArch64] Handle truncated buildvectors to allow and(subvector(anyext)) fold. (PR #133915)

@@ -7166,7 +7166,8 @@ SDValue DAGCombiner::visitAND(SDNode *N) { // if (and x, c) is known to be zero, return 0 unsigned BitWidth = VT.getScalarSizeInBits(); - ConstantSDNode *N1C = isConstOrConstSplat(N1); + ConstantSDNode *N1C = + isConstOrConstSplat(N1, /*AllowUn

[llvm-branch-commits] [llvm] [X86] Remove extra MOV after widening atomic load (PR #138635)

@@ -1200,6 +1200,13 @@ def : Pat<(i16 (atomic_load_nonext_16 addr:$src)), (MOV16rm addr:$src)>; def : Pat<(i32 (atomic_load_nonext_32 addr:$src)), (MOV32rm addr:$src)>; def : Pat<(i64 (atomic_load_nonext_64 addr:$src)), (MOV64rm addr:$src)>; +def : Pat<(v4i32 (scalar_to_vecto

[llvm-branch-commits] [llvm] release/20.x: [X86][TargetLowering] Avoid deleting temporary nodes in `getNegatedExpression` (#139029) (PR #139356)

https://github.com/RKSimon approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/139356 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [X86] Remove extra MOV after widening atomic load (PR #138635)

@@ -1200,6 +1200,13 @@ def : Pat<(i16 (atomic_load_nonext_16 addr:$src)), (MOV16rm addr:$src)>; def : Pat<(i32 (atomic_load_nonext_32 addr:$src)), (MOV32rm addr:$src)>; def : Pat<(i64 (atomic_load_nonext_64 addr:$src)), (MOV64rm addr:$src)>; +def : Pat<(v4i32 (scalar_to_vecto

[llvm-branch-commits] [llvm] release/20.x: [SDAG] Ensure load is included in output chain of sincos expansion (#140525) (PR #140703)

https://github.com/RKSimon approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/140703 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

@@ -1211,6 +1211,11 @@ def : Pat<(v4i32 (scalar_to_vector (i32 (atomic_load_32 addr:$src, def : Pat<(v2i64 (scalar_to_vector (i64 (atomic_load_64 addr:$src, (MOV64toPQIrm addr:$src)>; // load atomic <2 x i32,float> +def : Pat<(v2i64 (atomic_load_128_v2i64

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

@@ -1211,6 +1211,11 @@ def : Pat<(v4i32 (scalar_to_vector (i32 (atomic_load_32 addr:$src, def : Pat<(v2i64 (scalar_to_vector (i64 (atomic_load_64 addr:$src, (MOV64toPQIrm addr:$src)>; // load atomic <2 x i32,float> +def : Pat<(v2i64 (atomic_load_128_v2i64

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

https://github.com/RKSimon edited https://github.com/llvm/llvm-project/pull/120716 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

https://github.com/RKSimon edited https://github.com/llvm/llvm-project/pull/120716 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [SelectionDAG] Deal with POISON for INSERT_VECTOR_ELT/INSERT_SUBVECTOR (part 2) (PR #143103)

@@ -1881,6 +1881,11 @@ LLVM_ABI SDValue peekThroughExtractSubvectors(SDValue V); /// If \p V is not a truncation, it is returned as-is. LLVM_ABI SDValue peekThroughTruncates(SDValue V); +/// Recursively peek through INSERT_VECTOR_ELT nodes, returning the source +/// vector ope

[llvm-branch-commits] [llvm] [SelectionDAG] Deal with POISON for INSERT_VECTOR_ELT/INSERT_SUBVECTOR (part 2) (PR #143103)

@@ -1881,6 +1881,11 @@ LLVM_ABI SDValue peekThroughExtractSubvectors(SDValue V); /// If \p V is not a truncation, it is returned as-is. LLVM_ABI SDValue peekThroughTruncates(SDValue V); +/// Recursively peek through INSERT_VECTOR_ELT nodes, returning the source +/// vector ope

[llvm-branch-commits] [llvm] MSP430: Move libcall CC setting to RuntimeLibcallsInfo (PR #146081)

https://github.com/RKSimon approved this pull request. https://github.com/llvm/llvm-project/pull/146081 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [DAG] Fold (setcc ((x | x >> c0 | ...) & mask)) sequences (PR #146054)

https://github.com/RKSimon commented: Why DAG and not InstCombine for this? https://github.com/llvm/llvm-project/pull/146054 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-br

[llvm-branch-commits] [llvm] [SelectionDAG] Fix bug related to demanded bits/elts for BITCAST (PR #145902)

@@ -720,18 +720,17 @@ SDValue TargetLowering::SimplifyMultipleUseDemandedBits( unsigned Scale = NumDstEltBits / NumSrcEltBits; unsigned NumSrcElts = SrcVT.getVectorNumElements(); APInt DemandedSrcBits = APInt::getZero(NumSrcEltBits); - APInt DemandedSrcEl

[llvm-branch-commits] [llvm] Lanai: Use TableGen to set libcall calling conventions (PR #146080)

https://github.com/RKSimon approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/146080 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] RuntimeLibcalls: Associate calling convention with libcall impls (PR #144979)

https://github.com/RKSimon approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/144979 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/20.x: [X86] Ignore NSW when DstSVT is i32 (#131755) (PR #147034)

https://github.com/RKSimon approved this pull request. https://github.com/llvm/llvm-project/pull/147034 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] RuntimeLibcalls: Stop using defset for default calls (PR #147651)

https://github.com/RKSimon approved this pull request. https://github.com/llvm/llvm-project/pull/147651 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] RuntimeLibcalls: Avoid adding ppcf128 calls to non-ppc targets (PR #147656)

https://github.com/RKSimon approved this pull request. https://github.com/llvm/llvm-project/pull/147656 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] RuntimeLibcalls: Avoid adding f80 calls to default set (PR #147658)

https://github.com/RKSimon approved this pull request. https://github.com/llvm/llvm-project/pull/147658 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] DAG: Fall back to separate sin and cos when softening sincos (PR #147468)

https://github.com/RKSimon approved this pull request. https://github.com/llvm/llvm-project/pull/147468 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] SPARC: Start moving runtime libcall config to tablegen (PR #147672)

https://github.com/RKSimon approved this pull request. https://github.com/llvm/llvm-project/pull/147672 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [X86] Remove extra MOV after widening atomic load (PR #148898)

https://github.com/RKSimon edited https://github.com/llvm/llvm-project/pull/148898 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [X86] Remove extra MOV after widening atomic load (PR #148898)

https://github.com/RKSimon requested changes to this pull request. https://github.com/llvm/llvm-project/pull/148898 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-comm

[llvm-branch-commits] [llvm] [X86] Remove extra MOV after widening atomic load (PR #148898)

@@ -1204,6 +1204,13 @@ def : Pat<(i16 (atomic_load_nonext_16 addr:$src)), (MOV16rm addr:$src)>; def : Pat<(i32 (atomic_load_nonext_32 addr:$src)), (MOV32rm addr:$src)>; def : Pat<(i64 (atomic_load_nonext_64 addr:$src)), (MOV64rm addr:$src)>; +def : Pat<(v4i32 (scalar_to_vecto

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