[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIMemoryLegalizer to NPM (PR #130060)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/130060 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SILateBranchLowering to NPM (PR #130063)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/130063 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM (PR #130064)

@@ -1,6 +1,11 @@ ; RUN: llc -mtriple=amdgcn -amdgpu-set-wave-priority=true -o - %s | \ ; RUN: FileCheck %s +; RUN: llc -mtriple=amdgcn -stop-after=si-late-branch-lowering -o - %s | \ +; RUN: llc -x mir -mtriple=amdgcn -passes=amdgpu-set-wave-priority -o - | \ +; RUN: llc

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIInsertWaitcnts to NPM (PR #130061)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130061 >From 5f9af25793c1415d00ba0e7b75be937bac22e94d Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 04:41:08 + Subject: [PATCH] [AMDGPU][NPM] Port SIInsertWaitcnts to NPM --- llvm/lib/Target/A

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIPreEmitPeephole to NPM (PR #130065)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130065 >From 586bcbc3f1ed6b935770957a4e9c3dacda9904a9 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:20:13 + Subject: [PATCH] [AMDGPU][NPM] Port SIPreEmitPeephole to NPM --- llvm/lib/Target/

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port BranchRelaxation to NPM (PR #130067)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130067 >From 02a9dbc736992683f7e1351467de1a9b07ea3a4f Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:56:04 + Subject: [PATCH] [CodeGen][NPM] Port BranchRelaxation to NPM This completes the Pr

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port MachineSanitizerBinaryMetadata to NPM (PR #130069)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130069 >From 2a60a24c5fb2c498e70af935fab03a24757fd24d Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 10:20:36 + Subject: [PATCH] [CodeGen][NPM] Port MachineSanitizerBinaryMetadata to NPM --- ..

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM (PR #130064)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130064 >From 031fd29253eef5ff414bbec5846d813a475d01a4 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:07:23 + Subject: [PATCH] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM --- llvm/lib/Tar

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PostRAHazardRecognizer to NPM (PR #130066)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/130066 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NFC] Format GCNCreateVOPD.cpp (PR #130548)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/130059?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIInsertHardClauses to NPM (PR #130062)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/130062 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port BranchRelaxation to NPM (PR #130067)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/130067 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port RemoveLoadsIntoFakeUses to NPM (PR #130068)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/130068 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port MachineSanitizerBinaryMetadata to NPM (PR #130069)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/130069 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SILateBranchLowering to NPM (PR #130063)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130063 >From 03b1e8ef6a293d822e35572e56861b616c289329 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 05:26:49 + Subject: [PATCH] [AMDGPU][NPM] Port SILateBranchLowering to NPM --- llvm/lib/Targ

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port StackFrameLayoutAnalysisPass to NPM (PR #130070)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/130070 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] WIP: [CodeGen][NPM] Port VirtRegRewriter to NPM (PR #130564)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130564 >From 0f09f5616d4b681df5349333991748070e07182c Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 10 Mar 2025 06:14:27 + Subject: [PATCH] [CodeGen][NPM] Port VirtRegRewriter to NPM Not sure why this is

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIMemoryLegalizer to NPM (PR #130060)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130060 >From b1402edb380ddf044af4810a9b7a88c4f874c0ed Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 11:06:40 + Subject: [PATCH 1/2] [AMDGPU][NPM] Port SIMemoryLegalizer to NPM --- llvm/lib/Tar

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port VirtRegRewriter to NPM (PR #130564)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/130564 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIMemoryLegalizer to NPM (PR #130060)

optimisan wrote: Perhaps best to avoid large stacks like this to reduce upstack rebasing on mid-stack updates. https://github.com/llvm/llvm-project/pull/130060 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIInsertWaitcnts to NPM (PR #130061)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130061 >From 0818ab4b709c83d80a149d7ce41d0cf796de7497 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 04:41:08 + Subject: [PATCH 1/2] [AMDGPU][NPM] Port SIInsertWaitcnts to NPM --- llvm/lib/Targ

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port FEntryInserter to NPM (PR #129857)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/129857 >From b15d39cf6236a02212e5b802153d1614d2c8884e Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 09:19:08 + Subject: [PATCH 1/2] [CodeGen][NPM] Port FEntryInserter to NPM --- llvm/include/l

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port FEntryInserter to NPM (PR #129857)

optimisan wrote: There were no existing tests, added one. https://github.com/llvm/llvm-project/pull/129857 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port FEntryInserter to NPM (PR #129857)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/129857 >From b15d39cf6236a02212e5b802153d1614d2c8884e Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 09:19:08 + Subject: [PATCH 1/2] [CodeGen][NPM] Port FEntryInserter to NPM --- llvm/include/l

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port FEntryInserter to NPM (PR #129857)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/129857 >From b15d39cf6236a02212e5b802153d1614d2c8884e Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 09:19:08 + Subject: [PATCH 1/2] [CodeGen][NPM] Port FEntryInserter to NPM --- llvm/include/l

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIPreEmitPeephole to NPM (PR #130065)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130065 >From 8e8a5ace64ed51ba5466af56a642efdb8f9c8a38 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:20:13 + Subject: [PATCH 1/2] [AMDGPU][NPM] Port SIPreEmitPeephole to NPM --- llvm/lib/Tar

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIPreEmitPeephole to NPM (PR #130065)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130065 >From 8e8a5ace64ed51ba5466af56a642efdb8f9c8a38 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:20:13 + Subject: [PATCH 1/2] [AMDGPU][NPM] Port SIPreEmitPeephole to NPM --- llvm/lib/Tar

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port RemoveLoadsIntoFakeUses to NPM (PR #130068)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130068 >From 88b0e7fda861484572721c3fda7c020afa1b456b Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 09:30:37 + Subject: [PATCH 1/2] [CodeGen][NPM] Port RemoveLoadsIntoFakeUses to NPM --- .../l

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PostRAHazardRecognizer to NPM (PR #130066)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130066 >From cd2a7ff03443f983ac247c41d697d2c85fb8b821 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:42:54 + Subject: [PATCH 1/2] [CodeGen][NPM] Port PostRAHazardRecognizer to NPM --- .../ll

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIInsertHardClauses to NPM (PR #130062)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130062 >From 4edbd96b9a5599e8e315ce90393e91d29539f81c Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 04:52:38 + Subject: [PATCH 1/2] [AMDGPU][NPM] Port SIInsertHardClauses to NPM --- llvm/lib/T

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SILateBranchLowering to NPM (PR #130063)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130063 >From c7ec8bbf224754fcddbf8dc26aba07d655e69869 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 05:26:49 + Subject: [PATCH 1/2] [AMDGPU][NPM] Port SILateBranchLowering to NPM --- llvm/lib/

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM (PR #130064)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130064 >From 0793691bb216221b7010ae8ce4ef26ba3d678be7 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:07:23 + Subject: [PATCH 1/2] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM --- llvm/lib

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port XRayInstrumentation to NPM (PR #129865)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/129865 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port VirtRegRewriter to NPM (PR #130564)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130564 >From b1194b992d8aa79a000766e441af31f17aa05c07 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 10 Mar 2025 06:14:27 + Subject: [PATCH 1/3] [CodeGen][NPM] Port VirtRegRewriter to NPM Not sure why this

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port GCNCreateVOPD to NPM (PR #130059)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/130059 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NFC] Format GCNCreateVOPD.cpp (PR #130548)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130548 >From 0ab8c65820460ee4654337d5374a6e5e944159b6 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 10 Mar 2025 04:31:20 + Subject: [PATCH] [AMDGPU][NFC] Format GCNCreateVOPD.cpp --- llvm/lib/Target/AMDG

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port GCNCreateVOPD to NPM (PR #130059)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130059 >From 6f2706299060e3d17750a6fdcee0e46d961933d3 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 10:52:00 + Subject: [PATCH 1/2] [AMDGPU][NPM] Port GCNCreateVOPD to NPM --- llvm/lib/Target/

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PatchableFunction to NPM (PR #129866)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/129866 >From d2af6dc817ed482666b6c1816bcf7afc9f29eafe Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 10:34:25 + Subject: [PATCH 1/2] [CodeGen][NPM] Port PatchableFunction to NPM --- llvm/includ

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port XRayInstrumentation to NPM (PR #129865)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/129865 >From 103b199cbf6ce84a49067b1a6065efee7254fbcc Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 10:11:27 + Subject: [PATCH] [CodeGen][NPM] Port XRayInstrumentation to NPM --- .../llvm/Code

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port XRayInstrumentation to NPM (PR #129865)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/129865 >From c00160bd9726b68d0b1a9d026f9cd24898784126 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 10:11:27 + Subject: [PATCH] [CodeGen][NPM] Port XRayInstrumentation to NPM --- .../llvm/Code

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SILateBranchLowering to NPM (PR #130063)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130063 >From 70a3b5827ef2a8579ea6218cf9f797ffd3d79404 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 05:26:49 + Subject: [PATCH] [AMDGPU][NPM] Port SILateBranchLowering to NPM --- llvm/lib/Targ

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port GCNCreateVOPD to NPM (PR #130059)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130059 >From 6f2706299060e3d17750a6fdcee0e46d961933d3 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 10:52:00 + Subject: [PATCH 1/3] [AMDGPU][NPM] Port GCNCreateVOPD to NPM --- llvm/lib/Target/

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIMemoryLegalizer to NPM (PR #130060)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130060 >From 8a70796b25b7d308f5fbdd38999a6f841637d76d Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 11:06:40 + Subject: [PATCH 1/2] [AMDGPU][NPM] Port SIMemoryLegalizer to NPM --- llvm/lib/Tar

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port StackFrameLayoutAnalysisPass to NPM (PR #130070)

optimisan wrote: > No tests? Couldn't find a standalone test, `CodeGen/X86/stack-frame-layout-remarks.ll` will need the complete pipeline till this pass. https://github.com/llvm/llvm-project/pull/130070 ___ llvm-branch-commits mailing list llvm-branc

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port MachineSanitizerBinaryMetadata to NPM (PR #130069)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130069 >From b5c636f7bc6d46ee6e7798a5c91d2eecb54b8122 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 10:20:36 + Subject: [PATCH 1/2] [CodeGen][NPM] Port MachineSanitizerBinaryMetadata to NPM ---

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port BranchRelaxation to NPM (PR #130067)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130067 >From 7861e458d4e695275be8738ee75e65a7981dc752 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:56:04 + Subject: [PATCH 1/2] [CodeGen][NPM] Port BranchRelaxation to NPM This completes th

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port VirtRegRewriter to NPM (PR #130564)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130564 >From b1194b992d8aa79a000766e441af31f17aa05c07 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 10 Mar 2025 06:14:27 + Subject: [PATCH 1/3] [CodeGen][NPM] Port VirtRegRewriter to NPM Not sure why this

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port MachineSanitizerBinaryMetadata to NPM (PR #130069)

https://github.com/optimisan edited https://github.com/llvm/llvm-project/pull/130069 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM (PR #130064)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/130064 None >From f7988c3f991966d71339aebe4223d64e30038eb9 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:07:23 + Subject: [PATCH] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM --- llvm/l

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIInsertWaitcnts to NPM (PR #130061)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/130061 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port StackFrameLayoutAnalysisPass to NPM (PR #130070)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130070 >From 9aaee4f8ac21bc46d25d33e666deb491a36c Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 10:45:25 + Subject: [PATCH] [CodeGen][NPM] Port StackFrameLayoutAnalysisPass to NPM --- .../

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIPreEmitPeephole to NPM (PR #130065)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130065 >From 78bcc3a3576cc1f0dba5c9feb5ed781a62877ffe Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 10 Mar 2025 04:31:20 + Subject: [PATCH 1/9] [AMDGPU][NFC] Format GCNCreateVOPD.cpp --- llvm/lib/Target/

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PatchableFunction to NPM (PR #129866)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/129866 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port FEntryInserter to NPM (PR #129857)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/129857 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NFC] Format GCNCreateVOPD.cpp (PR #130548)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/130548 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] WIP: [CodeGen][NPM] Port VirtRegRewriter to NPM (PR #130564)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/130564 Not sure why this is squished into VirtRegMap.h >From 061150df047480e1bcf44460b0ff745e5d6a4b65 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 10 Mar 2025 06:14:27 + Subject: [PATCH] WIP: [CodeGen][N

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port BranchRelaxation to NPM (PR #130067)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/130067 This completes the PreEmitPasses >From 740a24098f6d370fa246cf71cb4b3ba80026c932 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:56:04 + Subject: [PATCH] [CodeGen][NPM] Port BranchRelaxa

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIInsertHardClauses to NPM (PR #130062)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130062 >From 48ec9e7d569fa5f181188aafe31fdf23fe494c76 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 04:52:38 + Subject: [PATCH] [AMDGPU][NPM] Port SIInsertHardClauses to NPM --- llvm/lib/Targe

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIMemoryLegalizer to NPM (PR #130060)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130060 >From be751bbb3300a1d1c41e8fc2a66baacf83884c28 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 11:06:40 + Subject: [PATCH] [AMDGPU][NPM] Port SIMemoryLegalizer to NPM --- llvm/lib/Target/

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIInsertWaitcnts to NPM (PR #130061)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/130061?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIPreEmitPeephole to NPM (PR #130065)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/130065 None >From a19d62578e8f3c13b5cb8c5531e10b25f8f232dd Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:20:13 + Subject: [PATCH] [AMDGPU][NPM] Port SIPreEmitPeephole to NPM --- llvm/lib/T

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port VirtRegRewriter to NPM (PR #130564)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130564 >From 0f09f5616d4b681df5349333991748070e07182c Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 10 Mar 2025 06:14:27 + Subject: [PATCH 1/2] [CodeGen][NPM] Port VirtRegRewriter to NPM Not sure why this

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM (PR #130064)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130064 >From 192871bf259c7187ef1b9d2d9daec53470e73264 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:07:23 + Subject: [PATCH] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM --- llvm/lib/Tar

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIMemoryLegalizer to NPM (PR #130060)

optimisan wrote: Rearranging this stack to make it independent (Graphite is still failing update the PRs itself), GitHub might ping for every force push, sorry! https://github.com/llvm/llvm-project/pull/130060 ___ llvm-branch-commits mailing list llvm

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIMemoryLegalizer to NPM (PR #130060)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130060 >From 8702b1468436cf160b7d6d9cc1b91b425a18aa23 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 11:06:40 + Subject: [PATCH 1/2] [AMDGPU][NPM] Port SIMemoryLegalizer to NPM --- llvm/lib/Tar

[llvm-branch-commits] [llvm] [AMDGPU][NFC] Format GCNCreateVOPD.cpp (PR #130548)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130548 >From 5185a14a2e25ae2320b49bf564f395a0689f139e Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 10 Mar 2025 04:31:20 + Subject: [PATCH] [AMDGPU][NFC] Format GCNCreateVOPD.cpp --- llvm/lib/Target/AMDG

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM (PR #130064)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/130064?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port GCNCreateVOPD to NPM (PR #130059)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130059 >From ee0ed7e6fdce69d98a05e42327a305228797a9de Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 10:52:00 + Subject: [PATCH 1/4] [AMDGPU][NPM] Port GCNCreateVOPD to NPM --- llvm/lib/Target/

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port FEntryInserter to NPM (PR #129857)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/129857?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port XRayInstrumentation to NPM (PR #129865)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/129865?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port FEntryInserter to NPM (PR #129857)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/129857 None >From 2a78a73afa6bd50b0c9a71da41993917eba14587 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 09:19:08 + Subject: [PATCH] [CodeGen][NPM] Port FEntryInserter to NPM --- llvm/include

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port FEntryInserter to NPM (PR #129857)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/129857 >From 0ba6ca6ef0172f61f23cfee8d20a59e1138d5dfc Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 09:19:08 + Subject: [PATCH] [CodeGen][NPM] Port FEntryInserter to NPM --- llvm/include/llvm/

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PatchableFunction to NPM (PR #129866)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/129866 None >From c9386f19d4a87f9fd88bb96aa0c23eba638e96da Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 10:34:25 + Subject: [PATCH] [CodeGen][NPM] Port PatchableFunction to NPM --- llvm/incl

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PatchableFunction to NPM (PR #129866)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/129866?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port XRayInstrumentation to NPM (PR #129865)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/129865 None >From 32a8bd59f64750fb3c2e72a7e26ba7a81ff86210 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 10:11:27 + Subject: [PATCH] [CodeGen][NPM] Port XRayInstrumentation to NPM --- .../llv

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port MachineBlockPlacementStats to NPM (PR #129853)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/129853 None >From a01bc11d08290eab70e8e48858791cfbeb4123e6 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 08:59:23 + Subject: [PATCH] [CodeGen][NPM] Port MachineBlockPlacementStats to NPM ---

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port MachineBlockPlacementStats to NPM (PR #129853)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/129853 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port MachineBlockPlacementStats to NPM (PR #129853)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/129853?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port MachineBlockPlacementStats to NPM (PR #129853)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/129853 >From 2caf68544ebb1c635461e082b0565664c9010b02 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 08:59:23 + Subject: [PATCH 1/2] [CodeGen][NPM] Port MachineBlockPlacementStats to NPM --- ..

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port XRayInstrumentation to NPM (PR #129865)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/129865 >From d6256a4bc9e4feab9eb7f10dcad7568ec807fdaf Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 10:11:27 + Subject: [PATCH 1/2] [CodeGen][NPM] Port XRayInstrumentation to NPM --- .../llvm/

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PatchableFunction to NPM (PR #129866)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/129866 >From 4d0d35c7a4a310f798c2c8da01761cf4791d9ce4 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 10:34:25 + Subject: [PATCH 1/2] [CodeGen][NPM] Port PatchableFunction to NPM --- llvm/includ

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Cleanup AMDGPUPassRegistry.def (PR #130071)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/130071 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIInsertHardClauses to NPM (PR #130062)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130062 >From 79a590f31ec8f979790ff770790a4f938fe67498 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 04:52:38 + Subject: [PATCH] [AMDGPU][NPM] Port SIInsertHardClauses to NPM --- llvm/lib/Targe

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port VirtRegRewriter to NPM (PR #130564)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130564 >From 0f09f5616d4b681df5349333991748070e07182c Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 10 Mar 2025 06:14:27 + Subject: [PATCH 1/2] [CodeGen][NPM] Port VirtRegRewriter to NPM Not sure why this

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM (PR #130064)

https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/130064 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] WIP: [CodeGen][NPM] Port VirtRegRewriter to NPM (PR #130564)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/130564?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [RegAlloc][NewPM] Plug Greedy RA in codegen pipeline (PR #120557)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/120557 >From 6b013984ddb49a7c60a6eb60db33aa73f9e55c4d Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Tue, 11 Feb 2025 12:36:40 + Subject: [PATCH 1/3] [CodeGen][NewPM] Plug greedy RA in codegen pipeline --- llv

[llvm-branch-commits] [llvm] [AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM (PR #125351)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/125351 >From e5a0295c0f93617db9188b499a24125878f2b279 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Sat, 1 Feb 2025 18:21:24 + Subject: [PATCH 1/2] [AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM --- l

[llvm-branch-commits] [llvm] [AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM (PR #125351)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/125351 >From e5a0295c0f93617db9188b499a24125878f2b279 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Sat, 1 Feb 2025 18:21:24 + Subject: [PATCH 1/2] [AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM --- l

[llvm-branch-commits] [llvm] [RegAlloc][NewPM] Plug Greedy RA in codegen pipeline (PR #120557)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/120557 >From 64fc22034753b75dceb4d1f51ab2de88649d291a Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Tue, 11 Feb 2025 12:36:40 + Subject: [PATCH 1/4] [CodeGen][NewPM] Plug greedy RA in codegen pipeline --- llv

[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to NPM (PR #118462)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/118462 >From 2801a54954b2c71a68a3d195ebd1ec9e6b8cffca Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Tue, 3 Dec 2024 10:12:36 + Subject: [PATCH 1/9] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to NPM

[llvm-branch-commits] [llvm] [AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM (PR #125351)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/125351 >From 130a58a52a0b164423f4d2a60404403a2d1b5810 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Sat, 1 Feb 2025 18:21:24 + Subject: [PATCH 1/2] [AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM --- l

[llvm-branch-commits] [llvm] [RegAlloc][NewPM] Plug Greedy RA in codegen pipeline (PR #120557)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/120557 >From 64fc22034753b75dceb4d1f51ab2de88649d291a Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Tue, 11 Feb 2025 12:36:40 + Subject: [PATCH 1/5] [CodeGen][NewPM] Plug greedy RA in codegen pipeline --- llv

[llvm-branch-commits] [llvm] [AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM (PR #125351)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/125351 >From 825225d20f484c06c06f3d8bf8ea1a3609f49661 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Sat, 1 Feb 2025 18:21:24 + Subject: [PATCH 1/2] [AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM --- l

[llvm-branch-commits] [llvm] [AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM (PR #125351)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/125351 >From 825225d20f484c06c06f3d8bf8ea1a3609f49661 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Sat, 1 Feb 2025 18:21:24 + Subject: [PATCH 1/2] [AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM --- l

[llvm-branch-commits] [llvm] [RegAlloc][NewPM] Plug Greedy RA in codegen pipeline (PR #120557)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/120557 >From 64fc22034753b75dceb4d1f51ab2de88649d291a Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Tue, 11 Feb 2025 12:36:40 + Subject: [PATCH 1/5] [CodeGen][NewPM] Plug greedy RA in codegen pipeline --- llv

[llvm-branch-commits] [llvm] [AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM (PR #125351)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/125351 >From 130a58a52a0b164423f4d2a60404403a2d1b5810 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Sat, 1 Feb 2025 18:21:24 + Subject: [PATCH 1/2] [AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM --- l

[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocGreedy to NPM (PR #119540)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/119540 >From 38a3dab96c301bd21eaa7586e49484f35a237f71 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 11 Dec 2024 08:51:55 + Subject: [PATCH 1/8] [CodeGen][NewPM] Port RegAllocGreedy to NPM --- llvm/includ

[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to NPM (PR #118462)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/118462 >From 2801a54954b2c71a68a3d195ebd1ec9e6b8cffca Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Tue, 3 Dec 2024 10:12:36 + Subject: [PATCH 1/9] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to NPM

[llvm-branch-commits] [llvm] [AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM (PR #125351)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/125351 >From c2b60a80a827f84ff7fcc18fbe8e98eca7f6e772 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Sat, 1 Feb 2025 18:21:24 + Subject: [PATCH 1/2] [AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM --- l

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