[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Add tests for ISD::PTRADD DAG combines (PR #142738)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/142738 >From 5c8ab8ccceedf0d864e9ba8b839b779d0f408f7b Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 3 Jun 2025 09:49:19 -0400 Subject: [PATCH 1/2] [AMDGPU][SDAG] Add tests for ISD::PTRADD DAG combines Pre

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Tests for target-specific ISD::PTRADD combines (PR #143672)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/143672 >From 37747657c81cc49feb345810b792f01e35d28511 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Wed, 11 Jun 2025 05:14:34 -0400 Subject: [PATCH] [AMDGPU][SDAG] Tests for target-specific ISD::PTRADD combines

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns (PR #143881)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/143881 >From b919098ad59718c1b5e642b458705e765c525d48 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 12 Jun 2025 07:44:37 -0400 Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns This patc

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns (PR #143880)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/143880 >From 78abf559c52c400cbd651fc8aa9fc39262a3eb32 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 12 Jun 2025 06:13:26 -0400 Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns Pr

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns (PR #143881)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/143881 >From b919098ad59718c1b5e642b458705e765c525d48 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 12 Jun 2025 07:44:37 -0400 Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns This patc

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Add test for ISD::PTRADD handling in SelectionDAGAddressAnalysis (PR #142777)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/142777 >From c0eab936e1cab87636ae7c676d7232948cc35aef Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Wed, 4 Jun 2025 09:30:34 -0400 Subject: [PATCH] [AMDGPU][SDAG] Add test for ISD::PTRADD handling in Selection

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in SelectionDAGAddressAnalysis (PR #142778)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/142778 >From 988d35661fa027271d55cc95131ece66f53c90f0 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Wed, 4 Jun 2025 09:48:02 -0400 Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in SelectionDAGAddressAnaly

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in SelectionDAGAddressAnalysis (PR #142778)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/142778 >From 988d35661fa027271d55cc95131ece66f53c90f0 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Wed, 4 Jun 2025 09:48:02 -0400 Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in SelectionDAGAddressAnaly

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns (PR #143880)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/143880 >From 78abf559c52c400cbd651fc8aa9fc39262a3eb32 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 12 Jun 2025 06:13:26 -0400 Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns Pr

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in SelectionDAGAddressAnalysis (PR #142778)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/142778 >From 9e215a2d5b7411bd77b6745734b316c7306924af Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Wed, 4 Jun 2025 09:48:02 -0400 Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in SelectionDAGAddressAnaly

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Tests for target-specific ISD::PTRADD combines (PR #143672)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/143672 >From a448f7ed1c303cf5878d975f2bbe6cb1f7b175fc Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Wed, 11 Jun 2025 05:14:34 -0400 Subject: [PATCH] [AMDGPU][SDAG] Tests for target-specific ISD::PTRADD combines

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns (PR #143880)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/143880 >From 69fddba7ea92c1dc4542dafaad1ea72ba4ce592c Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 12 Jun 2025 06:13:26 -0400 Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns Pr

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Add ISD::PTRADD DAG combines (PR #142739)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/142739 >From c7aea91592109a305725bfd6cf0d60f939c5433e Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Wed, 4 Jun 2025 03:32:32 -0400 Subject: [PATCH 1/5] [AMDGPU][SDAG] Add ISD::PTRADD DAG combines This patch fo

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Add tests for ISD::PTRADD DAG combines (PR #142738)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/142738 >From d38f4e6bbd8894cdfd0b84b2f677cc8a6d742c6a Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 3 Jun 2025 09:49:19 -0400 Subject: [PATCH 1/2] [AMDGPU][SDAG] Add tests for ISD::PTRADD DAG combines Pre

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Add ISD::PTRADD DAG combines (PR #142739)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/142739 >From c7aea91592109a305725bfd6cf0d60f939c5433e Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Wed, 4 Jun 2025 03:32:32 -0400 Subject: [PATCH 1/5] [AMDGPU][SDAG] Add ISD::PTRADD DAG combines This patch fo

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in SelectionDAGAddressAnalysis (PR #142778)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/142778 >From 9e215a2d5b7411bd77b6745734b316c7306924af Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Wed, 4 Jun 2025 09:48:02 -0400 Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in SelectionDAGAddressAnaly

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Tests for target-specific ISD::PTRADD combines (PR #143672)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/143672 >From a448f7ed1c303cf5878d975f2bbe6cb1f7b175fc Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Wed, 11 Jun 2025 05:14:34 -0400 Subject: [PATCH] [AMDGPU][SDAG] Tests for target-specific ISD::PTRADD combines

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Add tests for ISD::PTRADD DAG combines (PR #142738)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/142738 >From d38f4e6bbd8894cdfd0b84b2f677cc8a6d742c6a Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 3 Jun 2025 09:49:19 -0400 Subject: [PATCH 1/2] [AMDGPU][SDAG] Add tests for ISD::PTRADD DAG combines Pre

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Add test for ISD::PTRADD handling in SelectionDAGAddressAnalysis (PR #142777)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/142777 >From 5df6cfa5619d18767ed610fb594882804b09d59c Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Wed, 4 Jun 2025 09:30:34 -0400 Subject: [PATCH] [AMDGPU][SDAG] Add test for ISD::PTRADD handling in Selection

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns (PR #143881)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/143881 >From 860123fb50e6b9d4a772c350873507e7faaa1f71 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 12 Jun 2025 07:44:37 -0400 Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns This patc

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns (PR #143881)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/143881 >From 860123fb50e6b9d4a772c350873507e7faaa1f71 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 12 Jun 2025 07:44:37 -0400 Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns This patc

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Add test for ISD::PTRADD handling in SelectionDAGAddressAnalysis (PR #142777)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/142777 >From 5df6cfa5619d18767ed610fb594882804b09d59c Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Wed, 4 Jun 2025 09:30:34 -0400 Subject: [PATCH] [AMDGPU][SDAG] Add test for ISD::PTRADD handling in Selection

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Add target-specific ISD::PTRADD combines (PR #143673)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/143673 >From 7eb2283f214e29022a5d580fb1bfa6d2effc9c4c Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Wed, 11 Jun 2025 05:48:45 -0400 Subject: [PATCH] [AMDGPU][SDAG] Add target-specific ISD::PTRADD combines This

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns (PR #143880)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/143880 >From 69fddba7ea92c1dc4542dafaad1ea72ba4ce592c Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 12 Jun 2025 06:13:26 -0400 Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns Pr

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Add target-specific ISD::PTRADD combines (PR #143673)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/143673 >From 7eb2283f214e29022a5d580fb1bfa6d2effc9c4c Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Wed, 11 Jun 2025 05:48:45 -0400 Subject: [PATCH] [AMDGPU][SDAG] Add target-specific ISD::PTRADD combines This

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Add tests for ISD::PTRADD DAG combines (PR #142738)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/142738 >From 5c8ab8ccceedf0d864e9ba8b839b779d0f408f7b Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 3 Jun 2025 09:49:19 -0400 Subject: [PATCH 1/2] [AMDGPU][SDAG] Add tests for ISD::PTRADD DAG combines Pre

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Add ISD::PTRADD DAG combines (PR #142739)

@@ -2628,6 +2630,87 @@ SDValue DAGCombiner::foldSubToAvg(SDNode *N, const SDLoc &DL) { return SDValue(); } +/// Try to fold a pointer arithmetic node. +/// This needs to be done separately from normal addition, because pointer +/// addition is not commutative. +SDValue DAGC

[llvm-branch-commits] [llvm] [RISCV] Support non-power-of-2 types when expanding memcmp (PR #114971)

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/114971 >From 3fd27bd1405a8b2c068786a200d610b9cacb65ef Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Tue, 5 Nov 2024 20:38:44 +0800 Subject: [PATCH] Set max bytes Created using spr 1.3.6-beta.1 --- llvm/lib/Ta

[llvm-branch-commits] [llvm] [RISCV] Support non-power-of-2 types when expanding memcmp (PR #114971)

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/114971 >From 3fd27bd1405a8b2c068786a200d610b9cacb65ef Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Tue, 5 Nov 2024 20:38:44 +0800 Subject: [PATCH] Set max bytes Created using spr 1.3.6-beta.1 --- llvm/lib/Ta

[llvm-branch-commits] [llvm] [RISCV] Support non-power-of-2 types when expanding memcmp (PR #114971)

wangpc-pp wrote: Oh, I forgot that. Can you please test the performance impact on BPI-F3? @lukel97 https://github.com/llvm/llvm-project/pull/114971 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/

[llvm-branch-commits] [llvm] [RISCV] Support non-power-of-2 types when expanding memcmp (PR #114971)

@@ -2954,20 +2954,13 @@ RISCVTTIImpl::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const { } if (IsZeroCmp && ST->hasVInstructions()) { -unsigned RealMinVLen = ST->getRealMinVLen(); -// Support Fractional LMULs if the lengths are larger than XLen. -// T

[llvm-branch-commits] [llvm] [RISCV] Support non-power-of-2 types when expanding memcmp (PR #114971)

@@ -2954,20 +2954,13 @@ RISCVTTIImpl::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const { } if (IsZeroCmp && ST->hasVInstructions()) { -unsigned RealMinVLen = ST->getRealMinVLen(); -// Support Fractional LMULs if the lengths are larger than XLen. -// T

[llvm-branch-commits] [llvm] [RISCV] Support non-power-of-2 types when expanding memcmp (PR #114971)

@@ -2954,20 +2954,13 @@ RISCVTTIImpl::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const { } if (IsZeroCmp && ST->hasVInstructions()) { -unsigned RealMinVLen = ST->getRealMinVLen(); -// Support Fractional LMULs if the lengths are larger than XLen. -// T

[llvm-branch-commits] [llvm] [RISCV] Support non-power-of-2 types when expanding memcmp (PR #114971)

@@ -2954,20 +2954,13 @@ RISCVTTIImpl::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const { } if (IsZeroCmp && ST->hasVInstructions()) { -unsigned RealMinVLen = ST->getRealMinVLen(); -// Support Fractional LMULs if the lengths are larger than XLen. -// T

[llvm-branch-commits] [llvm] [RISCV] Support non-power-of-2 types when expanding memcmp (PR #114971)

@@ -2954,20 +2954,13 @@ RISCVTTIImpl::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const { } if (IsZeroCmp && ST->hasVInstructions()) { -unsigned RealMinVLen = ST->getRealMinVLen(); -// Support Fractional LMULs if the lengths are larger than XLen. -// T

[llvm-branch-commits] [llvm] [RISCV] Support non-power-of-2 types when expanding memcmp (PR #114971)

@@ -2954,20 +2954,13 @@ RISCVTTIImpl::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const { } if (IsZeroCmp && ST->hasVInstructions()) { -unsigned RealMinVLen = ST->getRealMinVLen(); -// Support Fractional LMULs if the lengths are larger than XLen. -// T

[llvm-branch-commits] [llvm] [RISCV] Support non-power-of-2 types when expanding memcmp (PR #114971)

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/114971 >From 3fd27bd1405a8b2c068786a200d610b9cacb65ef Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Tue, 5 Nov 2024 20:38:44 +0800 Subject: [PATCH 1/2] Set max bytes Created using spr 1.3.6-beta.1 --- llvm/li

[llvm-branch-commits] [llvm] [MSAN] handle AVX vpermi2var (PR #143463)

https://github.com/fmayer updated https://github.com/llvm/llvm-project/pull/143463 >From dd6d9e4fa3dee83c1f42f62eb6342dfeb60184ee Mon Sep 17 00:00:00 2001 From: Florian Mayer Date: Thu, 12 Jun 2025 14:19:00 -0700 Subject: [PATCH 1/2] fmt Created using spr 1.3.4 --- llvm/lib/Transforms/Instrum

[llvm-branch-commits] [llvm] [CodeGen] Limit number of analyzed predecessors (PR #142584)

https://github.com/kyulee-com approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/142584 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

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