[llvm-branch-commits] [llvm] [SPARC][IAS] Add definitions for UA 2005 instructions (PR #138400)

@@ -152,13 +155,15 @@ def : Proc<"ultrasparc3", [FeatureV9, FeatureV8Deprecated, FeatureVIS, FeatureVIS2], [TuneSlowRDPC]>; def : Proc<"niagara", [FeatureV9, FeatureV8Deprecated, FeatureVIS, -

[llvm-branch-commits] [llvm] [SPARC][IAS] Add definitions for UA 2005 instructions (PR #138400)

@@ -0,0 +1,36 @@ +//=== SparcInstrUAOSA.td - UltraSPARC/Oracle SPARC Architecture extensions ===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[llvm-branch-commits] [SPARC][IAS] Add definitions for UA 2007 instructions (PR #138401)

@@ -19,3 +25,16 @@ def ALLCLEAN : InstSP<(outs), (ins), "allclean", []> { let Inst{18-0} = 0; } } // Predicates = [HasUA2005] + +// UltraSPARC Architecture 2007 Instructions +let Predicates = [HasUA2007] in { +def FMADDS : FourOp<"fmadds", 0b110111, 0b0001, FPRegs>; +def FM

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/134033 Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Arial,sans

[llvm-branch-commits] [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #133050)

https://github.com/optimisan edited https://github.com/llvm/llvm-project/pull/133050 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #133050)

optimisan wrote: Stack updated manually: * #133050 * **#134033** https://app.graphite.dev/github/pr/llvm/llvm-project/134033?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#135752** https:/

[llvm-branch-commits] [clang] release/20.x: [Clang] Fix the trailing comma regression (#136273) (PR #136283)

https://github.com/cor3ntin approved this pull request. Sorry, I was not near a computer last week. LGTM https://github.com/llvm/llvm-project/pull/136283 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi

[llvm-branch-commits] [llvm] [SPARC][IAS] Add definitions for UA 2005 instructions (PR #138400)

@@ -0,0 +1,36 @@ +//=== SparcInstrUAOSA.td - UltraSPARC/Oracle SPARC Architecture extensions ===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[llvm-branch-commits] [llvm] [SPARC][IAS] Add definitions for UA 2005 instructions (PR #138400)

@@ -152,13 +155,15 @@ def : Proc<"ultrasparc3", [FeatureV9, FeatureV8Deprecated, FeatureVIS, FeatureVIS2], [TuneSlowRDPC]>; def : Proc<"niagara", [FeatureV9, FeatureV8Deprecated, FeatureVIS, -

[llvm-branch-commits] [SPARC][IAS] Add definitions for UA 2007 instructions (PR #138401)

@@ -19,3 +25,16 @@ def ALLCLEAN : InstSP<(outs), (ins), "allclean", []> { let Inst{18-0} = 0; } } // Predicates = [HasUA2005] + +// UltraSPARC Architecture 2007 Instructions +let Predicates = [HasUA2007] in { +def FMADDS : FourOp<"fmadds", 0b110111, 0b0001, FPRegs>; +def FM

[llvm-branch-commits] [SPARC][IAS] Add definitions for OSA 2011 instructions (PR #138403)

@@ -38,3 +53,92 @@ def FNMADDD : FourOp<"fnmaddd", 0b110111, 0b1110, DFPRegs>; def FNMSUBS : FourOp<"fnmsubs", 0b110111, 0b1001, FPRegs>; def FNMSUBD : FourOp<"fnmsubd", 0b110111, 0b1010, DFPRegs>; } // Predicates = [HasUA2007] + +// Oracle SPARC Architecture 2011 Instructions