[llvm-branch-commits] [llvm] 73d1e85 - [CodeGen] Avoid repeated hash lookups (NFC) (#130237)

2025-04-14 Thread Tom Stellard via llvm-branch-commits
Author: Kazu Hirata Date: 2025-04-14T12:34:31-07:00 New Revision: 73d1e8598eda19be8edd9eaaefc091228c651217 URL: https://github.com/llvm/llvm-project/commit/73d1e8598eda19be8edd9eaaefc091228c651217 DIFF: https://github.com/llvm/llvm-project/commit/73d1e8598eda19be8edd9eaaefc091228c651217.diff L

[llvm-branch-commits] [llvm] d88cd35 - [llvm][CodeGen] Fix the empty interval issue in Window Scheduler (#129204)

2025-04-14 Thread Tom Stellard via llvm-branch-commits
Author: Hua Tian Date: 2025-04-14T12:34:31-07:00 New Revision: d88cd35023b42c436517e98d2a0f223394337332 URL: https://github.com/llvm/llvm-project/commit/d88cd35023b42c436517e98d2a0f223394337332 DIFF: https://github.com/llvm/llvm-project/commit/d88cd35023b42c436517e98d2a0f223394337332.diff LOG:

[llvm-branch-commits] [llvm] 34a1afa - Revert "[CMake] Configure ccache using command line options (#134857)"

2025-04-14 Thread via llvm-branch-commits
Author: Kajetan Puchalski Date: 2025-04-14T20:35:15+01:00 New Revision: 34a1afaf7412311f627af671b4339fc92acb305b URL: https://github.com/llvm/llvm-project/commit/34a1afaf7412311f627af671b4339fc92acb305b DIFF: https://github.com/llvm/llvm-project/commit/34a1afaf7412311f627af671b4339fc92acb305b.d

[llvm-branch-commits] [llvm] release/20.x: [llvm][CodeGen] avoid repeated interval calculation in window scheduler (#132352) (PR #134775)

2025-04-14 Thread via llvm-branch-commits
github-actions[bot] wrote: @androm3da (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR.

[llvm-branch-commits] [llvm] 0dd4235 - [SCEV] Use ashr to adjust constant multipliers (#135534)

2025-04-14 Thread Tom Stellard via llvm-branch-commits
Author: Yingwei Zheng Date: 2025-04-14T12:38:12-07:00 New Revision: 0dd4235473d4f5a99c46ea631351616d62e9b32e URL: https://github.com/llvm/llvm-project/commit/0dd4235473d4f5a99c46ea631351616d62e9b32e DIFF: https://github.com/llvm/llvm-project/commit/0dd4235473d4f5a99c46ea631351616d62e9b32e.diff

[llvm-branch-commits] [llvm] [HLSL] Adding support for Root Constants in LLVM Metadata (PR #135085)

2025-04-14 Thread via llvm-branch-commits
@@ -94,10 +144,56 @@ static bool parse(LLVMContext *Ctx, mcdxbc::RootSignatureDesc &RSD, static bool verifyRootFlag(uint32_t Flags) { return (Flags & ~0xfff) == 0; } +static bool verifyShaderVisibility(dxbc::ShaderVisibility Flags) { + switch (Flags) { + + case dxbc::Shade

[llvm-branch-commits] [llvm] release/20.x: [SCEV] Use ashr to adjust constant multipliers (#135534) (PR #135543)

2025-04-14 Thread via llvm-branch-commits
github-actions[bot] wrote: @dtcxzyw (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. h

[llvm-branch-commits] [llvm] release/20.x: [SCEV] Use ashr to adjust constant multipliers (#135534) (PR #135543)

2025-04-14 Thread Tom Stellard via llvm-branch-commits
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/135543 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [HLSL] Adding support for Root Constants in LLVM Metadata (PR #135085)

2025-04-14 Thread via llvm-branch-commits
@@ -94,10 +144,56 @@ static bool parse(LLVMContext *Ctx, mcdxbc::RootSignatureDesc &RSD, static bool verifyRootFlag(uint32_t Flags) { return (Flags & ~0xfff) == 0; } +static bool verifyShaderVisibility(dxbc::ShaderVisibility Flags) { + switch (Flags) { + + case dxbc::Shade

[llvm-branch-commits] [clang] release/20.x: [clang] Introduce "binary" StringLiteral for #embed data (#127629) (PR #133460)

2025-04-14 Thread Aaron Ballman via llvm-branch-commits
https://github.com/AaronBallman edited https://github.com/llvm/llvm-project/pull/133460 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [flang] [llvm] [Github][CI] Upload .ninja_log as an artifact (PR #135539)

2025-04-14 Thread Nathan Gauër via llvm-branch-commits
https://github.com/Keenuts approved this pull request. https://github.com/llvm/llvm-project/pull/135539 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] release/20.x: [clang] Introduce "binary" StringLiteral for #embed data (#127629) (PR #133460)

2025-04-14 Thread Aaron Ballman via llvm-branch-commits
https://github.com/AaronBallman approved this pull request. LGTM! https://github.com/llvm/llvm-project/pull/133460 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commi

[llvm-branch-commits] [clang] release/20.x: [clang] Introduce "binary" StringLiteral for #embed data (#127629) (PR #133460)

2025-04-14 Thread Aaron Ballman via llvm-branch-commits
@@ -1752,7 +1752,14 @@ enum class StringLiteralKind { UTF8, UTF16, UTF32, - Unevaluated + Unevaluated, + // Binary kind of string literal is used for the data coming via #embed + // directive. File's binary contents is transformed to a special kind of + // string lit

[llvm-branch-commits] [RISCV][NFC] Use bitmasks generated by TableGen (PR #135600)

2025-04-14 Thread Piyou Chen via llvm-branch-commits
BeMg wrote: Is `users/wangpc-pp/spr/main.riscvnfc-use-bitmasks-generated-by-tablegen` the correct base branch? https://github.com/llvm/llvm-project/pull/135600 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.

[llvm-branch-commits] [RISCV][NFC] Use bitmasks generated by TableGen (PR #135600)

2025-04-14 Thread Pengcheng Wang via llvm-branch-commits
wangpc-pp wrote: > Is `users/wangpc-pp/spr/main.riscvnfc-use-bitmasks-generated-by-tablegen` the > correct base branch? Oh I forgot to say that this PR is stacked on #135599. https://github.com/llvm/llvm-project/pull/135600 ___ llvm-branch-commits m

[llvm-branch-commits] [RISCV][NFC] Use bitmasks generated by TableGen (PR #135600)

2025-04-14 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-risc-v Author: Pengcheng Wang (wangpc-pp) Changes So that we don't need to sync-up the table manually. --- Full diff: https://github.com/llvm/llvm-project/pull/135600.diff 3 Files Affected: - (modified) llvm/include/llvm/TargetParser/RISCVTa

[llvm-branch-commits] [RISCV][NFC] Use bitmasks generated by TableGen (PR #135600)

2025-04-14 Thread Pengcheng Wang via llvm-branch-commits
https://github.com/wangpc-pp created https://github.com/llvm/llvm-project/pull/135600 So that we don't need to sync-up the table manually. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman

[llvm-branch-commits] [llvm] release/20.x: [SCEV] Use ashr to adjust constant multipliers (#135534) (PR #135543)

2025-04-14 Thread Nikita Popov via llvm-branch-commits
https://github.com/nikic approved this pull request. https://github.com/llvm/llvm-project/pull/135543 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AArch64AsmPrinter]Place jump tables into hot/unlikely-prefixed data sections for aarch64 (PR #126018)

2025-04-14 Thread David Green via llvm-branch-commits
https://github.com/davemgreen approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/126018 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/20.x: [LLVM][MemCpyOpt] Unify alias tags if we optimize allocas (#129537) (PR #135615)

2025-04-14 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-llvm-transforms Author: Nikita Popov (nikic) Changes Backport of 716b02d8c575afde7af1af13df145019659abca2, with conflicts in the test resolved. --- Full diff: https://github.com/llvm/llvm-project/pull/135615.diff 3 Files Affected: - (modified) llvm/

[llvm-branch-commits] [llvm] release/20.x: [LLVM][MemCpyOpt] Unify alias tags if we optimize allocas (#129537) (PR #135615)

2025-04-14 Thread Nikita Popov via llvm-branch-commits
https://github.com/nikic created https://github.com/llvm/llvm-project/pull/135615 Backport of 716b02d8c575afde7af1af13df145019659abca2, with conflicts in the test resolved. >From e385f5c5b9bd32f89754e8088c29f42a761f2880 Mon Sep 17 00:00:00 2001 From: Dominik Adamski Date: Thu, 10 Apr 2025 12:

[llvm-branch-commits] [clang] [X86] Backport saturate-convert intrinsics renaming & YMM rounding intrinsics removal in AVX10.2 (PR #135549)

2025-04-14 Thread Simon Pilgrim via llvm-branch-commits
https://github.com/RKSimon approved this pull request. LGTM as a C/C++ intrinsics rename only cherry pick (the builtins were additionally renamed in trunk). https://github.com/llvm/llvm-project/pull/135549 ___ llvm-branch-commits mailing list llvm-bra

[llvm-branch-commits] [RISCV][NFC] Use bitmasks generated by TableGen (PR #135600)

2025-04-14 Thread Pengcheng Wang via llvm-branch-commits
https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/135600 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/20.x: [LLVM][MemCpyOpt] Unify alias tags if we optimize allocas (#129537) (PR #135615)

2025-04-14 Thread Nikita Popov via llvm-branch-commits
https://github.com/nikic milestoned https://github.com/llvm/llvm-project/pull/135615 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [SDAG] Introduce inbounds flag for pointer arithmetic (PR #131862)

2025-04-14 Thread Fabian Ritter via llvm-branch-commits
https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/131862 >From 139ed0582220175e090f4df4bef144313ed00ccc Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Mon, 17 Mar 2025 06:51:16 -0400 Subject: [PATCH] [SDAG] Introduce inbounds flag for pointer arithmetic This p

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Only fold flat offsets if they are inbounds (PR #132353)

2025-04-14 Thread Fabian Ritter via llvm-branch-commits
https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/132353 >From 164ae855aa5f1fddf3d3977e53f5261c43a25121 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 21 Mar 2025 03:33:02 -0400 Subject: [PATCH] [AMDGPU][SDAG] Only fold flat offsets if they are inbounds F

[llvm-branch-commits] [llvm] [SDAG] Introduce inbounds flag for pointer arithmetic (PR #131862)

2025-04-14 Thread Fabian Ritter via llvm-branch-commits
https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/131862 >From 139ed0582220175e090f4df4bef144313ed00ccc Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Mon, 17 Mar 2025 06:51:16 -0400 Subject: [PATCH] [SDAG] Introduce inbounds flag for pointer arithmetic This p

[llvm-branch-commits] [flang] [llvm] [Github][CI] Upload .ninja_log as an artifact (PR #135539)

2025-04-14 Thread Aiden Grossman via llvm-branch-commits
https://github.com/boomanaiden154 updated https://github.com/llvm/llvm-project/pull/135539 >From 109923e35d854d63faa5b9599f5fd128bcfe5c79 Mon Sep 17 00:00:00 2001 From: Aiden Grossman Date: Sun, 13 Apr 2025 11:26:06 + Subject: [PATCH 1/3] testing Created using spr 1.3.4 --- .ci/monolithic

[llvm-branch-commits] [llvm] [AMDGPU][InsertWaitCnts] Track global_wb/inv/wbinv (PR #135340)

2025-04-14 Thread Pierre van Houtryve via llvm-branch-commits
@@ -698,6 +698,16 @@ class SIInsertWaitcnts { // Return the appropriate VMEM_*_ACCESS type for Inst, which must be a VMEM or // FLAT instruction. WaitEventType getVmemWaitEventType(const MachineInstr &Inst) const { +switch (Inst.getOpcode()) { Pierre

[llvm-branch-commits] [llvm] [AMDGPU][InsertWaitCnts] Track global_wb/inv/wbinv (PR #135340)

2025-04-14 Thread Pierre van Houtryve via llvm-branch-commits
@@ -19,7 +19,7 @@ body: | ; GFX12-NEXT: {{ $}} ; GFX12-NEXT: renamable $vgpr0 = GLOBAL_LOAD_DWORD_SADDR renamable $sgpr2_sgpr3, killed $vgpr0, 0, 0, implicit $exec :: (load (s32), addrspace 1) ; GFX12-NEXT: GLOBAL_INV 16, implicit $exec -; GFX12-NEXT: S_WAIT_L

[llvm-branch-commits] [llvm] [AMDGPU][InsertWaitCnts] Track global_wb/inv/wbinv (PR #135340)

2025-04-14 Thread Pierre van Houtryve via llvm-branch-commits
https://github.com/Pierre-vh ready_for_review https://github.com/llvm/llvm-project/pull/135340 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] release/20.x: [X86][AVX10] Remove VAES and VPCLMULQDQ feature from AVX10.1 (#135489) (PR #135577)

2025-04-14 Thread via llvm-branch-commits
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/135577 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [GlobalISel] Combine redundant sext_inreg (PR #131624)

2025-04-14 Thread Pierre van Houtryve via llvm-branch-commits
Pierre-vh wrote: ### Merge activity * **Apr 14, 4:03 AM EDT**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/131624). https://github.com/llvm/llvm-project/pull/131624 __

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Only fold flat offsets if they are inbounds (PR #132353)

2025-04-14 Thread Fabian Ritter via llvm-branch-commits
https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/132353 >From 164ae855aa5f1fddf3d3977e53f5261c43a25121 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 21 Mar 2025 03:33:02 -0400 Subject: [PATCH] [AMDGPU][SDAG] Only fold flat offsets if they are inbounds F

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for extends and trunc (PR #132383)

2025-04-14 Thread Petar Avramovic via llvm-branch-commits
https://github.com/petar-avramovic updated https://github.com/llvm/llvm-project/pull/132383 >From c57e5228d3143ea83920086bb8a994d1b00a74c5 Mon Sep 17 00:00:00 2001 From: Petar Avramovic Date: Mon, 14 Apr 2025 16:34:00 +0200 Subject: [PATCH] AMDGPU/GlobalISel: add RegBankLegalize rules for exten

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for extends and trunc (PR #132383)

2025-04-14 Thread Petar Avramovic via llvm-branch-commits
https://github.com/petar-avramovic updated https://github.com/llvm/llvm-project/pull/132383 >From c57e5228d3143ea83920086bb8a994d1b00a74c5 Mon Sep 17 00:00:00 2001 From: Petar Avramovic Date: Mon, 14 Apr 2025 16:34:00 +0200 Subject: [PATCH] AMDGPU/GlobalISel: add RegBankLegalize rules for exten

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for AND OR and XOR (PR #132382)

2025-04-14 Thread Petar Avramovic via llvm-branch-commits
https://github.com/petar-avramovic updated https://github.com/llvm/llvm-project/pull/132382 >From ba48a1abb1b10c2f77f9acd137150cfa59de7601 Mon Sep 17 00:00:00 2001 From: Petar Avramovic Date: Mon, 14 Apr 2025 16:32:49 +0200 Subject: [PATCH] AMDGPU/GlobalISel: add RegBankLegalize rules for AND O

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for bit shifts and sext-inreg (PR #132385)

2025-04-14 Thread Petar Avramovic via llvm-branch-commits
https://github.com/petar-avramovic updated https://github.com/llvm/llvm-project/pull/132385 >From 2fdf172213d449b78bc6de1ac20d493adda29dbc Mon Sep 17 00:00:00 2001 From: Petar Avramovic Date: Mon, 14 Apr 2025 16:35:19 +0200 Subject: [PATCH] AMDGPU/GlobalISel: add RegBankLegalize rules for bit s

[llvm-branch-commits] [llvm] [llvm][IR] Treat memcmp and bcmp as libcalls (PR #135706)

2025-04-14 Thread Arthur Eubanks via llvm-branch-commits
https://github.com/aeubanks approved this pull request. I'm surprised these missing libcalls have been missing for so long without getting fixed https://github.com/llvm/llvm-project/pull/135706 ___ llvm-branch-commits mailing list llvm-branch-commits@

[llvm-branch-commits] [llvm] [llvm][IR] Treat memcmp and bcmp as libcalls (PR #135706)

2025-04-14 Thread Paul Kirth via llvm-branch-commits
ilovepi wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/135706?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [llvm] [HLSL] Adding support for Root Constants in LLVM Metadata (PR #135085)

2025-04-14 Thread via llvm-branch-commits
https://github.com/joaosaffran updated https://github.com/llvm/llvm-project/pull/135085 >From 9b59d0108f6b23c039e2c417247216862073cd4b Mon Sep 17 00:00:00 2001 From: joaosaffran Date: Wed, 9 Apr 2025 21:05:58 + Subject: [PATCH 1/4] adding support for root constants in metadata generation -

[llvm-branch-commits] [clang] [X86] Backport saturate-convert intrinsics renaming & YMM rounding intrinsics removal in AVX10.2 (PR #135549)

2025-04-14 Thread Tom Stellard via llvm-branch-commits
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/135549 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [LV] An attempt to cherry-pick the fix PR #132691 (cherry-pick from the main branch to the release/20.x branch) (PR #135231)

2025-04-14 Thread Florian Hahn via llvm-branch-commits
fhahn wrote: I'm not sure if it is feasible to strip the fix down, as it depends quite a few refactoring patches. For 20.x, it might be best just not enable epilogue vectorization for FindLastIV: https://github.com/llvm/llvm-project/pull/135666 https://github.com/llvm/llvm-project/pull/135231

[llvm-branch-commits] [clang] [llvm] [release/20.x] Support z17 processor name and scheduler description (PR #135413)

2025-04-14 Thread Tom Stellard via llvm-branch-commits
tstellar wrote: This is a pretty large patch, how safe is this? https://github.com/llvm/llvm-project/pull/135413 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] [release/20.x] Support z17 processor name and scheduler description (PR #135413)

2025-04-14 Thread Ulrich Weigand via llvm-branch-commits
uweigand wrote: > This is a pretty large patch, how safe is this? A lot of this are test and comment-only changes, which should be harmless. Beyond that, the only actual changes are - introduction of the "z17" processor name (three single-line changes) - the new scheduler description (one sin

[llvm-branch-commits] [llvm] release/20.x: [LoongArch] Move fix-tle-le-sym-type test to test/MC. NFC (#133839) (PR #134014)

2025-04-14 Thread Tom Stellard via llvm-branch-commits
tstellar wrote: Ping @SixWeining https://github.com/llvm/llvm-project/pull/134014 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] 64c0c6e - Revert "[MLIR][LLVM] Support for indirectbr (#135092)"

2025-04-14 Thread via llvm-branch-commits
Author: Bruno Cardoso Lopes Date: 2025-04-14T16:08:09-07:00 New Revision: 64c0c6e2e568a720b0b6755872745b86b51b03f7 URL: https://github.com/llvm/llvm-project/commit/64c0c6e2e568a720b0b6755872745b86b51b03f7 DIFF: https://github.com/llvm/llvm-project/commit/64c0c6e2e568a720b0b6755872745b86b51b03f7

[llvm-branch-commits] [llvm] release/20.x: [llvm][CodeGen] avoid repeated interval calculation in window scheduler (#132352) (PR #134775)

2025-04-14 Thread via llvm-branch-commits
https://github.com/llvmbot updated https://github.com/llvm/llvm-project/pull/134775 >From 73d1e8598eda19be8edd9eaaefc091228c651217 Mon Sep 17 00:00:00 2001 From: Kazu Hirata Date: Fri, 7 Mar 2025 00:59:25 -0800 Subject: [PATCH 1/3] [CodeGen] Avoid repeated hash lookups (NFC) (#130237) (cherry

[llvm-branch-commits] [llvm] [LV] Disable epilogue vectorization for FindLastIV if start is poison. (PR #135666)

2025-04-14 Thread Florian Hahn via llvm-branch-commits
https://github.com/fhahn created https://github.com/llvm/llvm-project/pull/135666 Back-porting properly freezing of the start value during epilogue vectorization (https://github.com/llvm/llvm-project/commit/2bdc1a1337692a5743658ba6b680e5d914e684a4) is non-trivial. For the 20.x release, just di

[llvm-branch-commits] [llvm] [HLSL] Adding support for Root Constants in LLVM Metadata (PR #135085)

2025-04-14 Thread via llvm-branch-commits
@@ -24,7 +24,11 @@ namespace llvm { namespace dxil { -enum class RootSignatureElementKind { Error = 0, RootFlags = 1 }; +enum class RootSignatureElementKind { joaosaffran wrote: `RootElements` are not the same as `RootParameters`, the first is a representati

[llvm-branch-commits] [clang] [llvm] release/20.x: [X86][AVX10] Remove VAES and VPCLMULQDQ feature from AVX10.1 (#135489) (PR #135577)

2025-04-14 Thread Tom Stellard via llvm-branch-commits
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/135577 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [LV] Disable epilogue vectorization for FindLastIV if start is poison. (PR #135666)

2025-04-14 Thread Nikita Popov via llvm-branch-commits
https://github.com/nikic milestoned https://github.com/llvm/llvm-project/pull/135666 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [HLSL] Adding support for Root Constants in LLVM Metadata (PR #135085)

2025-04-14 Thread via llvm-branch-commits
https://github.com/joaosaffran updated https://github.com/llvm/llvm-project/pull/135085 >From 9b59d0108f6b23c039e2c417247216862073cd4b Mon Sep 17 00:00:00 2001 From: joaosaffran Date: Wed, 9 Apr 2025 21:05:58 + Subject: [PATCH 1/6] adding support for root constants in metadata generation -

[llvm-branch-commits] [SPARC] Use op-then-neg instructions when we have VIS3 (PR #135717)

2025-04-14 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-sparc Author: Koakuma (koachan) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/135717.diff 2 Files Affected: - (modified) llvm/lib/Target/Sparc/SparcInstrVIS.td (+13) - (added) llvm/test/CodeGen/SPARC/float-vis3.ll (+59)

[llvm-branch-commits] [SPARC] Use op-then-halve instructions when we have VIS3 (PR #135718)

2025-04-14 Thread via llvm-branch-commits
https://github.com/koachan created https://github.com/llvm/llvm-project/pull/135718 None ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [SPARC] Use op-then-neg instructions when we have VIS3 (PR #135717)

2025-04-14 Thread via llvm-branch-commits
https://github.com/koachan created https://github.com/llvm/llvm-project/pull/135717 None ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [SPARC] Use native bitcast instructions when we have VIS3 (PR #135716)

2025-04-14 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-sparc Author: Koakuma (koachan) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/135716.diff 3 Files Affected: - (modified) llvm/lib/Target/Sparc/SparcISelLowering.cpp (+8-4) - (modified) llvm/lib/Target/Sparc/SparcInstrVIS.

[llvm-branch-commits] [SPARC] Use umulxhi to do extending 64x64->128 multiply when we have VIS3 (PR #135714)

2025-04-14 Thread via llvm-branch-commits
https://github.com/koachan created https://github.com/llvm/llvm-project/pull/135714 None ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)

2025-04-14 Thread via llvm-branch-commits
https://github.com/koachan created https://github.com/llvm/llvm-project/pull/135715 None ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [SPARC] Use op-then-neg instructions when we have VIS3 (PR #135717)

2025-04-14 Thread via llvm-branch-commits
@@ -316,4 +316,17 @@ def : Pat<(i64 (sext (i32 (bitconvert f32:$src, (MOVSTOSW $src)>; def : Pat<(f32 (bitconvert i32:$src)), (MOVWTOS $src)>; def : Pat<(i64 (bitconvert f64:$src)), (MOVDTOX $src)>; def : Pat<(f64 (bitconvert i64:$src)), (MOVXTOD $src)>; + +// OP-then-neg

[llvm-branch-commits] [SPARC] Use addxccc to do multiword addition when we have VIS3 (PR #135713)

2025-04-14 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-sparc Author: Koakuma (koachan) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/135713.diff 4 Files Affected: - (modified) llvm/lib/Target/Sparc/SparcISelLowering.cpp (+5) - (modified) llvm/lib/Target/Sparc/SparcInstr64Bit.

[llvm-branch-commits] [SPARC] Use native bitcast instructions when we have VIS3 (PR #135716)

2025-04-14 Thread via llvm-branch-commits
https://github.com/koachan created https://github.com/llvm/llvm-project/pull/135716 None ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [SPARC] Use umulxhi to do extending 64x64->128 multiply when we have VIS3 (PR #135714)

2025-04-14 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-sparc Author: Koakuma (koachan) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/135714.diff 5 Files Affected: - (modified) llvm/lib/Target/Sparc/SparcISelLowering.cpp (+4-2) - (modified) llvm/lib/Target/Sparc/SparcInstrVIS.

[llvm-branch-commits] [SPARC] Use op-then-halve instructions when we have VIS3 (PR #135718)

2025-04-14 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-sparc Author: Koakuma (koachan) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/135718.diff 4 Files Affected: - (modified) llvm/lib/Target/Sparc/SparcISelLowering.cpp (+7-2) - (modified) llvm/lib/Target/Sparc/SparcInstrVIS.

[llvm-branch-commits] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)

2025-04-14 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-sparc Author: Koakuma (koachan) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/135715.diff 3 Files Affected: - (modified) llvm/lib/Target/Sparc/SparcISelLowering.cpp (+3-2) - (modified) llvm/lib/Target/Sparc/SparcInstrVIS.

[llvm-branch-commits] [llvm] release/20.x: [LoongArch] Move fix-tle-le-sym-type test to test/MC. NFC (#133839) (PR #134014)

2025-04-14 Thread Lu Weining via llvm-branch-commits
https://github.com/SixWeining approved this pull request. Sorry I missed it. LGTM. https://github.com/llvm/llvm-project/pull/134014 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/

[llvm-branch-commits] [llvm] [LV] Disable epilogue vectorization for FindLastIV if start is poison. (PR #135666)

2025-04-14 Thread Mel Chen via llvm-branch-commits
https://github.com/Mel-Chen approved this pull request. LGTM, thank you! https://github.com/llvm/llvm-project/pull/135666 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branc

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