[llvm-branch-commits] [lldb] release/20.x: [lldb] Use correct path for lldb-server executable (#131519) (PR #134072)

2025-04-04 Thread via llvm-branch-commits
llvmbot wrote: @labath What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/134072 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listin

[llvm-branch-commits] [llvm] release/20.x: [GlobalMerge][PPC] Don't merge globals in llvm.metadata section (#131801) (PR #134052)

2025-04-04 Thread via llvm-branch-commits
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/134052 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for extends and trunc (PR #132383)

2025-04-04 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Petar Avramovic (petar-avramovic) Changes Uniform S1: Truncs to uniform S1 and AnyExts from S1 are left as is as they are meant to be combined away. Uniform S1 ZExt and SExt are lowered using select. Divergent S1: Trunc of VGPR to

[llvm-branch-commits] [clang] [RISCV] Integrate RISCV target in baremetal toolchain object and deprecate RISCVToolchain object (PR #121831)

2025-04-04 Thread Garvit Gupta via llvm-branch-commits
https://github.com/quic-garvgupt updated https://github.com/llvm/llvm-project/pull/121831 >From 5f0ff967b3df20e43049701db6d2fddf6842c3d7 Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Mon, 6 Jan 2025 10:05:08 -0800 Subject: [PATCH] [RISCV] Integrate RISCV target in baremetal toolchain object

[llvm-branch-commits] [clang] [Driver] Fix link order of BareMetal toolchain object (PR #132806)

2025-04-04 Thread Garvit Gupta via llvm-branch-commits
https://github.com/quic-garvgupt updated https://github.com/llvm/llvm-project/pull/132806 >From f93fc60cd7bddaa16c44c569ef89030ef451f7b6 Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Mon, 24 Mar 2025 06:17:42 -0700 Subject: [PATCH] [Driver] Fix link order of BareMetal toolchain object The

[llvm-branch-commits] [clang] [Driver] Forward sysroot from Driver to linker in BareMetal ToolChain Object (PR #132808)

2025-04-04 Thread Garvit Gupta via llvm-branch-commits
https://github.com/quic-garvgupt updated https://github.com/llvm/llvm-project/pull/132808 >From 51c930864b9b6042b3ce4f480a06ca007f9932b2 Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Mon, 24 Mar 2025 07:04:59 -0700 Subject: [PATCH] [Driver] Forward sysroot from Driver to linker in BareMetal

[llvm-branch-commits] [clang] [Driver] Add support for crtbegin.o, crtend.o and libgloss lib to BareMetal toolchain object (PR #121830)

2025-04-04 Thread Garvit Gupta via llvm-branch-commits
https://github.com/quic-garvgupt updated https://github.com/llvm/llvm-project/pull/121830 >From fff97c90a573aa915662288ef57e13ba901037ba Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Mon, 24 Mar 2025 04:58:57 -0700 Subject: [PATCH] [Driver] Add support for crtbegin.o, crtend.o and libgloss

[llvm-branch-commits] [clang] [Driver] Add option to force undefined symbols during linking in BareMetal toolchain object. (PR #132807)

2025-04-04 Thread Garvit Gupta via llvm-branch-commits
https://github.com/quic-garvgupt updated https://github.com/llvm/llvm-project/pull/132807 >From 547b57a0f4df485b9c5d14b20354659fd48eb919 Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Mon, 24 Mar 2025 06:49:09 -0700 Subject: [PATCH] [Driver] Add option to force udnefined symbols during linki

[llvm-branch-commits] [clang] [llvm] [AMDGPU][Attributor] Rework update of `AAAMDWavesPerEU` (PR #123995)

2025-04-04 Thread Matt Arsenault via llvm-branch-commits
@@ -1336,6 +1311,59 @@ static void addPreloadKernArgHint(Function &F, TargetMachine &TM) { } } +static void checkWavesPerEU(Module &M, TargetMachine &TM) { + for (Function &F : M) { +const GCNSubtarget &ST = TM.getSubtarget(F); + +auto FlatWgrpSizeAttr = +A

[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add Metadata generation of Root Signatures for Attr (PR #125131)

2025-04-04 Thread Finn Plummer via llvm-branch-commits
https://github.com/inbelic closed https://github.com/llvm/llvm-project/pull/125131 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] [AMDGPU][Attributor] Rework update of `AAAMDWavesPerEU` (PR #123995)

2025-04-04 Thread Matt Arsenault via llvm-branch-commits
@@ -899,4 +899,5 @@ void test_set_fpenv(unsigned long env) { // CHECK-DAG: [[$GRID_RANGE]] = !{i32 1, i32 0} // CHECK-DAG: [[$WS_RANGE]] = !{i16 1, i16 1025} -// CHECK-DAG: attributes #[[$NOUNWIND_READONLY]] = { convergent mustprogress nocallback nofree nounwind willreturn me

[llvm-branch-commits] [clang] [RISCV] Integrate RISCV target in baremetal toolchain object and deprecate RISCVToolchain object (PR #121831)

2025-04-04 Thread Garvit Gupta via llvm-branch-commits
https://github.com/quic-garvgupt updated https://github.com/llvm/llvm-project/pull/121831 >From bf9ad08ad50f72438ade1a85dc27f32d00fe10de Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Fri, 4 Apr 2025 12:51:19 -0700 Subject: [PATCH 1/2] [RISCV][Driver] Add riscv emulation mode to linker job o

[llvm-branch-commits] [clang] [RISCV][Driver] Add riscv emulation mode to linker job of BareMetal toolchain (PR #134442)

2025-04-04 Thread Garvit Gupta via llvm-branch-commits
https://github.com/quic-garvgupt created https://github.com/llvm/llvm-project/pull/134442 Change-Id: I5f3e958fe2e6032c2f8bf2206f3c7b381f799ef9 >From bf9ad08ad50f72438ade1a85dc27f32d00fe10de Mon Sep 17 00:00:00 2001 From: Garvit Gupta Date: Fri, 4 Apr 2025 12:51:19 -0700 Subject: [PATCH] [RISCV

[llvm-branch-commits] [clang] [RISCV] Integrate RISCV target in baremetal toolchain object and deprecate RISCVToolchain object (PR #121831)

2025-04-04 Thread Garvit Gupta via llvm-branch-commits
https://github.com/quic-garvgupt edited https://github.com/llvm/llvm-project/pull/121831 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [RISCV][Driver] Add riscv emulation mode to linker job of BareMetal toolchain (PR #134442)

2025-04-04 Thread Garvit Gupta via llvm-branch-commits
quic-garvgupt wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/134442?utm_source=stack-comment-downstack-mergeability-war

[llvm-branch-commits] [clang] [RISCV][Driver] Add riscv emulation mode to linker job of BareMetal toolchain (PR #134442)

2025-04-04 Thread Garvit Gupta via llvm-branch-commits
https://github.com/quic-garvgupt ready_for_review https://github.com/llvm/llvm-project/pull/134442 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [RISCV][Driver] Add riscv emulation mode to linker job of BareMetal toolchain (PR #134442)

2025-04-04 Thread Garvit Gupta via llvm-branch-commits
https://github.com/quic-garvgupt edited https://github.com/llvm/llvm-project/pull/134442 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [RISCV][Driver] Add riscv emulation mode to linker job of BareMetal toolchain (PR #134442)

2025-04-04 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-clang-driver Author: Garvit Gupta (quic-garvgupt) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/134442.diff 2 Files Affected: - (modified) clang/lib/Driver/ToolChains/BareMetal.cpp (+8-5) - (modified) clang/test/Driver/baremetal.

[llvm-branch-commits] [clang] [RISCV] Integrate RISCV target in baremetal toolchain object and deprecate RISCVToolchain object (PR #121831)

2025-04-04 Thread Garvit Gupta via llvm-branch-commits
@@ -534,8 +554,14 @@ void baremetal::Linker::ConstructJob(Compilation &C, const JobAction &JA, CmdArgs.push_back("-Bstatic"); - if (TC.getTriple().isRISCV() && Args.hasArg(options::OPT_mno_relax)) -CmdArgs.push_back("--no-relax"); + if (Triple.isRISCV()) { +if (A

[llvm-branch-commits] [clang] [RISCV] Integrate RISCV target in baremetal toolchain object and deprecate RISCVToolchain object (PR #121831)

2025-04-04 Thread Garvit Gupta via llvm-branch-commits
@@ -336,6 +336,26 @@ BareMetal::OrderedMultilibs BareMetal::getOrderedMultilibs() const { return llvm::reverse(Default); } +ToolChain::CXXStdlibType BareMetal::GetDefaultCXXStdlibType() const { + if (getTriple().isRISCV() && GCCInstallation.isValid()) +return ToolChain

[llvm-branch-commits] [clang] [RISCV] Integrate RISCV target in baremetal toolchain object and deprecate RISCVToolchain object (PR #121831)

2025-04-04 Thread Garvit Gupta via llvm-branch-commits
@@ -336,6 +336,26 @@ BareMetal::OrderedMultilibs BareMetal::getOrderedMultilibs() const { return llvm::reverse(Default); } +ToolChain::CXXStdlibType BareMetal::GetDefaultCXXStdlibType() const { + if (getTriple().isRISCV() && GCCInstallation.isValid()) +return ToolChain

[llvm-branch-commits] [clang] [RISCV][Driver] Add riscv emulation mode to linker job of BareMetal toolchain (PR #134442)

2025-04-04 Thread Garvit Gupta via llvm-branch-commits
https://github.com/quic-garvgupt edited https://github.com/llvm/llvm-project/pull/134442 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] Backport/20.x: [LoongArch] Fix the type of tls-le symbols (PR #133027)

2025-04-04 Thread Tom Stellard via llvm-branch-commits
tstellar wrote: > LGTM. > > Note: test/CodeGen is probably not the best place for such tests. > `test/MC/CSKY/relocation-specifier.s` contains a nice example and tests > multiple relocations at the same time. Will this be fixed in the main branch? https://github.com/llvm/llvm-project/pull/13

[llvm-branch-commits] [llvm] release/20.x: [HEXAGON] Add support to lower "FREEZE a half(f16)" instruction on Hexagon and fix the isel-buildvector-v2f16.ll assertion (#130977) (PR #132138)

2025-04-04 Thread via llvm-branch-commits
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/132138 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [clang-tools-extra] [libcxx] [clang] improved preservation of template keyword (PR #133610)

2025-04-04 Thread Yanzuo Liu via llvm-branch-commits
zwuis wrote: I tested this branch locally. It fixes #43179, #68670 and #92757. https://github.com/llvm/llvm-project/pull/133610 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm

[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: Detect address materialization and arithmetics (PR #132540)

2025-04-04 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/132540 >From c975f5b73958d2aeadf82c0a7b736e713d8798ae Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Thu, 20 Mar 2025 20:15:07 +0300 Subject: [PATCH 1/2] [BOLT] Gadget scanner: Detect address materializati

[llvm-branch-commits] [llvm] llvm-reduce: Change function return types if function is not called (PR #134035)

2025-04-04 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/134035 >From c6252c5dc0d1326a139c73a75b2a7892d0670ad0 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 2 Apr 2025 11:45:24 +0700 Subject: [PATCH 1/4] llvm-reduce: Change function return types if function is not

[llvm-branch-commits] [llvm] release/20.x: [GlobalMerge][PPC] Don't merge globals in llvm.metadata section (#131801) (PR #134052)

2025-04-04 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-powerpc Author: None (llvmbot) Changes Backport 9356091a98c24718572f99b51553838ed664b67a Requested by: @nikic --- Full diff: https://github.com/llvm/llvm-project/pull/134052.diff 2 Files Affected: - (modified) llvm/lib/CodeGen/GlobalMerge.cp

[llvm-branch-commits] [llvm] [SDAG] Introduce inbounds flag for pointer arithmetic (PR #131862)

2025-04-04 Thread Fabian Ritter via llvm-branch-commits
https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/131862 >From bd22087405bdf669eca230dcf0656dd14b290083 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Mon, 17 Mar 2025 06:51:16 -0400 Subject: [PATCH] [SDAG] Introduce inbounds flag for pointer arithmetic This p

[llvm-branch-commits] [clang] [RISCV] Integrate RISCV target in baremetal toolchain object and deprecate RISCVToolchain object (PR #121831)

2025-04-04 Thread Garvit Gupta via llvm-branch-commits
quic-garvgupt wrote: Gentle Ping! https://github.com/llvm/llvm-project/pull/121831 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [clang] NFC: introduce UnsignedOrNone as a replacement for std::optional (PR #134142)

2025-04-04 Thread Younan Zhang via llvm-branch-commits
@@ -13343,28 +13344,25 @@ class Sema final : public SemaBase { /// The current index into pack expansion arguments that will be /// used for substitution of parameter packs. /// - /// The pack expansion index will be -1 to indicate that parameter packs + /// The pack ex

[llvm-branch-commits] [llvm] [BOLT] Make DataflowAnalysis::getStateBefore() const (NFC) (PR #133308)

2025-04-04 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/133308 >From 46d771d97cd832f8f3c37b3bc580a22b6341a29e Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Thu, 27 Mar 2025 21:06:55 +0300 Subject: [PATCH] [BOLT] Make DataflowAnalysis::getStateBefore() const (N

[llvm-branch-commits] [clang] [Driver] Add support for crtbegin.o, crtend.o and libgloss lib to BareMetal toolchain object (PR #121830)

2025-04-04 Thread Petr Hosek via llvm-branch-commits
@@ -545,9 +545,27 @@ void baremetal::Linker::ConstructJob(Compilation &C, const JobAction &JA, CmdArgs.push_back(Arch == llvm::Triple::aarch64_be ? "-EB" : "-EL"); } - if (!Args.hasArg(options::OPT_nostdlib, options::OPT_nostartfiles, - options::OPT_r

<    1   2