[llvm-branch-commits] [llvm] AMDGPU: Verify f8f6f4 formats in assembler (PR #117826)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117826 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Verify f8f6f4 formats in assembler (PR #117826)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/117826 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Remove FeatureCvtFP8VOP1Bug from gfx950 (PR #117827)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/117827 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Remove FeatureCvtFP8VOP1Bug from gfx950 (PR #117827)

arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/117827?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [llvm] AMDGPU: Allocate different registers for vdst & src in v_cvt_scalef32* (PR #117822)

arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/117822?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [llvm] AMDGPU: Allocate different registers for vdst & src in v_cvt_scalef32* (PR #117822)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117822 >From bbc7178519e6bbb7477bc66bb8e10685d4245381 Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Thu, 11 Jul 2024 05:12:42 -0400 Subject: [PATCH] AMDGPU: Allocate different registers for vdst & src in v_cvt_sca

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add builtins & codegen support for bitop3_b{16|32} of gfx950. (PR #117823)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117823 >From f76165bd1ab51e40c73abe52b1eebcfd8dfa0d8c Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Mon, 20 May 2024 04:39:24 -0400 Subject: [PATCH] AMDGPU: Add builtins & codegen support for bitop3_b{16|32} of gf

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_sr_{bf8|fp8}_{f16|bf16|f32} (PR #117821)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117821 >From b26cbd2043132438fea529b8ee3eb91ec8f9c064 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Tue, 4 Jun 2024 16:31:19 -0400 Subject: [PATCH] AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_sr_{bf8|fp8}_{

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_sr_{f16|bf16}_f32 instructions (PR #117796)

arsenm wrote: ### Merge activity * **Nov 26, 7:08 PM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/117796). https://github.com/llvm/llvm-project/pull/117796 _

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtins & Codegen support for v_cvt_scale_fp4<->f32 for gfx950 (PR #117743)

arsenm wrote: ### Merge activity * **Nov 26, 7:08 PM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/117743). https://github.com/llvm/llvm-project/pull/117743 _

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_pk_fp4_{f|bf}16 for gfx950 (PR #117794)

arsenm wrote: ### Merge activity * **Nov 26, 7:08 PM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/117794). https://github.com/llvm/llvm-project/pull/117794 _

[llvm-branch-commits] [llvm] AMDGPU: MC support for V_CVT_SCALE_SR_FP4 instructions (PR #117795)

arsenm wrote: ### Merge activity * **Nov 26, 7:08 PM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/117795). https://github.com/llvm/llvm-project/pull/117795 _

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_sr_{bf8|fp8}_{f16|bf16|f32} (PR #117821)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes Co-authored-by: Shilei Tian --- Patch is 49.32 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/117821.diff 8 Files Affected: - (

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtin & CodeGen support for v_cvt_sr_{bf16|f16}_f32 instructions (PR #117824)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes Co-authored-by: Shilei Tian --- Patch is 23.28 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/117824.diff 10 Files Affected: -

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtin & CodeGen support for v_cvt_sr_{bf16|f16}_f32 instructions (PR #117824)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117824 >From 5a11a724489d190b535af1b73a50bdc44c62e812 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Wed, 5 Jun 2024 14:16:20 -0400 Subject: [PATCH] AMDGPU: Builtin & CodeGen support for v_cvt_sr_{bf16|f16}_f32 instr

[llvm-branch-commits] [clang] [llvm] AMDGPU/clang: Add global_load_lds size check support for gfx950 (PR #117825)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes Co-authored-by: Shilei Tian --- Patch is 212.23 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/117825.diff 28 Files Affected: -

[llvm-branch-commits] [clang] AMDGPU/clang: Add global_load_lds size check support for gfx950 (PR #117825)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117825 >From ff1c11253fc5f220ddc92f1733d2151d2e5c54df Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Tue, 18 Jun 2024 23:30:05 -0400 Subject: [PATCH] AMDGPU/clang: Add global_load_lds size check support for gfx950 C

[llvm-branch-commits] [llvm] AMDGPU: Match and Select BITOP3 on gfx950 (PR #117843)

arsenm wrote: ### Merge activity * **Nov 27, 1:23 AM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/117843). https://github.com/llvm/llvm-project/pull/117843 _

[llvm-branch-commits] [llvm] Cherry pick f314e12 into release/19.x (PR #117695)

https://github.com/sdesmalen-arm created https://github.com/llvm/llvm-project/pull/117695 f314e12 uses `requiresSaveVG` which was introduced in 334a366ba792, which is also missing from the release/19.x branch. I figured it made sense to cherry-pick that one as well. >From de526e5893e901c350fc9

[llvm-branch-commits] [llvm] Cherry pick f314e12 into release/19.x (PR #117695)

llvmbot wrote: @llvm/pr-subscribers-backend-aarch64 Author: Sander de Smalen (sdesmalen-arm) Changes f314e12 uses `requiresSaveVG` which was introduced in 334a366ba792, which is also missing from the release/19.x branch. I figured it made sense to cherry-pick that one as well. --- Full d

[llvm-branch-commits] [llvm] Cherry pick f314e12 into release/19.x (PR #117695)

https://github.com/sdesmalen-arm edited https://github.com/llvm/llvm-project/pull/117695 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] Cherry pick f314e12 into release/19.x (PR #117695)

https://github.com/sdesmalen-arm milestoned https://github.com/llvm/llvm-project/pull/117695 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/19.x: [SLP]Check that operand of abs does not overflow before making it part of minbitwidth transformation (PR #113146)

https://github.com/nikic approved this pull request. https://github.com/llvm/llvm-project/pull/113146 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] Cherry pick f314e12 into release/19.x (PR #117695)

kmclaughlin-arm wrote: Please can you include https://github.com/llvm/llvm-project/commit/9211977d134d81cbc7a24f13e244334484c31b87 with these commits? This was another fix using requiresSaveVG which I think should be cherry-picked. https://github.com/llvm/llvm-project/pull/117695

[llvm-branch-commits] [llvm] Cherry pick f314e12 into release/19.x (PR #117695)

https://github.com/sdesmalen-arm updated https://github.com/llvm/llvm-project/pull/117695 >From de526e5893e901c350fc9bd6d8013d7d1dbd42c6 Mon Sep 17 00:00:00 2001 From: Amara Emerson Date: Tue, 13 Aug 2024 00:39:14 -0700 Subject: [PATCH 1/3] [AArch64][Darwin][SME] Don't try to save VG to the sta

[llvm-branch-commits] [llvm] Cherry pick f314e12 into release/19.x (PR #117695)

https://github.com/kmclaughlin-arm approved this pull request. https://github.com/llvm/llvm-project/pull/117695 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] Cherry pick f314e12 into release/19.x (PR #117695)

https://github.com/sdesmalen-arm edited https://github.com/llvm/llvm-project/pull/117695 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] [MLIR][OpenMP] Add host_eval clause to omp.target (PR #116049)

@@ -1166,9 +1166,10 @@ def TargetOp : OpenMP_Op<"target", traits = [ ], clauses = [ // TODO: Complete clause list (defaultmap, uses_allocators). OpenMP_AllocateClause, OpenMP_DependClause, OpenMP_DeviceClause, -OpenMP_HasDeviceAddrClause, OpenMP_IfClause, OpenMP_I

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