[llvm-branch-commits] [llvm] release/19.x: [MachineLICM] Don't allow hoisting invariant loads across mem barrier. (#116987) (PR #117154)

tru wrote: @david-arm Should this be merged? https://github.com/llvm/llvm-project/pull/117154 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [compiler-rt] release/19.x: [compiler-rt] [test] Remove an unintended grep parameter (PR #116774)

https://github.com/tru updated https://github.com/llvm/llvm-project/pull/116774 >From fb6b195cae03ba6e5b50870031d710ca6886c5bb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20Storsj=C3=B6?= Date: Sun, 20 Oct 2024 13:51:50 +0300 Subject: [PATCH] [compiler-rt] [test] Remove an unintended grep pa

[llvm-branch-commits] [llvm] release/19.x: [MachineLICM] Don't allow hoisting invariant loads across mem barrier. (#116987) (PR #117154)

david-arm wrote: > @david-arm Should this be merged? Hi yes I think it should be merged. It's a fairly serious bug fix. https://github.com/llvm/llvm-project/pull/117154 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://li

[llvm-branch-commits] [lld] [llvm] release/19.x: [MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (#114922) (PR #117105)

heiher wrote: > Can you squash this PR so it's just one commit? Sure, it's done now. https://github.com/llvm/llvm-project/pull/117105 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listin

[llvm-branch-commits] [llvm] 3d12f45 - [SDAG][ISel][TableGen][LoongArch] Report error for trivial bitcasts when there are predicate calls (#116075)

Author: Yingwei Zheng Date: 2024-11-25T09:36:43+01:00 New Revision: 3d12f45e50b68ac908ef05571e5cc52f4b966d94 URL: https://github.com/llvm/llvm-project/commit/3d12f45e50b68ac908ef05571e5cc52f4b966d94 DIFF: https://github.com/llvm/llvm-project/commit/3d12f45e50b68ac908ef05571e5cc52f4b966d94.diff

[llvm-branch-commits] [llvm] release/19.x: [SDAG][ISel][TableGen][LoongArch] Report error for trivial bitcasts when there are predicate calls (#116075) (PR #116797)

github-actions[bot] wrote: @llvmbot Congratulations on having your first Pull Request (PR) merged into the LLVM Project! Your changes will be combined with recent changes from other authors, then tested by our [build bots](https://lab.llvm.org/buildbot/). If there is a problem with a build,

[llvm-branch-commits] [llvm] f9ae37c - [InstCombine] Handle constant GEP expr in `SimplifyDemandedUseBits` (#116794)

Author: Yingwei Zheng Date: 2024-11-25T09:37:30+01:00 New Revision: f9ae37c670d4bcf4713278ac94d2c8991a326f9e URL: https://github.com/llvm/llvm-project/commit/f9ae37c670d4bcf4713278ac94d2c8991a326f9e DIFF: https://github.com/llvm/llvm-project/commit/f9ae37c670d4bcf4713278ac94d2c8991a326f9e.diff

[llvm-branch-commits] [llvm] release/19.x: [InstCombine] Handle constant GEP expr in `SimplifyDemandedUseBits` (#116794) (PR #116814)

https://github.com/tru updated https://github.com/llvm/llvm-project/pull/116814 >From f9ae37c670d4bcf4713278ac94d2c8991a326f9e Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Tue, 19 Nov 2024 22:17:24 +0800 Subject: [PATCH] [InstCombine] Handle constant GEP expr in `SimplifyDemandedUseBits`

[llvm-branch-commits] [llvm] release/19.x: [LICM] allow MemoryAccess creation failure (#116813) (PR #117082)

github-actions[bot] wrote: @DianQK (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. ht

[llvm-branch-commits] [llvm] [LoongArch] Fix GOT usage for `non-dso_local` function calls in large code model (PR #117134)

https://github.com/tru closed https://github.com/llvm/llvm-project/pull/117134 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] 336f877 - [LoongArch] Fix GOT usage for `non-dso_local` function calls in large code model

Author: wanglei Date: 2024-11-25T09:45:06+01:00 New Revision: 336f87753b510aed840daf87f8d3a4996e6c8f15 URL: https://github.com/llvm/llvm-project/commit/336f87753b510aed840daf87f8d3a4996e6c8f15 DIFF: https://github.com/llvm/llvm-project/commit/336f87753b510aed840daf87f8d3a4996e6c8f15.diff LOG:

[llvm-branch-commits] [llvm] [LoongArch] Fix GOT usage for `non-dso_local` function calls in large code model (PR #117134)

https://github.com/tru updated https://github.com/llvm/llvm-project/pull/117134 >From 336f87753b510aed840daf87f8d3a4996e6c8f15 Mon Sep 17 00:00:00 2001 From: wanglei Date: Thu, 21 Nov 2024 09:31:12 +0800 Subject: [PATCH] [LoongArch] Fix GOT usage for `non-dso_local` function calls in large code

[llvm-branch-commits] [llvm] [LoongArch] Fix GOT usage for `non-dso_local` function calls in large code model (PR #117134)

github-actions[bot] wrote: @wangleiat (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR.

[llvm-branch-commits] [llvm] release/19.x: [SCEV] Fix sext handling for `getConstantMultiple` (#117093) (PR #117136)

https://github.com/tru closed https://github.com/llvm/llvm-project/pull/117136 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [compiler-rt] release/19.x: [compiler-rt] [test] Remove an unintended grep parameter (PR #116774)

https://github.com/tru closed https://github.com/llvm/llvm-project/pull/116774 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [flang] [flang] handle fir.call in AliasAnalysis::getModRef (PR #117164)

@@ -329,14 +341,92 @@ AliasResult AliasAnalysis::alias(Source lhsSrc, Source rhsSrc, mlir::Value lhs, // AliasAnalysis: getModRef //===--===// +static bool isSavedLocal(const fir::AliasAnalysis::Source &src)

[llvm-branch-commits] [flang] [MLIR][OpenMP] Add Lowering support for OpenMP Declare Mapper directive (PR #117046)

@@ -2701,7 +2701,42 @@ static void genOMP(lower::AbstractConverter &converter, lower::SymMap &symTable, semantics::SemanticsContext &semaCtx, lower::pft::Evaluation &eval, const parser::OpenMPDeclareMapperConstruct &declareMapperConstruct) { - TODO(converter.getC

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_f32_[fp|bf]8 of gfx950. (PR #117383)

arsenm wrote: ### Merge activity * **Nov 25, 12:19 PM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/117383). https://github.com/llvm/llvm-project/pull/117383

[llvm-branch-commits] [llvm] AMDGPU: Handle gfx950 valu write vdst + permlane read hazard (PR #117287)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117287 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Handle gfx950 valu write vdst + permlane read hazard (PR #117287)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117287 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for load transpose instructions for gfx950 (PR #117378)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117378 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for load transpose instructions for gfx950 (PR #117378)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117378 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Handle gfx950 valu write vdst + permlane read hazard (PR #117287)

@@ -2551,8 +2551,34 @@ int GCNHazardRecognizer::checkPermlaneHazards(MachineInstr *MI) { return isVCmpXWritesExec(*TII, *TRI, MI); }; - const int NumWaitStates = 4; - return NumWaitStates - getWaitStatesSince(IsVCmpXWritesExecFn, NumWaitStates); + auto IsVALUFn = []

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scale_[f16|f32]_fp8 of gfx950. (PR #117380)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117380 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add MC support for gfx950 V_BITOP3_B32/B16 (PR #117379)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117379 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scale_[f16|f32]_fp8 of gfx950. (PR #117380)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117380 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add MC support for gfx950 V_BITOP3_B32/B16 (PR #117379)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117379 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_{fp8|bf8}_f32 of gfx950. (PR #117382)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117382 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for load transpose instructions for gfx950 (PR #117378)

arsenm wrote: ### Merge activity * **Nov 25, 12:19 PM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/117378). https://github.com/llvm/llvm-project/pull/117378

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support buffer_atomic_pk_add_bf16 for gfx950 (PR #117599)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes Co-authored-by: Sirish Pande --- Patch is 23.74 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/117599.diff 10 Files Affected:

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk32_{bf|f}16_{bf|fp}6 of gfx950. (PR #117591)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117591 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk32_f32_[fp|bf]6 of gfx950 (PR #117590)

@@ -1552,7 +1558,9 @@ def FeatureISAVersion9_5_Common : FeatureSet< FeatureBitOp3Insts, FeatureFP8ConversionScaleInsts, FeatureBF8ConversionScaleInsts, - FeatureFP4ConversionScaleInsts + FeatureFP4ConversionScaleInsts, + FeatureFP6BF6ConversionScaleInsts, + Fea

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk32_{bf|f}16_{bf|fp}6 of gfx950. (PR #117591)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117591 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support v_cvt_scalef32_pk32_{bf|f}6_{bf|fp}16 for gfx950 (PR #117592)

@@ -408,11 +408,23 @@ def FeatureFP6BF6ConversionScaleInsts : SubtargetFeature<"fp6bf6-cvt-scale-insts "Has fp6 and bf6 conversion scale instructions" >; +def FeatureF16BF16ToFP6BF6ConversionScaleInsts : SubtargetFeature<"f16bf16-to-fp6bf6-cvt-scale-insts", + "HasF16BF16T

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support v_cvt_scalef32_pk32_{bf|f}6_{bf|fp}16 for gfx950 (PR #117592)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117592 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support v_cvt_scalef32_pk32_{bf|f}6_{bf|fp}16 for gfx950 (PR #117592)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117592 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_fp4_{f|bf}16 on gfx950. (PR #117594)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117594 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_{bf|f}16_{bf|fp}8 of gfx950. (PR #117593)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117593 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_fp4_{f|bf}16 on gfx950. (PR #117594)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117594 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_{bf|f}16_{bf|fp}8 of gfx950. (PR #117593)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117593 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_ashr_pk_i8/u8_i32 instructions for gfx950 (PR #117596)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117596 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_ashr_pk_i8/u8_i32 instructions for gfx950 (PR #117596)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117596 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_dot2_f32_bf16 instruction for gfx950 (PR #117597)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117597 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_dot2_f32_bf16 instruction for gfx950 (PR #117597)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117597 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_dot2c_f32_bf16 instruction for gfx950 (PR #117598)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117598 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support v_cvt_scalef32_2xpk16_{bf|fp}6_f32 for gfx950. (PR #117595)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117595 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support v_cvt_scalef32_2xpk16_{bf|fp}6_f32 for gfx950. (PR #117595)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117595 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support buffer_atomic_pk_add_bf16 for gfx950 (PR #117599)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117599 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add minimum3/maximum3 pkf16 for gfx950 encodings (PR #117601)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117601 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add encodings for minimum3/maximum3 f32 for gfx950 (PR #117600)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117600 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add encodings for minimum3/maximum3 f32 for gfx950 (PR #117600)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117600 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support buffer_atomic_pk_add_bf16 for gfx950 (PR #117599)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117599 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add minimum3/maximum3 pkf16 for gfx950 encodings (PR #117601)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117601 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [TySan] A Type Sanitizer (Clang) (PR #76260)

https://github.com/erichkeane commented: A pair of minor changes requested, else this looks about right? Not sure who the right person to approve this is though https://github.com/llvm/llvm-project/pull/76260 ___ llvm-branch-commits mailing list llv

[llvm-branch-commits] [clang] [TySan] A Type Sanitizer (Clang) (PR #76260)

@@ -5740,7 +5740,8 @@ void CodeGenModule::EmitGlobalVarDefinition(const VarDecl *D, if (NeedsGlobalCtor || NeedsGlobalDtor) EmitCXXGlobalVarDeclInitFunc(D, GV, NeedsGlobalCtor); - SanitizerMD->reportGlobal(GV, *D, NeedsGlobalCtor); + SanitizerMD->reportGlobalToASan(GV

[llvm-branch-commits] [clang] [TySan] A Type Sanitizer (Clang) (PR #76260)

https://github.com/erichkeane edited https://github.com/llvm/llvm-project/pull/76260 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [compiler-rt] 1a6525e - Revert "[profile] Use base+vaddr for `__llvm_write_binary_ids` note pointers …"

Author: Petr Hosek Date: 2024-11-25T11:53:16-08:00 New Revision: 1a6525e438abfe54708f14b9ceec27c0e337f336 URL: https://github.com/llvm/llvm-project/commit/1a6525e438abfe54708f14b9ceec27c0e337f336 DIFF: https://github.com/llvm/llvm-project/commit/1a6525e438abfe54708f14b9ceec27c0e337f336.diff LO

[llvm-branch-commits] [llvm] release/19.x: [InstCombine] Drop noundef attributes in `foldCttzCtlz` (#116718) (PR #116865)

https://github.com/nikic milestoned https://github.com/llvm/llvm-project/pull/116865 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Handle vcmpx+permalane gfx950 hazard (PR #117286)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/117286 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Handle vcmpx+permalane gfx950 hazard (PR #117286)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117286 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Handle gfx950 valu write vdst + permlane read hazard (PR #117287)

@@ -2551,8 +2551,34 @@ int GCNHazardRecognizer::checkPermlaneHazards(MachineInstr *MI) { return isVCmpXWritesExec(*TII, *TRI, MI); }; - const int NumWaitStates = 4; - return NumWaitStates - getWaitStatesSince(IsVCmpXWritesExecFn, NumWaitStates); + auto IsVALUFn = []

[llvm-branch-commits] [clang] Add documentation for Multilib custom flags (PR #114998)

https://github.com/vhscampos updated https://github.com/llvm/llvm-project/pull/114998 >From be0d5d6ee15e22b78a6fe671dc4f665680fd2aa5 Mon Sep 17 00:00:00 2001 From: Victor Campos Date: Tue, 5 Nov 2024 14:22:06 + Subject: [PATCH 1/2] Add documentation for Multilib custom flags --- clang/doc

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_f32_[fp|bf]8 of gfx950. (PR #117383)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/117383 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support v_cvt_scalef32_pk32_{bf|f}6_{bf|fp}16 for gfx950 (PR #117592)

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/117592 Co-authored-by: Pravin Jagtap >From 3ba5c37284ce7df02470662c790cc5280e0a62a2 Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Mon, 8 Apr 2024 04:56:56 -0400 Subject: [PATCH] AMDGPU: Support v_cvt_scalef32_pk3

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_{bf|f}16_{bf|fp}8 of gfx950. (PR #117593)

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/117593 OPSEL[0] selects src_word to read. Co-authored-by: Pravin Jagtap >From b4657178189eac34b30147a2e9343616ee5ea8b7 Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Mon, 8 Apr 2024 07:44:32 -0400 Subject: [PATCH

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_{bf|f}16_{bf|fp}8 of gfx950. (PR #117593)

arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/117593?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk32_{bf|f}16_{bf|fp}6 of gfx950. (PR #117591)

arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/117591?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_dot2_f32_bf16 instruction for gfx950 (PR #117597)

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/117597 v_dot2_f32_bf16 was added in gfx11 along with v_dot2_f16_f16 and v_dot2_bf16_bf16. All three instructions were part of Dot9 instructions in the compiler. This patch will split existing dot9 (v_dot2_f16_f16, v_do

[llvm-branch-commits] [compiler-rt] [libcxx] [libcxxabi] [llvm] Reapply "[runtimes] Allow building against an installed LLVM tree" (PR #114307)

https://github.com/arichardson updated https://github.com/llvm/llvm-project/pull/114307 >From 6a6483cfe53ad33d3a5cd4432c33a5af93694668 Mon Sep 17 00:00:00 2001 From: Alexander Richardson Date: Wed, 30 Oct 2024 14:33:11 -0700 Subject: [PATCH 1/2] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk32_{bf|f}16_{bf|fp}6 of gfx950. (PR #117591)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/117591 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [compiler-rt] [libcxx] [libcxxabi] [llvm] Reapply "[runtimes] Allow building against an installed LLVM tree" (PR #114307)

https://github.com/arichardson updated https://github.com/llvm/llvm-project/pull/114307 >From 6a6483cfe53ad33d3a5cd4432c33a5af93694668 Mon Sep 17 00:00:00 2001 From: Alexander Richardson Date: Wed, 30 Oct 2024 14:33:11 -0700 Subject: [PATCH 1/2] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support v_cvt_scalef32_pk32_{bf|f}6_{bf|fp}16 for gfx950 (PR #117592)

arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/117592?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_fp4_{f|bf}16 on gfx950. (PR #117594)

arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/117594?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_ashr_pk_i8/u8_i32 instructions for gfx950 (PR #117596)

arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/117596?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support v_cvt_scalef32_2xpk16_{bf|fp}6_f32 for gfx950. (PR #117595)

arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/117595?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_dot2_f32_bf16 instruction for gfx950 (PR #117597)

arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/117597?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk32_f32_[fp|bf]6 of gfx950 (PR #117590)

arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/117590?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk32_f32_[fp|bf]6 of gfx950 (PR #117590)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/117590 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_dot2_f32_bf16 instruction for gfx950 (PR #117597)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes v_dot2_f32_bf16 was added in gfx11 along with v_dot2_f16_f16 and v_dot2_bf16_bf16. All three instructions were part of Dot9 instructions in the compiler. This patch will split existing dot9 (v_dot2

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_ashr_pk_i8/u8_i32 instructions for gfx950 (PR #117596)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes This patch adds assembly and builtin support for v_ashr_pk_i8/u8_i32 instructions. Co-authored-by: Sirish Pande --- Patch is 22.00 KiB, truncated to 20.00 KiB below, full ve

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk32_f32_[fp|bf]6 of gfx950 (PR #117590)

github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff 8f7e780a4014c19daa5e980d943a381a48e6152f 5801905fe13b783780dc09cb3ac4c177c92b10d5 --e

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support v_cvt_scalef32_pk32_{bf|f}6_{bf|fp}16 for gfx950 (PR #117592)

github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff 145c4c8611307f4039f390a1a69fad4fe4c14ee3 3ba5c37284ce7df02470662c790cc5280e0a62a2 --e

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_dot2_f32_bf16 instruction for gfx950 (PR #117597)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/117597 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_dot2c_f32_bf16 instruction for gfx950 (PR #117598)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/117598 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add minimum3/maximum3 pkf16 for gfx950 encodings (PR #117601)

arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/117601?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support buffer_atomic_pk_add_bf16 for gfx950 (PR #117599)

arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/117599?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support buffer_atomic_pk_add_bf16 for gfx950 (PR #117599)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/117599 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add encodings for minimum3/maximum3 f32 for gfx950 (PR #117600)

arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/117600?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_dot2c_f32_bf16 instruction for gfx950 (PR #117598)

arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/117598?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [llvm] AMDGPU: Add encodings for minimum3/maximum3 f32 for gfx950 (PR #117600)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/117600 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add support for v_ashr_pk_i8/u8_i32 instructions for gfx950 (PR #117596)

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/117596 This patch adds assembly and builtin support for v_ashr_pk_i8/u8_i32 instructions. Co-authored-by: Sirish Pande >From 75056a46ee4d7eb6543c2ce99a157a1627a54158 Mon Sep 17 00:00:00 2001 From: Sirish Pande Date:

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support v_cvt_scalef32_2xpk16_{bf|fp}6_f32 for gfx950. (PR #117595)

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/117595 Scale packed 16-component single-precision float vectors from two source inputs using the exponent provided by the third single-precision float input, then convert the values to a packed 32-component FP6 float va

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk32_{bf|f}16_{bf|fp}6 of gfx950. (PR #117591)

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/117591 Co-authored-by: Pravin Jagtap >From 145c4c8611307f4039f390a1a69fad4fe4c14ee3 Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Mon, 8 Apr 2024 01:53:50 -0400 Subject: [PATCH] AMDGPU: MC support for v_cvt_scale

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_fp4_{f|bf}16 on gfx950. (PR #117594)

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/117594 These instructions have non-standard use of OPSEL bits to select dest write byte. The src2_modifiers operand is used without having its corresponding src2 operand by introducing dummy src2. Co-authored-by: Pravin

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_fp4_{f|bf}16 on gfx950. (PR #117594)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes These instructions have non-standard use of OPSEL bits to select dest write byte. The src2_modifiers operand is used without having its corresponding src2 operand by introducing dummy src2. Co-autho

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_fp4_{f|bf}16 on gfx950. (PR #117594)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/117594 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support v_cvt_scalef32_pk32_{bf|f}6_{bf|fp}16 for gfx950 (PR #117592)

llvmbot wrote: @llvm/pr-subscribers-clang Author: Matt Arsenault (arsenm) Changes Co-authored-by: Pravin Jagtap --- Patch is 49.45 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/117592.diff 16 Files Affected: - (modi

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support v_cvt_scalef32_2xpk16_{bf|fp}6_f32 for gfx950. (PR #117595)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes Scale packed 16-component single-precision float vectors from two source inputs using the exponent provided by the third single-precision float input, then convert the values to a packed 32-componen

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_{bf|f}16_{bf|fp}8 of gfx950. (PR #117593)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes OPSEL[0] selects src_word to read. Co-authored-by: Pravin Jagtap --- Full diff: https://github.com/llvm/llvm-project/pull/117593.diff 4 Files Affected: - (modified) llvm/

[llvm-branch-commits] [clang] [llvm] AMDGPU: Support v_cvt_scalef32_2xpk16_{bf|fp}6_f32 for gfx950. (PR #117595)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/117595 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

  1   2   3   >