[llvm-branch-commits] [clang] [RISCV] Support __builtin_cpu_is (PR #116231)

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/116231 >From 9686a2c5c5276289e72d9098f497a9f246a1c457 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Thu, 14 Nov 2024 22:06:45 +0800 Subject: [PATCH] Remove stale CHECKs Created using spr 1.3.6-beta.1 --- clan

[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegUsageInfoPropagation pass to NPM (PR #114010)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/114010 >From f1fe912ed9e2adb02f39b89520f7aeaeff9200bf Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Tue, 29 Oct 2024 07:14:30 + Subject: [PATCH 1/3] [CodeGen][NewPM] Port RegUsageInfoPropagation pass to NPM --

[llvm-branch-commits] [RISCV] Support __builtin_cpu_is (PR #116231)

https://github.com/wangpc-pp created https://github.com/llvm/llvm-project/pull/116231 We have defined `__riscv_cpu_model` variable in #101449. It contains `mvendorid`, `marchid` and `mimpid` fields which are read via system call `sys_riscv_hwprobe`. We can support `__builtin_cpu_is` via compari

[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegUsageInfoCollector pass to NPM (PR #113874)

optimisan wrote: ### Merge activity * **Nov 14, 8:37 AM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/113874). https://github.com/llvm/llvm-project/pull/113874 __

[llvm-branch-commits] [RISCV] Support __builtin_cpu_is (PR #116231)

llvmbot wrote: @llvm/pr-subscribers-backend-risc-v Author: Pengcheng Wang (wangpc-pp) Changes We have defined `__riscv_cpu_model` variable in #101449. It contains `mvendorid`, `marchid` and `mimpid` fields which are read via system call `sys_riscv_hwprobe`. We can support `__builtin_cpu_i

[llvm-branch-commits] [RISCV] Support __builtin_cpu_is (PR #116231)

llvmbot wrote: @llvm/pr-subscribers-clang-codegen Author: Pengcheng Wang (wangpc-pp) Changes We have defined `__riscv_cpu_model` variable in #101449. It contains `mvendorid`, `marchid` and `mimpid` fields which are read via system call `sys_riscv_hwprobe`. We can support `__builtin_cpu_is

[llvm-branch-commits] [RISCV] Support __builtin_cpu_is (PR #116231)

llvmbot wrote: @llvm/pr-subscribers-clang Author: Pengcheng Wang (wangpc-pp) Changes We have defined `__riscv_cpu_model` variable in #101449. It contains `mvendorid`, `marchid` and `mimpid` fields which are read via system call `sys_riscv_hwprobe`. We can support `__builtin_cpu_is` via co

[llvm-branch-commits] [clang] [llvm] [RISCV] Support __builtin_cpu_is (PR #116231)

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/116231 >From 9686a2c5c5276289e72d9098f497a9f246a1c457 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Thu, 14 Nov 2024 22:06:45 +0800 Subject: [PATCH 1/4] Remove stale CHECKs Created using spr 1.3.6-beta.1 ---

[llvm-branch-commits] [clang] [llvm] [RISCV] Support __builtin_cpu_is (PR #116231)

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/116231 >From 9686a2c5c5276289e72d9098f497a9f246a1c457 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Thu, 14 Nov 2024 22:06:45 +0800 Subject: [PATCH 1/3] Remove stale CHECKs Created using spr 1.3.6-beta.1 ---

[llvm-branch-commits] [clang] [RISCV] Support __builtin_cpu_is (PR #116231)

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/116231 >From 9686a2c5c5276289e72d9098f497a9f246a1c457 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Thu, 14 Nov 2024 22:06:45 +0800 Subject: [PATCH 1/2] Remove stale CHECKs Created using spr 1.3.6-beta.1 ---

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