[llvm-branch-commits] [llvm] [AMDGPU] Introduce a "new" target feature `xf32-insts` (PR #115214)

@@ -1110,6 +1110,13 @@ def FeatureRequiresCOV6 : SubtargetFeature<"requires-cov6", "Target Requires Code Object V6" >; +def FeatureXF32Insts : SubtargetFeature<"xf32-insts", + "HasXF32Insts", + "true", + "Has instructions that support xf32 format, such as " + "v_mfm

[llvm-branch-commits] [llvm] e0a8d29 - Revert "[SLP][REVEC] Make GetMinMaxCost support FixedVectorType when REVEC is…"

Author: Kazu Hirata Date: 2024-11-07T10:18:01-08:00 New Revision: e0a8d29f1031b1f77255f2685244871cda56f1af URL: https://github.com/llvm/llvm-project/commit/e0a8d29f1031b1f77255f2685244871cda56f1af DIFF: https://github.com/llvm/llvm-project/commit/e0a8d29f1031b1f77255f2685244871cda56f1af.diff L

[llvm-branch-commits] [llvm] [AMDGPU] Introduce a "new" target feature `xf32-insts` (PR #115214)

https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/115214 >From 1bf7b52751fd5f09b9e9fb4850f5ca6a022cda81 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Wed, 6 Nov 2024 16:15:50 -0500 Subject: [PATCH] [AMDGPU] Introduce a "new" target feature `xf32-insts` The featur

[llvm-branch-commits] [llvm] 1bb79e8 - Revert "[AMDGPU][MIR] Serialize NumPhysicalVGPRSpillLanes (#115291)"

Author: dyung Date: 2024-11-07T13:01:31-05:00 New Revision: 1bb79e8f60fa990228be1af9168c92755dd9ed96 URL: https://github.com/llvm/llvm-project/commit/1bb79e8f60fa990228be1af9168c92755dd9ed96 DIFF: https://github.com/llvm/llvm-project/commit/1bb79e8f60fa990228be1af9168c92755dd9ed96.diff LOG: Re

[llvm-branch-commits] [clang] [clang][CIR] Merge the mlir::cir namespace into cir (PR #115386)

smeenai wrote: Stack from [ghstack](https://github.com/ezyang/ghstack) (oldest at bottom): * (to be filled) https://github.com/llvm/llvm-project/pull/115386 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/

[llvm-branch-commits] [clang] [clang][CIR] Merge the mlir::cir namespace into cir (PR #115386)

https://github.com/smeenai created https://github.com/llvm/llvm-project/pull/115386 https://github.com/llvm/clangir/issues/1025 discusses the motivation. The mechanical parts of this change were done via: find clang \( -name '*.h' -o -name '*.cpp' -o -name '*.td' \) -print0 | xargs -0 perl

[llvm-branch-commits] [clang] [clang][CIR] Merge the mlir::cir namespace into cir (PR #115386)

llvmbot wrote: @llvm/pr-subscribers-clang Author: Shoaib Meenai (smeenai) Changes https://github.com/llvm/clangir/issues/1025 discusses the motivation. The mechanical parts of this change were done via: find clang \( -name '*.h' -o -name '*.cpp' -o -name '*.td' \) -print0 | xargs -0 p

[llvm-branch-commits] [clang] [clang][CIR] Merge the mlir::cir namespace into cir (PR #115386)

https://github.com/smeenai edited https://github.com/llvm/llvm-project/pull/115386 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [libcxx] [libc++] Stop copying headers to the build directory (PR #115380)

https://github.com/arichardson updated https://github.com/llvm/llvm-project/pull/115380 >From e26c0f6fd46cdc74eb96e342ff14acc5b8d64a84 Mon Sep 17 00:00:00 2001 From: Alex Richardson Date: Thu, 7 Nov 2024 14:20:52 -0800 Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=

[llvm-branch-commits] [libcxx] [libc++] Stop copying headers to the build directory (PR #115380)

https://github.com/arichardson edited https://github.com/llvm/llvm-project/pull/115380 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] 8220432 - Revert "[mlir] IntegerRangeAnalysis: don't loop over splat attr (#115229)"

Author: Ian Wood Date: 2024-11-07T14:55:48-08:00 New Revision: 8220432016133c50d2dac6c71e6efd37be1da38a URL: https://github.com/llvm/llvm-project/commit/8220432016133c50d2dac6c71e6efd37be1da38a DIFF: https://github.com/llvm/llvm-project/commit/8220432016133c50d2dac6c71e6efd37be1da38a.diff LOG:

[llvm-branch-commits] [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)

@@ -576,6 +576,12 @@ Generic processor code objects are versioned. See :ref:`amdgpu-generic-processor - ``v_dot2_f32_f16`` + ``gfx9-4-generic`` ``amdgcn`` - ``gfx940`

[llvm-branch-commits] [libcxx] [libc++] Stop copying headers to the build directory (PR #115380)

https://github.com/arichardson updated https://github.com/llvm/llvm-project/pull/115380 >From e26c0f6fd46cdc74eb96e342ff14acc5b8d64a84 Mon Sep 17 00:00:00 2001 From: Alex Richardson Date: Thu, 7 Nov 2024 14:20:52 -0800 Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=

[llvm-branch-commits] [libcxx] [libc++] Stop copying headers to the build directory (PR #115380)

https://github.com/arichardson updated https://github.com/llvm/llvm-project/pull/115380 >From e26c0f6fd46cdc74eb96e342ff14acc5b8d64a84 Mon Sep 17 00:00:00 2001 From: Alex Richardson Date: Thu, 7 Nov 2024 14:20:52 -0800 Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=

[llvm-branch-commits] [libcxx] [libc++] Stop copying headers to the build directory (PR #115380)

@@ -1021,17 +1021,8 @@ set(files configure_file("__config_site.in" "${LIBCXX_GENERATED_INCLUDE_TARGET_DIR}/__config_site" @ONLY) arichardson wrote: @ldionne Unless I am missing something it appears this file is unused. If this is correct I'll open a new PR to

[llvm-branch-commits] [libcxx] [libc++] Stop copying headers to the build directory (PR #115380)

@@ -1021,17 +1021,8 @@ set(files configure_file("__config_site.in" "${LIBCXX_GENERATED_INCLUDE_TARGET_DIR}/__config_site" @ONLY) philnik777 wrote: This isn't used _yet_. https://github.com/llvm/llvm-project/pull/115380 _

[llvm-branch-commits] [libc] faefedf - [libc][math][c23] Add exp10m1f C23 math function (#87992)

Author: OverMighty Date: 2024-11-07T23:56:00+01:00 New Revision: faefedf7f8d520035a7c699baa12d5bb9bb93f49 URL: https://github.com/llvm/llvm-project/commit/faefedf7f8d520035a7c699baa12d5bb9bb93f49 DIFF: https://github.com/llvm/llvm-project/commit/faefedf7f8d520035a7c699baa12d5bb9bb93f49.diff LO

[llvm-branch-commits] [clang] [clang][CIR] Merge the mlir::cir namespace into cir (PR #115386)

smeenai wrote: The Windows CI error is an unrelated infra failure, but I don't know how to retry it. https://github.com/llvm/llvm-project/pull/115386 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bi

[llvm-branch-commits] [compiler-rt] release/19.x: [compiler-rt] [fuzzer] Skip trying to set the thread name on MinGW (#115167) (PR #115287)

https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/115287 Backport 87f4bc0acad65b1d20160d4160c7778b187125fc Requested by: @mstorsjo >From 140beef444a80e0c6620ae007696bc1fe3c027c1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20Storsj=C3=B6?= Date: Thu, 7 Nov 2024 0

[llvm-branch-commits] [compiler-rt] release/19.x: [compiler-rt] [fuzzer] Skip trying to set the thread name on MinGW (#115167) (PR #115287)

llvmbot wrote: @devnexen What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/115287 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/list

[llvm-branch-commits] [compiler-rt] release/19.x: [compiler-rt] [fuzzer] Skip trying to set the thread name on MinGW (#115167) (PR #115287)

llvmbot wrote: @llvm/pr-subscribers-compiler-rt-sanitizer Author: None (llvmbot) Changes Backport 87f4bc0acad65b1d20160d4160c7778b187125fc Requested by: @mstorsjo --- Full diff: https://github.com/llvm/llvm-project/pull/115287.diff 1 Files Affected: - (modified) compiler-rt/lib/fuzzer

[llvm-branch-commits] [compiler-rt] release/19.x: [compiler-rt] [fuzzer] Skip trying to set the thread name on MinGW (#115167) (PR #115287)

https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/115287 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port MachineCycleInfo to NPM (PR #114745)

https://github.com/cdevadas edited https://github.com/llvm/llvm-project/pull/114745 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port MachineCycleInfo to NPM (PR #114745)

@@ -151,6 +152,7 @@ MACHINE_FUNCTION_PASS("print", MACHINE_FUNCTION_PASS("print", MachineDominatorTreePrinterPass(dbgs())) MACHINE_FUNCTION_PASS("print", MachineLoopPrinterPass(dbgs())) +MACHINE_FUNCTION_PASS("print", MachineCycleInfoPrinterPass(dbgs()))

[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port MachineCycleInfo to NPM (PR #114745)

https://github.com/cdevadas commented: I guess this PR is for porting MachineCycleAnalysis. The run interface for legacy MachineCycle analysis is missing. The porting for the Print interface seems complete. Also, no test/runline to validate the MachineCycle analysis in the NPM path. I see only

[llvm-branch-commits] [compiler-rt] release/19.x: [compiler-rt] [fuzzer] Skip trying to set the thread name on MinGW (#115167) (PR #115287)

https://github.com/devnexen approved this pull request. https://github.com/llvm/llvm-project/pull/115287 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [flang] [lld] [llvm] [Flang] LLVM_ENABLE_RUNTIMES=flang-rt (PR #110217)

@@ -0,0 +1,165 @@ +#===-- CMakeLists.txt --===# +# +# Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +# See https://llvm.org/LICENSE.txt for license information. +# SPDX-License-Identifier: Apache-

[llvm-branch-commits] [clang] [flang] [lld] [llvm] [Flang] LLVM_ENABLE_RUNTIMES=flang-rt (PR #110217)

@@ -221,6 +230,9 @@ function(llvm_ExternalProject_Add name source_dir) -DCMAKE_ASM_COMPILER=${LLVM_RUNTIME_OUTPUT_INTDIR}/clang${CMAKE_EXECUTABLE_SUFFIX}) endif() endif() +if(FLANG_IN_TOOLCHAIN) + list(APPEND compiler_args -DCMAKE_

[llvm-branch-commits] [BOLT][WIP] Support ret-converted call-cont fallthru in BAT mode (PR #115334)

https://github.com/aaupov created https://github.com/llvm/llvm-project/pull/115334 Use landing pad information encoded in BAT (https://github.com/llvm/llvm-project/pull/114602) to determine if branch target is not an entry point or landing pad. Test Plan: updated callcont-fallthru.s

[llvm-branch-commits] [clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)

@@ -576,6 +576,12 @@ Generic processor code objects are versioned. See :ref:`amdgpu-generic-processor - ``v_dot2_f32_f16`` + ``gfx9-4-generic`` ``amdgcn`` - ``gfx940`

[llvm-branch-commits] [BOLT][WIP] Support ret-converted call-cont fallthru in BAT mode (PR #115334)

github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff b6adebcc7ef911b4ca99cc8eb9aeed1681f95391 a717a225d5e03bcca6dbc3badae77ab91ab04919 --e

[llvm-branch-commits] [clang] [flang] [lld] [llvm] [Flang] LLVM_ENABLE_RUNTIMES=flang-rt (PR #110217)

@@ -270,13 +271,15 @@ function(runtime_default_target) -DLLVM_BUILD_TOOLS=${LLVM_BUILD_TOOLS} -DCMAKE_C_COMPILER_WORKS=ON -DCMAKE_CXX_COMPILER_WORKS=ON +

[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port MachineCycleInfo to NPM (PR #114745)

@@ -151,6 +152,7 @@ MACHINE_FUNCTION_PASS("print", MACHINE_FUNCTION_PASS("print", MachineDominatorTreePrinterPass(dbgs())) MACHINE_FUNCTION_PASS("print", MachineLoopPrinterPass(dbgs())) +MACHINE_FUNCTION_PASS("print", MachineCycleInfoPrinterPass(dbgs()))

[llvm-branch-commits] [llvm] [AMDGPU] Introduce a "new" target feature `xf32-insts` (PR #115214)

@@ -1110,6 +1110,13 @@ def FeatureRequiresCOV6 : SubtargetFeature<"requires-cov6", "Target Requires Code Object V6" >; +def FeatureXF32Insts : SubtargetFeature<"xf32-insts", + "HasXF32Insts", + "true", + "Has instructions that support xf32 format, such as " + "v_mfm

[llvm-branch-commits] [llvm] [AMDGPU] Introduce a "new" target feature `xf32-insts` (PR #115214)

@@ -1110,6 +1110,13 @@ def FeatureRequiresCOV6 : SubtargetFeature<"requires-cov6", "Target Requires Code Object V6" >; +def FeatureXF32Insts : SubtargetFeature<"xf32-insts", + "HasXF32Insts", + "true", + "Has instructions that support xf32 format, such as " + "v_mfm

[llvm-branch-commits] [clang] [flang] [lld] [llvm] [Flang] LLVM_ENABLE_RUNTIMES=flang-rt (PR #110217)

jhuber6 wrote: Overall I think the patch is fine pending some naming nits, my one concern is the `-U__GLIBCXX` stuff, because undefining internal vars seems really sketchy. Do we use `-nostdlib++` to make sure we don't link the C++ library? https://github.com/llvm/llvm-project/pull/110217

[llvm-branch-commits] [clang] [flang] [lld] [llvm] [Flang] LLVM_ENABLE_RUNTIMES=flang-rt (PR #110217)

@@ -0,0 +1,165 @@ +#===-- CMakeLists.txt --===# +# +# Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +# See https://llvm.org/LICENSE.txt for license information. +# SPDX-License-Identifier: Apache-

[llvm-branch-commits] [flang] [flang][OpenMP] Semantic checks for DOACROSS clause (PR #115397)

https://github.com/kparzysz updated https://github.com/llvm/llvm-project/pull/115397 >From 4165254e8c4a7b572e741cb62d632b462537dc0f Mon Sep 17 00:00:00 2001 From: Krzysztof Parzyszek Date: Tue, 5 Nov 2024 12:01:43 -0600 Subject: [PATCH 1/4] [flang][OpenMP] Semantic checks for DOACROSS clause K

[llvm-branch-commits] [mlir] [mlir][IR][NFC] `DominanceInfo`: Minor code cleanups (PR #115430)

https://github.com/matthias-springer created https://github.com/llvm/llvm-project/pull/115430 Remove `properlyDominatesImpl` and implement the functionality in `properlyDominates` directly. Depends on #115413. >From 58fbba463e7ed6bc03ad3276a4ed72b1f24d313a Mon Sep 17 00:00:00 2001 From: Matt

[llvm-branch-commits] [clang] c702e61 - Revert "[Clang] skip default argument instantiation for non-defining friend d…"

Author: Matheus Izvekov Date: 2024-11-07T21:50:36-03:00 New Revision: c702e6179cdde1460f33a300b78708f232f146e3 URL: https://github.com/llvm/llvm-project/commit/c702e6179cdde1460f33a300b78708f232f146e3 DIFF: https://github.com/llvm/llvm-project/commit/c702e6179cdde1460f33a300b78708f232f146e3.dif

[llvm-branch-commits] [llvm] [mlir] [OpenMP][MLIR] Descriptor explicit member map lowering changes (PR #113556)

https://github.com/agozillon edited https://github.com/llvm/llvm-project/pull/113556 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] [OpenMP][MLIR] Descriptor explicit member map lowering changes (PR #113556)

https://github.com/agozillon updated https://github.com/llvm/llvm-project/pull/113556 >From 8dcb02ff8eb44e43d902717129bbcf365bfb0de9 Mon Sep 17 00:00:00 2001 From: agozillon Date: Fri, 4 Oct 2024 13:03:22 -0500 Subject: [PATCH] [OpenMP][MLIR] Descriptor explicit member map lowering changes Th

[llvm-branch-commits] [flang] [Flang][OpenMP] Derived type explicit allocatable member mapping (PR #113557)

https://github.com/agozillon edited https://github.com/llvm/llvm-project/pull/113557 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [flang] [Flang][OpenMP] Derived type explicit allocatable member mapping (PR #113557)

@@ -145,11 +145,294 @@ createMapInfoOp(fir::FirOpBuilder &builder, mlir::Location loc, builder.getIntegerAttr(builder.getIntegerType(64, false), mapType), builder.getAttr(mapCaptureType), builder.getStringAttr(name), builder.getBoolAttr(partialMap)); - ret

[llvm-branch-commits] [flang] [Flang][OpenMP] Derived type explicit allocatable member mapping (PR #113557)

https://github.com/agozillon commented: I've updated the PR to incorporate the nits where feasible and replied in comment where it wasn't quite possible for various reasons, think there's only two cases of that though! Thank you very much for the reviews everyone, it's greatly appreciated. P

[llvm-branch-commits] [LoongArch] Avoid indirect branch jumps using the ra register (PR #115424)

https://github.com/wangleiat created https://github.com/llvm/llvm-project/pull/115424 Micro-architecture unconditionally treats a "jr $ra" as "return from subroutine", hence doing "jr $ra" would interfere with both subroutine return prediction and the more general indirect branch prediction. GC

[llvm-branch-commits] [LoongArch] Avoid indirect branch jumps using the ra register (PR #115424)

llvmbot wrote: @llvm/pr-subscribers-backend-loongarch Author: wanglei (wangleiat) Changes Micro-architecture unconditionally treats a "jr $ra" as "return from subroutine", hence doing "jr $ra" would interfere with both subroutine return prediction and the more general indirect branch predi

[llvm-branch-commits] [lldb] [lldb][LoongArch] Function calls support in lldb expressions (PR #114742)

https://github.com/wangleiat updated https://github.com/llvm/llvm-project/pull/114742 >From f390561ee9c49dd10f0b13b79b713624664d7da2 Mon Sep 17 00:00:00 2001 From: wanglei Date: Mon, 4 Nov 2024 17:12:03 +0800 Subject: [PATCH 1/3] comply with code style Created using spr 1.3.5-bogner --- lldb/

[llvm-branch-commits] [lldb] [lldb][LoongArch] Function calls support in lldb expressions (PR #114742)

https://github.com/wangleiat updated https://github.com/llvm/llvm-project/pull/114742 >From f390561ee9c49dd10f0b13b79b713624664d7da2 Mon Sep 17 00:00:00 2001 From: wanglei Date: Mon, 4 Nov 2024 17:12:03 +0800 Subject: [PATCH 1/3] comply with code style Created using spr 1.3.5-bogner --- lldb/

[llvm-branch-commits] [mlir] [mlir][IR][NFC] `DominanceInfo`: Minor code cleanups (PR #115430)

llvmbot wrote: @llvm/pr-subscribers-mlir-core @llvm/pr-subscribers-mlir Author: Matthias Springer (matthias-springer) Changes Remove `properlyDominatesImpl` and implement the functionality in `properlyDominates` directly. Depends on #115413. --- Full diff: https://github.com/llvm/llvm-

[llvm-branch-commits] [mlir] [mlir][IR] `DominanceInfo`: Deduplicate `properlyDominates` implementation (PR #115433)

https://github.com/matthias-springer created https://github.com/llvm/llvm-project/pull/115433 The implementations of `DominanceInfo::properlyDominates` and `PostDominanceInfo::properlyPostDominates` are almost identical: only one line of code is different. Define the function in `DominanceInfo

[llvm-branch-commits] [mlir] [mlir][IR] `DominanceInfo`: Deduplicate `properlyDominates` implementation (PR #115433)

llvmbot wrote: @llvm/pr-subscribers-mlir Author: Matthias Springer (matthias-springer) Changes The implementations of `DominanceInfo::properlyDominates` and `PostDominanceInfo::properlyPostDominates` are almost identical: only one line of code is different. Define the function in `Domina

[llvm-branch-commits] [mlir] [mlir][IR] `DominanceInfo`: Deduplicate `properlyDominates` implementation (PR #115433)

https://github.com/matthias-springer edited https://github.com/llvm/llvm-project/pull/115433 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port MachineSink to NPM (PR #115434)

https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/115434 Targets can set the EnableSinkAndFold option in CGPassBuilderOptions for the NPM pipeline in buildCodeGenPipeline(... &Opts, ...) >From 0f0ccc515bab4e2c8adfc5278bd6613464756e86 Mon Sep 17 00:00:00 2001 From: A

[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port MachineCycleInfo to NPM (PR #114745)

https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/114745 >From b5ded2204ffc90300023bc06946ffb48e0f5eddb Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 30 Oct 2024 04:59:30 + Subject: [PATCH 1/2] [CodeGen][NewPM] Port MachineCycleInfo to NPM --- .../llvm/

[llvm-branch-commits] [mlir] [mlir][IR] `DominanceInfo`: Deduplicate `properlyDominates` implementation (PR #115433)

llvmbot wrote: @llvm/pr-subscribers-mlir-core Author: Matthias Springer (matthias-springer) Changes The implementations of `DominanceInfo::properlyDominates` and `PostDominanceInfo::properlyPostDominates` are almost identical: only one line of code is different. Define the function in `D

[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port MachineSink to NPM (PR #115434)

optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/115434?utm_source=stack-comment-downstack-mergeability-warning