@@ -218,9 +220,7 @@ void PseudoProbeRewriter::updatePseudoProbes() {
}
while (CallOutputAddress != CallOutputAddresses.second) {
- AP.second.push_back(*Probe);
- AP.second.back().setAddress(CallOutputAddress->second);
- Probe->getInli
https://github.com/cdevadas created
https://github.com/llvm/llvm-project/pull/103721
None
>From cc30faa32e7828d74826421cdae50464ede38e0b Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Wed, 14 Aug 2024 14:18:59 +0530
Subject: [PATCH] [AMDGPU][R600] Move R600TargetMachine into
R600
cdevadas wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/103721?utm_source=stack-comment-downstack-mergeability-warning"
https://github.com/cdevadas ready_for_review
https://github.com/llvm/llvm-project/pull/103721
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llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Christudasan Devadasan (cdevadas)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/103721.diff
7 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp (+1-1)
- (modified) llvm/lib/Ta
@@ -5,12 +5,159 @@
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===--===//
+//
+/// \file
+/// This file contains both AMDGPU-R600 target machine and the CodeGen pass
+/// builder. The targe
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/103768
None
>From 97e126125f33b929eafb8527350c9ab2c244b695 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 14 Aug 2024 14:11:04 +0400
Subject: [PATCH] AMDGPU: Preserve alignment when custom expanding atomicrmw
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/103769
When introducing the address space predicates, move and mutate
the original instruction, and clone for the shared case.
>From 1b293677b5030415b828d005a43aca57cd4b3f7b Mon Sep 17 00:00:00 2001
From: Matt Arsenault
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/103768?utm_source=stack-comment-downstack-mergeability-warning";
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/103769?utm_source=stack-comment-downstack-mergeability-warning";
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/103768.diff
2 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/SIISelLowering.cpp (+4-3)
- (modified)
llvm/test/Transforms/AtomicExp
https://github.com/arsenm ready_for_review
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llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
When introducing the address space predicates, move and mutate
the original instruction, and clone for the shared case.
---
Full diff: https://github.com/llvm/llvm-project/pull/103769.diff
1 Files
https://github.com/john-brawn-arm milestoned
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https://github.com/llvm/llvm-project/pull/103866
None
>From a3ad76a5c7cf33d4dc21fed322796a27f74d830e Mon Sep 17 00:00:00 2001
From: John Brawn
Date: Wed, 14 Aug 2024 12:22:51 +0100
Subject: [PATCH] [AArch64] Add GCS release notes
---
clang/docs/Relea
https://github.com/john-brawn-arm edited
https://github.com/llvm/llvm-project/pull/103866
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@llvm/pr-subscribers-clang
Author: John Brawn (john-brawn-arm)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/103866.diff
1 Files Affected:
- (modified) clang/docs/ReleaseNotes.rst (+5)
``diff
diff --git a/clang/docs/ReleaseNotes.rst b/clang
john-brawn-arm wrote:
https://github.com/llvm/llvm-project/pull/75486 is what added this.
https://github.com/llvm/llvm-project/pull/103866
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https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/103768
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https://github.com/llvm/llvm-project/pull/103886
Backport 73d78973fe072438f0f73088f889c66845b2b51a
Requested by: @amy-kwan
>From 40f2a4cd9c757868e81c350800316d880cf112f3 Mon Sep 17 00:00:00 2001
From: Gulfem Savrun Yeniceri
Date: Tue, 23 Jul 2024 11:06:30 +0
amy-kwan wrote:
I've made a request for backporting to resolve the AIX LIT failures:
```
LLVM :: tools/llvm-cgdata/merge-archive.test
LLVM :: tools/llvm-cgdata/merge-concat.test
LLVM :: tools/llvm-cgdata/merge-double.test
LLVM :: tools/llvm-cgdata/merge-single.test
```
FYI @tru @azhan92 @
arsenm wrote:
### Merge activity
* **Aug 14, 9:00 AM EDT**: @arsenm started a stack merge that includes this
pull request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/103768).
https://github.com/llvm/llvm-project/pull/103768
https://github.com/aaupov updated
https://github.com/llvm/llvm-project/pull/102789
>From ddcbb593f72ca47acaa82f9c14a7fd2c4e30903b Mon Sep 17 00:00:00 2001
From: Amir Ayupov
Date: Tue, 13 Aug 2024 03:51:31 -0700
Subject: [PATCH] Pass CurChildIndex by value
Created using spr 1.3.4
---
llvm/incl
https://github.com/aaupov updated
https://github.com/llvm/llvm-project/pull/102789
>From ddcbb593f72ca47acaa82f9c14a7fd2c4e30903b Mon Sep 17 00:00:00 2001
From: Amir Ayupov
Date: Tue, 13 Aug 2024 03:51:31 -0700
Subject: [PATCH] Pass CurChildIndex by value
Created using spr 1.3.4
---
llvm/incl
https://github.com/aaupov updated
https://github.com/llvm/llvm-project/pull/102904
>From 3ffb03f8e4bcb2fa235ae989320c466af4a3cda8 Mon Sep 17 00:00:00 2001
From: Amir Ayupov
Date: Mon, 12 Aug 2024 14:40:57 -0700
Subject: [PATCH] stable_sort
Created using spr 1.3.4
---
llvm/lib/MC/MCPseudoProbe
https://github.com/aaupov updated
https://github.com/llvm/llvm-project/pull/102904
>From 3ffb03f8e4bcb2fa235ae989320c466af4a3cda8 Mon Sep 17 00:00:00 2001
From: Amir Ayupov
Date: Mon, 12 Aug 2024 14:40:57 -0700
Subject: [PATCH] stable_sort
Created using spr 1.3.4
---
llvm/lib/MC/MCPseudoProbe
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/103938
This should act like range.
>From 19523869d82b786622e0686685c922d2e00b9b94 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 14 Aug 2024 16:19:30 +0400
Subject: [PATCH] Local: Handle noalias_addrspace in
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/103938?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/103939
None
>From 1f6e2295eea908176e0025f0605c325fbc533188 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 14 Aug 2024 16:51:08 +0400
Subject: [PATCH] Local: Handle noalias.addrspace in copyMetadataForLoad
--
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/103939?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/103938
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llvmbot wrote:
@llvm/pr-subscribers-llvm-ir
Author: Matt Arsenault (arsenm)
Changes
This should act like range.
---
Full diff: https://github.com/llvm/llvm-project/pull/103938.diff
2 Files Affected:
- (modified) llvm/lib/Transforms/Utils/Local.cpp (+6-1)
- (modified) llvm/test/Transfo
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/103939
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llvmbot wrote:
@llvm/pr-subscribers-llvm-transforms
Author: Matt Arsenault (arsenm)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/103939.diff
2 Files Affected:
- (modified) llvm/lib/Transforms/Utils/Local.cpp (+1)
- (modified) llvm/test/Transforms/InstCombine/loads
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/104027
Backport 019ef522756886caa258daf68d877f84abc1b878
Requested by: @jroelofs
>From 2521dd89d36b8d75515c5a847b1c85380147693d Mon Sep 17 00:00:00 2001
From: Jon Roelofs
Date: Wed, 14 Aug 2024 07:38:14 -0700
Subject
https://github.com/llvmbot milestoned
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llvmbot wrote:
@llvm/pr-subscribers-clang-codegen
Author: None (llvmbot)
Changes
Backport 019ef522756886caa258daf68d877f84abc1b878
Requested by: @jroelofs
---
Full diff: https://github.com/llvm/llvm-project/pull/104027.diff
2 Files Affected:
- (modified) clang/lib/CodeGen/Targets/AArc
https://github.com/Dinistro updated
https://github.com/llvm/llvm-project/pull/103053
>From a9fd34956d7a9ddfc06bcfaf011cec7e3c5ddcd2 Mon Sep 17 00:00:00 2001
From: Christian Ulmann
Date: Tue, 13 Aug 2024 12:46:30 +
Subject: [PATCH 1/6] MLIR, LLVM: Add an IR utility to perform proper slicing
https://github.com/bogner updated
https://github.com/llvm/llvm-project/pull/100699
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https://github.com/aaupov updated
https://github.com/llvm/llvm-project/pull/102789
>From ddcbb593f72ca47acaa82f9c14a7fd2c4e30903b Mon Sep 17 00:00:00 2001
From: Amir Ayupov
Date: Tue, 13 Aug 2024 03:51:31 -0700
Subject: [PATCH 1/2] Pass CurChildIndex by value
Created using spr 1.3.4
---
llvm/
https://github.com/cdevadas updated
https://github.com/llvm/llvm-project/pull/103721
>From a10910597e6ee30e87dd09a4f77fcfa1729873f0 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Wed, 14 Aug 2024 14:18:59 +0530
Subject: [PATCH 1/2] [AMDGPU][R600] Move R600TargetMachine into
R600Co
https://github.com/cdevadas edited
https://github.com/llvm/llvm-project/pull/103721
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https://github.com/AaronBallman approved this pull request.
LGTM, but please add a release note when this lands.
https://github.com/llvm/llvm-project/pull/104027
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https://github.com/gysit approved this pull request.
LGTM modulo nits!
https://github.com/llvm/llvm-project/pull/103053
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@@ -363,9 +323,14 @@ static void createNewAliasScopesFromNoAliasParameter(
// Find the set of underlying pointers that this pointer is based on.
SmallPtrSet basedOnPointers;
- for (Value pointer : pointerArgs)
-llvm::copy(getUnderlyingObjectSet(pointer
@@ -0,0 +1,98 @@
+//===- SliceWalk.h - Helpers for performing IR slice walks ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-
@@ -0,0 +1,98 @@
+//===- SliceWalk.h - Helpers for performing IR slice walks ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-
https://github.com/cdevadas created
https://github.com/llvm/llvm-project/pull/104038
This definition shouldn't be in AMDGPU TM.
>From 6ab7119cd8b4e63dad2625b0aa9416e2898a3bbc Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan
Date: Wed, 14 Aug 2024 20:50:30 +0530
Subject: [PATCH] [AMDGPU][R
cdevadas wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/104038?utm_source=stack-comment-downstack-mergeability-warning"
https://github.com/cdevadas ready_for_review
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llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Christudasan Devadasan (cdevadas)
Changes
This definition shouldn't be in AMDGPU TM.
---
Full diff: https://github.com/llvm/llvm-project/pull/104038.diff
2 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/AMDGPUTargetMachine
cor3ntin wrote:
Yes merging that is fine, it fixes a regression
https://github.com/llvm/llvm-project/pull/102924
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https://github.com/github-actions[bot] closed
https://github.com/llvm/llvm-project/pull/104042
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github-actions[bot] wrote:
This repository does not accept pull requests. Please follow
http://llvm.org/docs/Contributing.html#how-to-submit-a-patch for contribution
to LLVM.
https://github.com/llvm/llvm-project/pull/104042
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Author: ChiaHungDuan
Date: 2024-08-14T08:44:01-07:00
New Revision: af92207904334c8de7d3c483dc6c635abe2f228e
URL:
https://github.com/llvm/llvm-project/commit/af92207904334c8de7d3c483dc6c635abe2f228e
DIFF:
https://github.com/llvm/llvm-project/commit/af92207904334c8de7d3c483dc6c635abe2f228e.diff
efriedma-quic wrote:
Please also fix the comment before
AArch64TargetLowering::shouldExpandAtomicRMWInIR . (The comment is wrong; a
floating-point "exception" isn't an exception in the sense that it would cancel
an exclusive reservation.)
https://github.com/llvm/llvm-project/pull/103702
arsenm wrote:
### Merge activity
* **Aug 14, 12:49 PM EDT**: @arsenm started a stack merge that includes this
pull request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/102815).
https://github.com/llvm/llvm-project/pull/102815
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jroelofs wrote:
https://github.com/llvm/llvm-project/issues/104055
https://github.com/llvm/llvm-project/pull/104027
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https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/102865
>From dc7ab092c8c9873c44a9f6b0d07bd0f30c288070 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 12 Aug 2024 12:46:00 +0400
Subject: [PATCH] AMDGPU: Declare pass control flags in header
This will allow th
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/102867
>From bc07cf6778a51845d4b0947523bc3cb79b3a0f3f Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 12 Aug 2024 13:09:55 +0400
Subject: [PATCH] AMDGPU/NewPM: Fill out passes in addCodeGenPrepare
AMDGPUAnnota
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/102884
>From 04fe70293a7fe2432eb55620c7fc5b05310c4f74 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 12 Aug 2024 15:26:25 +0400
Subject: [PATCH] AMDGPU/NewPM: Start filling out addIRPasses
This is not complet
https://github.com/tobias-stadler updated
https://github.com/llvm/llvm-project/pull/102163
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vient wrote:
I think you need to merge it yourself? I don't have rights to do it.
https://github.com/llvm/llvm-project/pull/102924
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Author: Florian Mayer
Date: 2024-08-14T10:54:34-07:00
New Revision: b968a0229074ad32accd7feef50f4f5394d7ac96
URL:
https://github.com/llvm/llvm-project/commit/b968a0229074ad32accd7feef50f4f5394d7ac96
DIFF:
https://github.com/llvm/llvm-project/commit/b968a0229074ad32accd7feef50f4f5394d7ac96.diff
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/104117
Backport 4d08bb11eea5907fa9cdfe4c7bc9d5c91e79c6a7
Requested by: @ldionne
>From 983d8ddec66649977e90c61334d586e214dfd4e0 Mon Sep 17 00:00:00 2001
From: Louis Dionne
Date: Wed, 14 Aug 2024 14:04:22 -0400
Subject
https://github.com/llvmbot milestoned
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llvmbot wrote:
@llvm/pr-subscribers-libcxx
Author: None (llvmbot)
Changes
Backport 4d08bb11eea5907fa9cdfe4c7bc9d5c91e79c6a7
Requested by: @ldionne
---
Full diff: https://github.com/llvm/llvm-project/pull/104117.diff
4 Files Affected:
- (modified) libcxx/include/complex (+6-3)
- (modi
Author: Valentin Clement (バレンタイン クレメン)
Date: 2024-08-14T13:44:34-07:00
New Revision: ec137c84529a30b16c051f6b633a7a7538bdc46c
URL:
https://github.com/llvm/llvm-project/commit/ec137c84529a30b16c051f6b633a7a7538bdc46c
DIFF:
https://github.com/llvm/llvm-project/commit/ec137c84529a30b16c051f6b633a7
https://github.com/bogner updated
https://github.com/llvm/llvm-project/pull/100700
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https://github.com/bogner updated
https://github.com/llvm/llvm-project/pull/100699
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https://github.com/bogner created
https://github.com/llvm/llvm-project/pull/104245
In 8cf85653b6f5 "[DirectX] Make DXILOpBuilder's API more useable" we introduced
specialized createOp methods for each DirectX op for convenience, but the API
is buggy and untested. It also isn't actually as useful
https://github.com/bogner created
https://github.com/llvm/llvm-project/pull/104247
LLVMType is both too broad and too narrow for defining DXIL operations, in
different ways. It's too broad in the sense that we don't need the full set of
MVTs - the set of types DXIL operations work on is much sma
https://github.com/bogner created
https://github.com/llvm/llvm-project/pull/104246
DXIL operations that only have one signature behave one of two ways - either
they are always suffixed with a type like `dx.op.ThreadId.i32` and hence have
exactly one overload, or they're never suffixed like `dx.o
https://github.com/bogner created
https://github.com/llvm/llvm-project/pull/104248
This introduces an anonymous class "OpLowerer" to help with lowering DXIL ops,
and moves the DXILOpBuilder there instead of creating a new one for every
operation. DXILOpBuilder is also changed to own its IRBuilde
https://github.com/bogner created
https://github.com/llvm/llvm-project/pull/104249
This updates the "dxil-metadata-emit" pass flag to be spelled
"dxil-translate-metadata" to better match the pass name.
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https://github.com/bogner created
https://github.com/llvm/llvm-project/pull/104250
This wires up dxil-op-lower, dxil-intrinsic-expansion, dxil-translate-metadata,
and dxil-pretty-printer to the new pass manager, both as a matter of future
proofing the backend and so that they can be used more fl
https://github.com/bogner created
https://github.com/llvm/llvm-project/pull/104251
The `@llvm.dx.handle.fromBinding` intrinsic is lowered either to the
`CreateHandle` op or a pair of `CreateHandleFromBinding` and `AnnotateHandle`
ops, depending on the DXIL version. Regardless of the DXIL version
llvmbot wrote:
@llvm/pr-subscribers-backend-directx
Author: Justin Bogner (bogner)
Changes
In 8cf85653b6f5 "[DirectX] Make DXILOpBuilder's API more useable" we introduced
specialized createOp methods for each DirectX op for convenience, but the API
is buggy and untested. It also isn't actu
https://github.com/bogner created
https://github.com/llvm/llvm-project/pull/104252
The `@llvm.dx.typedBufferLoad` intrinsic is lowered to `@dx.op.bufferLoad`.
There's some complexity here due to translating from a vector return type to a
named struct and trying to avoid excessive IR coming out o
llvmbot wrote:
@llvm/pr-subscribers-backend-directx
Author: Justin Bogner (bogner)
Changes
DXIL operations that only have one signature behave one of two ways - either
they are always suffixed with a type like `dx.op.ThreadId.i32` and hence have
exactly one overload, or they're never suffi
https://github.com/bogner created
https://github.com/llvm/llvm-project/pull/104253
The `@llvm.dx.typedBufferStore` intrinsic is lowered to `@dx.op.bufferStore`.
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llvmbot wrote:
@llvm/pr-subscribers-backend-directx
Author: Justin Bogner (bogner)
Changes
LLVMType is both too broad and too narrow for defining DXIL operations, in
different ways. It's too broad in the sense that we don't need the full set of
MVTs - the set of types DXIL operations work
llvmbot wrote:
@llvm/pr-subscribers-backend-directx
Author: Justin Bogner (bogner)
Changes
This introduces an anonymous class "OpLowerer" to help with lowering DXIL ops,
and moves the DXILOpBuilder there instead of creating a new one for every
operation. DXILOpBuilder is also changed to ow
llvmbot wrote:
@llvm/pr-subscribers-backend-directx
@llvm/pr-subscribers-backend-spir-v
@llvm/pr-subscribers-hlsl
Author: Justin Bogner (bogner)
Changes
This updates the "dxil-metadata-emit" pass flag to be spelled
"dxil-translate-metadata" to better match the pass name.
---
Full diff: h
llvmbot wrote:
@llvm/pr-subscribers-backend-directx
Author: Justin Bogner (bogner)
Changes
This wires up dxil-op-lower, dxil-intrinsic-expansion, dxil-translate-metadata,
and dxil-pretty-printer to the new pass manager, both as a matter of future
proofing the backend and so that they can b
llvmbot wrote:
@llvm/pr-subscribers-backend-directx
Author: Justin Bogner (bogner)
Changes
The `@llvm.dx.handle.fromBinding` intrinsic is lowered either to the
`CreateHandle` op or a pair of `CreateHandleFromBinding` and `AnnotateHandle`
ops, depending on the DXIL version. Regardless of th
llvmbot wrote:
@llvm/pr-subscribers-backend-directx
Author: Justin Bogner (bogner)
Changes
The `@llvm.dx.typedBufferLoad` intrinsic is lowered to `@dx.op.bufferLoad`.
There's some complexity here due to translating from a vector return type to a
named struct and trying to avoid excessive I
llvmbot wrote:
@llvm/pr-subscribers-backend-directx
Author: Justin Bogner (bogner)
Changes
The `@llvm.dx.typedBufferStore` intrinsic is lowered to `@dx.op.bufferStore`.
---
Full diff: https://github.com/llvm/llvm-project/pull/104253.diff
5 Files Affected:
- (modified) llvm/docs/Direct
bogner wrote:
Depends on #104248
https://github.com/llvm/llvm-project/pull/104250
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https://github.com/python3kgae approved this pull request.
https://github.com/llvm/llvm-project/pull/104249
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