[llvm-branch-commits] [OpenMP][MLIR] Descriptor explicit member map lowering changes (PR #96265)

https://github.com/agozillon updated https://github.com/llvm/llvm-project/pull/96265 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [OpenMP][MLIR] Descriptor explicit member map lowering changes (PR #96265)

https://github.com/agozillon updated https://github.com/llvm/llvm-project/pull/96265 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [flang] [Flang][OpenMP] Derived type explicit allocatable member mapping (PR #96266)

https://github.com/agozillon updated https://github.com/llvm/llvm-project/pull/96266 >From 2e24a3b56c2be7203aa87b1d6bb886706e138496 Mon Sep 17 00:00:00 2001 From: agozillon Date: Tue, 25 Jun 2024 17:40:04 -0500 Subject: [PATCH] removal of some leftover artifacts Created using spr 1.3.4 --- fl

[llvm-branch-commits] [flang] [Flang][OpenMP] Derived type explicit allocatable member mapping (PR #96266)

https://github.com/agozillon updated https://github.com/llvm/llvm-project/pull/96266 >From 2e24a3b56c2be7203aa87b1d6bb886706e138496 Mon Sep 17 00:00:00 2001 From: agozillon Date: Tue, 25 Jun 2024 17:40:04 -0500 Subject: [PATCH] removal of some leftover artifacts Created using spr 1.3.4 --- fl

[llvm-branch-commits] [OpenMP][MLIR] Descriptor explicit member map lowering changes (PR #96265)

agozillon wrote: Thank you for the approvals and comments! I updated the PR to add the requested comment as well as shortened the test as requested to a more minimal test. https://github.com/llvm/llvm-project/pull/96265 ___ llvm-branch-commits mailin

[llvm-branch-commits] [OpenMP][MLIR] Descriptor explicit member map lowering changes (PR #96265)

agozillon wrote: Likely also worth stating the PR has some further modifications to support swapping from DenseIntElementsAttr -> ArrayAttr>> which simplifies the implementation a chunk by no longer requiring the -1 padding (thank you very much for the suggestions @skatrak :-) )! So perhaps wo

[llvm-branch-commits] [clang] clang/AMDGPU: Emit atomicrmw for __builtin_amdgcn_global_atomic_fadd_{f32|f64} (PR #96872)

@@ -19273,9 +19269,14 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID, ProcessOrderScopeAMDGCN(EmitScalarExpr(E->getArg(2)), EmitScalarExpr(E->getArg(3)), AO, SSID); } else { - // The ds_atomic_fadd_* builtins do

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