https://github.com/arichardson updated
https://github.com/llvm/llvm-project/pull/139601
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@@ -1583,6 +1583,26 @@ bool IRTranslator::translateCast(unsigned Opcode, const
User &U,
return true;
}
+bool IRTranslator::translatePtrToAddr(const User &U,
+ MachineIRBuilder &MIRBuilder) {
+ if (containsBF16Type(U))
+return false;
@@ -1583,6 +1583,26 @@ bool IRTranslator::translateCast(unsigned Opcode, const
User &U,
return true;
}
+bool IRTranslator::translatePtrToAddr(const User &U,
+ MachineIRBuilder &MIRBuilder) {
+ if (containsBF16Type(U))
+return false;
https://github.com/arichardson updated
https://github.com/llvm/llvm-project/pull/139601
Rate limit · GitHub
body {
background-color: #f6f8fa;
color: #24292e;
font-family: -apple-system,BlinkMacSystemFont,Segoe
UI,Helvetica,Arial,sa
https://github.com/arichardson updated
https://github.com/llvm/llvm-project/pull/139601
Rate limit · GitHub
body {
background-color: #f6f8fa;
color: #24292e;
font-family: -apple-system,BlinkMacSystemFont,Segoe
UI,Helvetica,Arial,sa
@@ -1583,6 +1583,26 @@ bool IRTranslator::translateCast(unsigned Opcode, const
User &U,
return true;
}
+bool IRTranslator::translatePtrToAddr(const User &U,
+ MachineIRBuilder &MIRBuilder) {
+ if (containsBF16Type(U))
+return false;
@@ -1583,6 +1583,26 @@ bool IRTranslator::translateCast(unsigned Opcode, const
User &U,
return true;
}
+bool IRTranslator::translatePtrToAddr(const User &U,
+ MachineIRBuilder &MIRBuilder) {
+ if (containsBF16Type(U))
+return false;
@@ -1583,6 +1583,26 @@ bool IRTranslator::translateCast(unsigned Opcode, const
User &U,
return true;
}
+bool IRTranslator::translatePtrToAddr(const User &U,
+ MachineIRBuilder &MIRBuilder) {
+ if (containsBF16Type(U))
+return false;
@@ -1583,6 +1583,26 @@ bool IRTranslator::translateCast(unsigned Opcode, const
User &U,
return true;
}
+bool IRTranslator::translatePtrToAddr(const User &U,
+ MachineIRBuilder &MIRBuilder) {
+ if (containsBF16Type(U))
+return false;
@@ -1583,6 +1583,26 @@ bool IRTranslator::translateCast(unsigned Opcode, const
User &U,
return true;
}
+bool IRTranslator::translatePtrToAddr(const User &U,
+ MachineIRBuilder &MIRBuilder) {
+ if (containsBF16Type(U))
+return false;
@@ -1583,6 +1583,26 @@ bool IRTranslator::translateCast(unsigned Opcode, const
User &U,
return true;
}
+bool IRTranslator::translatePtrToAddr(const User &U,
+ MachineIRBuilder &MIRBuilder) {
+ if (containsBF16Type(U))
+return false;
@@ -1583,6 +1583,26 @@ bool IRTranslator::translateCast(unsigned Opcode, const
User &U,
return true;
}
+bool IRTranslator::translatePtrToAddr(const User &U,
+ MachineIRBuilder &MIRBuilder) {
+ if (containsBF16Type(U))
+return false;
llvmbot wrote:
@llvm/pr-subscribers-llvm-globalisel
Author: Alexander Richardson (arichardson)
Changes
We lower ptrtoaddr by emitting a G_PTRTOINT, truncating that to the
address size and then truncate/zext to the final integer type.
This has exposed an issue in the GlobalIsel postlegaliz
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Alexander Richardson (arichardson)
Changes
We lower ptrtoaddr by emitting a G_PTRTOINT, truncating that to the
address size and then truncate/zext to the final integer type.
This has exposed an issue in the GlobalIsel postlegalize
https://github.com/arichardson created
https://github.com/llvm/llvm-project/pull/139601
We lower ptrtoaddr by emitting a G_PTRTOINT, truncating that to the
address size and then truncate/zext to the final integer type.
This has exposed an issue in the GlobalIsel postlegalizer combines where
the
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