[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146076 >From 33152a969116d67be445347b59dba9e9a902b09f Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 05:38:52 -0400 Subject: [PATCH 1/3] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by defau

[llvm-branch-commits] [llvm] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD transforms (PR #146074)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146074 >From 72a940883e91a0fc0c67454b1e01b8f96cae34ab Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 26 Jun 2025 06:10:35 -0400 Subject: [PATCH 1/2] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146076 >From fcaebb21fdbc19ada18e20902a4626ba9ace9f99 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 05:38:52 -0400 Subject: [PATCH 1/3] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by defau

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146075 >From 157f6a257a5771cff71fd5ea4be46251bd26d97f Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 04:23:50 -0400 Subject: [PATCH 1/5] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR If we ca

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146076 >From b67b9c58a1612903f409cfdcec80e8565e4d5dc2 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 05:38:52 -0400 Subject: [PATCH 1/3] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by defau

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146075 >From 395fdf948ee1864d6fc427e62db5433a5ef3eba0 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 04:23:50 -0400 Subject: [PATCH 1/5] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR If we ca

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146075 >From 7c417c4c1413a3807d476b7fc490256084a0ac62 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 04:23:50 -0400 Subject: [PATCH 1/5] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR If we ca

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146075 >From 7c417c4c1413a3807d476b7fc490256084a0ac62 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 04:23:50 -0400 Subject: [PATCH 1/5] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR If we ca

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (PR #145330)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145330 >From da5b337fef36cdee209845b51bba323e84272334 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 04:03:53 -0400 Subject: [PATCH 1/2] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cas

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (PR #145330)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145330 >From da5b337fef36cdee209845b51bba323e84272334 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 04:03:53 -0400 Subject: [PATCH 1/2] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cas

[llvm-branch-commits] [llvm] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD transforms (PR #146074)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146074 >From b484d75cff9bd4703dd2c90d041d4df0aefd0e3c Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 26 Jun 2025 06:10:35 -0400 Subject: [PATCH 1/2] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD

[llvm-branch-commits] [llvm] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD transforms (PR #146074)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146074 >From b484d75cff9bd4703dd2c90d041d4df0aefd0e3c Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 26 Jun 2025 06:10:35 -0400 Subject: [PATCH 1/2] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146076 >From 3b0c210862015dc304004641990fea429f8e31c7 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 05:38:52 -0400 Subject: [PATCH 1/3] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by defau

[llvm-branch-commits] [llvm] [AMDGPU] Generate canonical additions in AMDGPUPromoteAlloca (PR #157810)

https://github.com/ritter-x2a created https://github.com/llvm/llvm-project/pull/157810 When we know that one operand of an addition is a constant, we might was well put it on the right-hand side and avoid the work to canonicalize it in a later pass. >From f6a8f012f387b906f845b7a57c4e88bd7f490bc

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146076 >From 8710de705f09d90f166f82c1733620b2c8581306 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 05:38:52 -0400 Subject: [PATCH 1/3] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by defau

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special cases (PR #145329)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145329 >From 345456442d0d9e5a8babd9b72b8343d6608399d5 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 03:51:19 -0400 Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special

[llvm-branch-commits] [llvm] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD transforms (PR #146074)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146074 >From 62623004e49ca66a426455e4b3ac4028f10f68fd Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 26 Jun 2025 06:10:35 -0400 Subject: [PATCH 1/2] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146075 >From 18dcde6a8c7bddfbd56077dc81b0b80535cc49a1 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 04:23:50 -0400 Subject: [PATCH 1/5] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR If we ca

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146076 >From 8710de705f09d90f166f82c1733620b2c8581306 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 05:38:52 -0400 Subject: [PATCH 1/3] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by defau

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146075 >From 18dcde6a8c7bddfbd56077dc81b0b80535cc49a1 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 04:23:50 -0400 Subject: [PATCH 1/5] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR If we ca

[llvm-branch-commits] [llvm] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD transforms (PR #146074)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146074 >From 62623004e49ca66a426455e4b3ac4028f10f68fd Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 26 Jun 2025 06:10:35 -0400 Subject: [PATCH 1/2] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special cases (PR #145329)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145329 >From 345456442d0d9e5a8babd9b72b8343d6608399d5 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 03:51:19 -0400 Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (PR #145330)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145330 >From 41b0c715809685ab360559cf47af2fa3ddb8f036 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 04:03:53 -0400 Subject: [PATCH 1/2] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cas

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (PR #145330)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145330 >From 41b0c715809685ab360559cf47af2fa3ddb8f036 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 04:03:53 -0400 Subject: [PATCH 1/2] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cas

[llvm-branch-commits] [llvm] [AMDGPU] Generate canonical additions in AMDGPUPromoteAlloca (PR #157810)

https://github.com/ritter-x2a ready_for_review https://github.com/llvm/llvm-project/pull/157810 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Generate canonical additions in AMDGPUPromoteAlloca (PR #157810)

ritter-x2a wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/157810?utm_source=stack-comment-downstack-mergeability-warnin

[llvm-branch-commits] [llvm] [AMDGPU][GISel] Only fold flat offsets if they are inbounds (PR #153001)

https://github.com/ritter-x2a ready_for_review https://github.com/llvm/llvm-project/pull/153001 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][GISel] Only fold flat offsets if they are inbounds (PR #153001)

ritter-x2a wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/153001?utm_source=stack-comment-downstack-mergeability-warnin

[llvm-branch-commits] [llvm] [AMDGPU][GISel] Only fold flat offsets if they are inbounds (PR #153001)

https://github.com/ritter-x2a created https://github.com/llvm/llvm-project/pull/153001 For flat memory instructions where the address is supplied as a base address register with an immediate offset, the memory aperture test ignores the immediate offset. Currently, ISel does not respect that, whi

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (PR #145330)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145330 >From ec5c4d315a4611383838d8b6d517dfb5a5de7806 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 04:03:53 -0400 Subject: [PATCH 1/2] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cas

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special cases (PR #145329)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145329 >From b4212e94fbf40d8b9bebdb346f7aee103f5d561e Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 03:51:19 -0400 Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

@@ -2767,6 +2767,19 @@ SDValue DAGCombiner::visitPTRADD(SDNode *N) { } } + // Transform (ptradd a, b) -> (or disjoint a, b) if it is equivalent and if + // that transformation can't block an offset folding at any use of the ptradd. + // This should be done late, afte

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146075 >From ff41f47a5fae2b51add3304eca5d00cc6c1a85a0 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 04:23:50 -0400 Subject: [PATCH 1/5] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR If we ca

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146076 >From 05a47721e69b5f64947c0790a85e4c7d8009dd09 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 05:38:52 -0400 Subject: [PATCH] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default A

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146076 >From 05a47721e69b5f64947c0790a85e4c7d8009dd09 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 05:38:52 -0400 Subject: [PATCH] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default A

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

@@ -2766,6 +2766,33 @@ SDValue DAGCombiner::visitPTRADD(SDNode *N) { } } + // Transform (ptradd a, b) -> (or disjoint a, b) if it is equivalent and if + // that transformation can't block an offset folding at any use of the ptradd. + // This should be done late, afte

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

@@ -2766,6 +2766,33 @@ SDValue DAGCombiner::visitPTRADD(SDNode *N) { } } + // Transform (ptradd a, b) -> (or disjoint a, b) if it is equivalent and if + // that transformation can't block an offset folding at any use of the ptradd. + // This should be done late, afte

[llvm-branch-commits] [llvm] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD transforms (PR #146074)

@@ -2689,59 +2689,82 @@ SDValue DAGCombiner::visitPTRADD(SDNode *N) { if (PtrVT == IntVT && isNullConstant(N0)) return N1; - if (N0.getOpcode() != ISD::PTRADD || - reassociationCanBreakAddressingModePattern(ISD::PTRADD, DL, N, N0, N1)) -return SDValue(); - - S

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146075 >From ff41f47a5fae2b51add3304eca5d00cc6c1a85a0 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 04:23:50 -0400 Subject: [PATCH 1/4] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR If we ca

[llvm-branch-commits] [llvm] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD transforms (PR #146074)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146074 >From a8fdd2ed39eb51772fe7a7047bcea413ea622e24 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 26 Jun 2025 06:10:35 -0400 Subject: [PATCH 1/2] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146075 >From ff41f47a5fae2b51add3304eca5d00cc6c1a85a0 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 04:23:50 -0400 Subject: [PATCH 1/4] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR If we ca

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146076 >From 31c7da64eee27fb63e96a3e70c048db5f8516af8 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 05:38:52 -0400 Subject: [PATCH] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default A

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146076 >From 31c7da64eee27fb63e96a3e70c048db5f8516af8 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 05:38:52 -0400 Subject: [PATCH] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default A

[llvm-branch-commits] [llvm] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD transforms (PR #146074)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146074 >From a8fdd2ed39eb51772fe7a7047bcea413ea622e24 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 26 Jun 2025 06:10:35 -0400 Subject: [PATCH] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD tran

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146075 >From 65ffa2bc21d2dc0947ea1f6e12c28a8b2bb34ec7 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 04:23:50 -0400 Subject: [PATCH 1/3] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR If we ca

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146075 >From 65ffa2bc21d2dc0947ea1f6e12c28a8b2bb34ec7 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 04:23:50 -0400 Subject: [PATCH 1/3] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR If we ca

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (PR #145330)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145330 >From cad3b62979e28d85fc94317e5cfdb0d0aeeb56af Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 04:03:53 -0400 Subject: [PATCH 1/2] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cas

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special cases (PR #145329)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145329 >From a0aa1d2b7dbfac0269d7cb397872a44357f213c6 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 03:51:19 -0400 Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146076 >From 77df34d4e0d9d32c0c71c7096d4f81a355f80e7d Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 05:38:52 -0400 Subject: [PATCH] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default A

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146076 >From 77df34d4e0d9d32c0c71c7096d4f81a355f80e7d Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 05:38:52 -0400 Subject: [PATCH] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default A

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (PR #145330)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145330 >From cad3b62979e28d85fc94317e5cfdb0d0aeeb56af Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 04:03:53 -0400 Subject: [PATCH 1/2] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cas

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special cases (PR #145329)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145329 >From a0aa1d2b7dbfac0269d7cb397872a44357f213c6 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 03:51:19 -0400 Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special

[llvm-branch-commits] [llvm] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD transforms (PR #146074)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146074 >From a8fdd2ed39eb51772fe7a7047bcea413ea622e24 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 26 Jun 2025 06:10:35 -0400 Subject: [PATCH] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD tran

[llvm-branch-commits] [llvm] AMDGPU: Figure out required AGPR count for inline asm (PR #150910)

@@ -1200,16 +1200,61 @@ AAAMDWavesPerEU &AAAMDWavesPerEU::createForPosition(const IRPosition &IRP, llvm_unreachable("AAAMDWavesPerEU is only valid for function position"); } -static bool inlineAsmUsesAGPRs(const InlineAsm *IA) { - for (const auto &CI : IA->ParseConstraints

[llvm-branch-commits] [llvm] AMDGPU: Figure out required AGPR count for inline asm (PR #150910)

@@ -1200,16 +1200,61 @@ AAAMDWavesPerEU &AAAMDWavesPerEU::createForPosition(const IRPosition &IRP, llvm_unreachable("AAAMDWavesPerEU is only valid for function position"); } -static bool inlineAsmUsesAGPRs(const InlineAsm *IA) { - for (const auto &CI : IA->ParseConstraints

[llvm-branch-commits] [llvm] [AMDGPU][GISel] Use buildObjectPtrOffset instead of buildPtrAdd (PR #150899)

ritter-x2a wrote: ### Merge activity * **Jul 29, 9:12 AM UTC**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/150899). https://github.com/llvm/llvm-project/pull/150899 _

[llvm-branch-commits] [llvm] [GISel] Introduce MIFlags::InBounds (PR #150900)

ritter-x2a wrote: > Also add the corresponding `MIFlagEnum` in `Combine.td` if you intend to let > combines match/apply this flag. I've now added an `InBounds` `MIFlagEnum`. Looks like some of the other flags like `SameSign` and `NoUSWrap` are missing there as well, but I think that's for a s

[llvm-branch-commits] [llvm] [GISel] Introduce MIFlags::InBounds (PR #150900)

@@ -1860,8 +1862,12 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST, OS << "nneg "; if (getFlag(MachineInstr::Disjoint)) OS << "disjoint "; + if (getFlag(MachineInstr::NoUSWrap)) ritter-x2a wrote: I think that might be because `

[llvm-branch-commits] [llvm] [GISel] Introduce MIFlags::InBounds (PR #150900)

https://github.com/ritter-x2a ready_for_review https://github.com/llvm/llvm-project/pull/150900 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][GISel] Use buildObjectPtrOffset instead of buildPtrAdd (PR #150899)

https://github.com/ritter-x2a ready_for_review https://github.com/llvm/llvm-project/pull/150899 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][GISel] Use buildObjectPtrOffset instead of buildPtrAdd (PR #150899)

ritter-x2a wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/150899?utm_source=stack-comment-downstack-mergeability-warnin

[llvm-branch-commits] [llvm] [GISel] Introduce MIFlags::InBounds (PR #150900)

ritter-x2a wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/150900?utm_source=stack-comment-downstack-mergeability-warnin

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146075 >From 43aa79f3f328e182d17b649f3656b1467ac72e3d Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 04:23:50 -0400 Subject: [PATCH 1/3] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR If we ca

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146076 >From f78f6c3ae4a580b5dfe22a042dcc6015263060c2 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 05:38:52 -0400 Subject: [PATCH] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default A

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (PR #145330)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145330 >From bf788982995fba2db158251bb78c9cf110b27a49 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 04:03:53 -0400 Subject: [PATCH 1/2] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cas

[llvm-branch-commits] [llvm] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD transforms (PR #146074)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146074 >From ea26451beb2e03cd0a8ae5006d7288f3f6e7a5c3 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 26 Jun 2025 06:10:35 -0400 Subject: [PATCH] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD tran

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146075 >From 43aa79f3f328e182d17b649f3656b1467ac72e3d Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 04:23:50 -0400 Subject: [PATCH 1/3] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR If we ca

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146076 >From f78f6c3ae4a580b5dfe22a042dcc6015263060c2 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 05:38:52 -0400 Subject: [PATCH] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default A

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (PR #145330)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145330 >From bf788982995fba2db158251bb78c9cf110b27a49 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 04:03:53 -0400 Subject: [PATCH 1/2] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cas

[llvm-branch-commits] [llvm] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD transforms (PR #146074)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146074 >From ea26451beb2e03cd0a8ae5006d7288f3f6e7a5c3 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 26 Jun 2025 06:10:35 -0400 Subject: [PATCH] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD tran

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special cases (PR #145329)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145329 >From 2865c30eb7dc0e716bc0af66636fe95e13a186fa Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 03:51:19 -0400 Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special cases (PR #145329)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145329 >From 2865c30eb7dc0e716bc0af66636fe95e13a186fa Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 03:51:19 -0400 Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special cases (PR #145329)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145329 >From f6b9cec969f3c9a786f2215dc79a7c0713ada2cb Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 03:51:19 -0400 Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special

[llvm-branch-commits] [llvm] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD transforms (PR #146074)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146074 >From 4a0dcfa906065b4028af4ef9a9fe50674fcf88d4 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 26 Jun 2025 06:10:35 -0400 Subject: [PATCH] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD tran

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (PR #145330)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145330 >From 42d07f1bfe5db29a746c4bd9d2dc4cfdcc106497 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 04:03:53 -0400 Subject: [PATCH 1/2] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cas

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146076 >From 8a75455c276df97d56a56de5c0444b57ff6b6561 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 05:38:52 -0400 Subject: [PATCH] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default A

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (PR #145330)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145330 >From 42d07f1bfe5db29a746c4bd9d2dc4cfdcc106497 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 04:03:53 -0400 Subject: [PATCH 1/2] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cas

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146075 >From 1d93ad2c4998fb9d400946e03c5176ca82fad6d9 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 04:23:50 -0400 Subject: [PATCH 1/3] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR If we ca

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146076 >From 8a75455c276df97d56a56de5c0444b57ff6b6561 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 05:38:52 -0400 Subject: [PATCH] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default A

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146075 >From 1d93ad2c4998fb9d400946e03c5176ca82fad6d9 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 04:23:50 -0400 Subject: [PATCH 1/3] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR If we ca

[llvm-branch-commits] [llvm] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD transforms (PR #146074)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146074 >From 4a0dcfa906065b4028af4ef9a9fe50674fcf88d4 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 26 Jun 2025 06:10:35 -0400 Subject: [PATCH] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD tran

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special cases (PR #145329)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145329 >From f6b9cec969f3c9a786f2215dc79a7c0713ada2cb Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 03:51:19 -0400 Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146076 >From 629fb4549d552b8ba919c1b75cc8274038b0192c Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 05:38:52 -0400 Subject: [PATCH] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default A

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146075 >From 6f98b3a7b6207c50e13d1a549e2098d93875be7b Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 04:23:50 -0400 Subject: [PATCH 1/3] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR If we ca

[llvm-branch-commits] [llvm] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD transforms (PR #146074)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146074 >From 293652f82cf41da5df1ad9df53df7a5d562dbd09 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 26 Jun 2025 06:10:35 -0400 Subject: [PATCH] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD tran

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (PR #145330)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145330 >From a6bee3e460ef6b51948ab4eedbcb211d8b625a2e Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 04:03:53 -0400 Subject: [PATCH 1/2] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cas

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special cases (PR #145329)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145329 >From cbc611c9e083626fc76d66b4351822097c6aa3b1 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 03:51:19 -0400 Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns (PR #143880)

ritter-x2a wrote: ### Merge activity * **Jul 18, 7:54 AM UTC**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/143880). https://github.com/llvm/llvm-project/pull/143880 _

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns (PR #143881)

@@ -908,19 +919,24 @@ multiclass IMAD32_Pats { // Handle cases where amdgpu-codegenprepare-mul24 made a mul24 instead of a normal mul. // We need to separate this because otherwise OtherPredicates would be overriden. -class IMAD32_Mul24_Pat: GCNPat < -(i64 (add (i64 (AM

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

ritter-x2a wrote: Thanks! I'll also get a performance testing cycle done before landing this one. https://github.com/llvm/llvm-project/pull/146076 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/ma

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146076 >From f5f615abd4cb1d130876b720891b0ac2b58ace9c Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 05:38:52 -0400 Subject: [PATCH] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default A

[llvm-branch-commits] [llvm] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD transforms (PR #146074)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146074 >From 249fbdfc77b2f3dcb299ba8aefb4aa62b57a38d1 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 26 Jun 2025 06:10:35 -0400 Subject: [PATCH] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD tran

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (PR #145330)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145330 >From b8fe4ab7861d858e98afe35a762ce53dc8d89a86 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 04:03:53 -0400 Subject: [PATCH 1/2] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cas

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (PR #145330)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/145330 >From b8fe4ab7861d858e98afe35a762ce53dc8d89a86 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Tue, 17 Jun 2025 04:03:53 -0400 Subject: [PATCH 1/2] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cas

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146076 >From f5f615abd4cb1d130876b720891b0ac2b58ace9c Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 05:38:52 -0400 Subject: [PATCH] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default A

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146075 >From 2bc75df51ee121e06467acf47f74b87ae22fd4f7 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 04:23:50 -0400 Subject: [PATCH 1/3] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR If we ca

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146075 >From 2bc75df51ee121e06467acf47f74b87ae22fd4f7 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Fri, 27 Jun 2025 04:23:50 -0400 Subject: [PATCH 1/3] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR If we ca

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns (PR #143881)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/143881 >From 531b230f3a828d5f39cf0d2393d18d961d6be42d Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 12 Jun 2025 07:44:37 -0400 Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns This patc

[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns (PR #143880)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/143880 >From c4bda032514d199feafe799693d53e118874e3d8 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 12 Jun 2025 06:13:26 -0400 Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns Pr

[llvm-branch-commits] [llvm] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD transforms (PR #146074)

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/146074 >From 249fbdfc77b2f3dcb299ba8aefb4aa62b57a38d1 Mon Sep 17 00:00:00 2001 From: Fabian Ritter Date: Thu, 26 Jun 2025 06:10:35 -0400 Subject: [PATCH] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD tran

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