https://github.com/ritter-x2a edited
https://github.com/llvm/llvm-project/pull/146075
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -416,6 +416,60 @@ entry:
ret void
}
+; Check that ptradds can be lowered to disjoint ORs.
+define ptr @gep_disjoint_or(ptr %base) {
+; GFX942-LABEL: gep_disjoint_or:
+; GFX942: ; %bb.0:
+; GFX942-NEXT:s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT:v_
@@ -15136,6 +15136,41 @@ SDValue SITargetLowering::performPtrAddCombine(SDNode
*N,
return Folded;
}
+ // Transform (ptradd a, b) -> (or disjoint a, b) if it is equivalent and if
+ // that transformation can't block an offset folding at any use of the
ptradd.
+ //
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/146075
>From 452008111a34c815b38242272063654393261921 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Fri, 27 Jun 2025 04:23:50 -0400
Subject: [PATCH 1/3] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR
If we ca
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/146076
>From 2d8d232729769a3ca274789dee2fe542d0045ef2 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Fri, 27 Jun 2025 05:38:52 -0400
Subject: [PATCH] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default
A
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/146076
>From 2d8d232729769a3ca274789dee2fe542d0045ef2 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Fri, 27 Jun 2025 05:38:52 -0400
Subject: [PATCH] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default
A
https://github.com/ritter-x2a ready_for_review
https://github.com/llvm/llvm-project/pull/146074
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -2230,7 +2230,7 @@ bool AMDGPUDAGToDAGISel::SelectSMRDBaseOffset(SDValue
Addr, SDValue &SBase,
SDValue N0, N1;
// Extract the base and offset if possible.
- if (CurDAG->isBaseWithConstantOffset(Addr) || Addr.getOpcode() == ISD::ADD) {
+ if (CurDAG->isBaseWithConstant
@@ -2960,10 +2971,10 @@ bool TargetLowering::SimplifyDemandedBits(
if (Op.getOpcode() == ISD::MUL) {
Known = KnownBits::mul(KnownOp0, KnownOp1);
-} else { // Op.getOpcode() is either ISD::ADD or ISD::SUB.
+} else { // Op.getOpcode() is either ISD::ADD, ISD::P
ritter-x2a wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/146074?utm_source=stack-comment-downstack-mergeability-warnin
ritter-x2a wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/146076?utm_source=stack-comment-downstack-mergeability-warnin
https://github.com/ritter-x2a created
https://github.com/llvm/llvm-project/pull/146075
If we can't fold a PTRADD's offset into its users, lowering them to
disjoint ORs is preferable: Often, a 32-bit OR instruction suffices
where we'd otherwise use a pair of 32-bit additions with carry.
This nee
ritter-x2a wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/146075?utm_source=stack-comment-downstack-mergeability-warnin
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/145330
>From 083ff661ca6f83339902ebb603a38d53a6f0a695 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Tue, 17 Jun 2025 04:03:53 -0400
Subject: [PATCH 1/2] [AMDGPU][SDAG] Handle ISD::PTRADD in various special
cas
https://github.com/ritter-x2a created
https://github.com/llvm/llvm-project/pull/146076
Also removes the command line option to control this feature.
There seem to be mainly two kinds of test changes:
- Some operands of addition instructions are swapped; that is to be expected
since PTRADD is
https://github.com/ritter-x2a created
https://github.com/llvm/llvm-project/pull/146074
This PR adds a TargetLowering hook, canTransformPtrArithOutOfBounds,
that targets can use to allow transformations to introduce out-of-bounds
pointer arithmetic. It also moves two such transformations from the
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143880
>From 604ad3d39fac13c1abec2b7db46d1e671d842399 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 06:13:26 -0400
Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns
Pr
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/145330
>From 083ff661ca6f83339902ebb603a38d53a6f0a695 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Tue, 17 Jun 2025 04:03:53 -0400
Subject: [PATCH 1/2] [AMDGPU][SDAG] Handle ISD::PTRADD in various special
cas
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/145329
>From ee350dc005a6274b4a3114c85aeafa0d5e83806f Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Tue, 17 Jun 2025 03:51:19 -0400
Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143881
>From d2ca0b2c1b0d9bb3da82b3dfbf82b74ae2b3f978 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 07:44:37 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns
This patc
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/145329
>From ee350dc005a6274b4a3114c85aeafa0d5e83806f Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Tue, 17 Jun 2025 03:51:19 -0400
Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143880
>From 604ad3d39fac13c1abec2b7db46d1e671d842399 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 06:13:26 -0400
Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns
Pr
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143881
>From d2ca0b2c1b0d9bb3da82b3dfbf82b74ae2b3f978 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 07:44:37 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns
This patc
@@ -615,8 +615,14 @@ bool TargetLowering::ShrinkDemandedOp(SDValue Op, unsigned
BitWidth,
// operands on the new node are also disjoint.
SDNodeFlags Flags(Op->getFlags().hasDisjoint() ? SDNodeFlags::Disjoint
: SD
@@ -2230,7 +2230,7 @@ bool AMDGPUDAGToDAGISel::SelectSMRDBaseOffset(SDValue
Addr, SDValue &SBase,
SDValue N0, N1;
// Extract the base and offset if possible.
- if (CurDAG->isBaseWithConstantOffset(Addr) || Addr.getOpcode() == ISD::ADD) {
+ if (CurDAG->isBaseWithConstant
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/145330
>From e823a0ddaab0292a1864f7f11f6ec182e4392055 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Tue, 17 Jun 2025 04:03:53 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases
T
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/145329
>From 2fb216fdfda86a9555981f2c729a00c4ee1e1ba7 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Tue, 17 Jun 2025 03:51:19 -0400
Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143881
>From f8fbb5733c03f68f8ff12401e0ff3468bf392027 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 07:44:37 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns
This patc
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143880
>From 2d2b48ce3f9749a0b88b71e4f8e33e9a68adf365 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 06:13:26 -0400
Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns
Pr
ritter-x2a wrote:
### Merge activity
* **Jun 26, 7:27 AM UTC**: A user started a stack merge that includes this pull
request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/143672).
https://github.com/llvm/llvm-project/pull/143672
_
ritter-x2a wrote:
### Merge activity
* **Jun 26, 7:27 AM UTC**: A user started a stack merge that includes this pull
request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/142778).
https://github.com/llvm/llvm-project/pull/142778
_
ritter-x2a wrote:
### Merge activity
* **Jun 26, 7:27 AM UTC**: A user started a stack merge that includes this pull
request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/142777).
https://github.com/llvm/llvm-project/pull/142777
_
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/145329
>From 7c9ac3cdc769e989d87296bfa8998434d6611045 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Tue, 17 Jun 2025 03:51:19 -0400
Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/145330
>From 286252e31314dd852ef854918068f1ca0023023c Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Tue, 17 Jun 2025 04:03:53 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases
T
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142778
>From d6f5395374f9bef864b0442f8fc62ba260910bdd Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:48:02 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in
SelectionDAGAddressAnaly
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143672
>From 74777534d4ee80311ee342af11b4d5a87564f137 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 11 Jun 2025 05:14:34 -0400
Subject: [PATCH] [AMDGPU][SDAG] Tests for target-specific ISD::PTRADD combines
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142777
>From ade6820ff56d755a7155cd170d7b1ebf24bc8aef Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:30:34 -0400
Subject: [PATCH] [AMDGPU][SDAG] Add test for ISD::PTRADD handling in
Selection
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143673
>From 91bd709f8f7b0f8a05578bd1291295b5a8d1b6c1 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 11 Jun 2025 05:48:45 -0400
Subject: [PATCH] [AMDGPU][SDAG] Add target-specific ISD::PTRADD combines
This
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143880
>From cab9968daf80e744a1a2e688ef050e519599db18 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 06:13:26 -0400
Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns
Pr
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143881
>From 71346e57396657e86898f1177339c0a7897422ac Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 07:44:37 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns
This patc
@@ -119,23 +119,17 @@ define void @msubpt1(i32 %index, i32 %elem) {
; CHECK-CPA-O0: // %bb.0: // %entry
; CHECK-CPA-O0-NEXT:// implicit-def: $x8
; CHECK-CPA-O0-NEXT:mov w8, w0
-; CHECK-CPA-O0-NEXT:sxtw x9, w8
-; CHECK-CPA-O0-NEXT:mov x8, xzr
-; CHECK-CPA-O
https://github.com/ritter-x2a ready_for_review
https://github.com/llvm/llvm-project/pull/145330
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/ritter-x2a ready_for_review
https://github.com/llvm/llvm-project/pull/145329
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -119,23 +119,17 @@ define void @msubpt1(i32 %index, i32 %elem) {
; CHECK-CPA-O0: // %bb.0: // %entry
; CHECK-CPA-O0-NEXT:// implicit-def: $x8
; CHECK-CPA-O0-NEXT:mov w8, w0
-; CHECK-CPA-O0-NEXT:sxtw x9, w8
-; CHECK-CPA-O0-NEXT:mov x8, xzr
-; CHECK-CPA-O
https://github.com/ritter-x2a edited
https://github.com/llvm/llvm-project/pull/142739
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
ritter-x2a wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/145330?utm_source=stack-comment-downstack-mergeability-warnin
ritter-x2a wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/145329?utm_source=stack-comment-downstack-mergeability-warnin
https://github.com/ritter-x2a created
https://github.com/llvm/llvm-project/pull/145330
There are more places in SIISelLowering.cpp and AMDGPUISelDAGToDAG.cpp
that check for ISD::ADD in a pointer context, but as far as I can tell
those are only relevant for 32-bit pointer arithmetic (like frame
i
https://github.com/ritter-x2a created
https://github.com/llvm/llvm-project/pull/145329
Pre-committing tests to show improvements in a follow-up PR.
>From 53a1700bbb7d51d894031bf5c53a9e238d07becc Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Tue, 17 Jun 2025 03:51:19 -0400
Subject: [PATCH]
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142778
>From 86aa8687492e1a1dcfd20654e07c53c638b1 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:48:02 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in
SelectionDAGAddressAnaly
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142739
>From f8aa9d23e4a70e3155d19b0ad0e209b47866aab9 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 03:32:32 -0400
Subject: [PATCH 1/7] [AMDGPU][SDAG] Add ISD::PTRADD DAG combines
This patch fo
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142739
>From f8aa9d23e4a70e3155d19b0ad0e209b47866aab9 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 03:32:32 -0400
Subject: [PATCH 1/7] [AMDGPU][SDAG] Add ISD::PTRADD DAG combines
This patch fo
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143880
>From 3873d1a4be3dce63b923cd926701f4542842472c Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 06:13:26 -0400
Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns
Pr
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142777
>From 510b3074fe44b604f9c44c438075306d0d533606 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:30:34 -0400
Subject: [PATCH] [AMDGPU][SDAG] Add test for ISD::PTRADD handling in
Selection
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142777
>From 510b3074fe44b604f9c44c438075306d0d533606 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:30:34 -0400
Subject: [PATCH] [AMDGPU][SDAG] Add test for ISD::PTRADD handling in
Selection
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142778
>From 86aa8687492e1a1dcfd20654e07c53c638b1 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:48:02 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in
SelectionDAGAddressAnaly
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143672
>From ee92e376ca004da16f3683ede1de06d3e370d963 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 11 Jun 2025 05:14:34 -0400
Subject: [PATCH] [AMDGPU][SDAG] Tests for target-specific ISD::PTRADD combines
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143881
>From 40319e7037d2057afb4d8814f1c897b85968532e Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 07:44:37 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns
This patc
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143881
>From 40319e7037d2057afb4d8814f1c897b85968532e Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 07:44:37 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns
This patc
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143673
>From 17e45843d6909ce14269f9e3bb796be4f890b120 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 11 Jun 2025 05:48:45 -0400
Subject: [PATCH] [AMDGPU][SDAG] Add target-specific ISD::PTRADD combines
This
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143880
>From 3873d1a4be3dce63b923cd926701f4542842472c Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 06:13:26 -0400
Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns
Pr
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143672
>From ee92e376ca004da16f3683ede1de06d3e370d963 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 11 Jun 2025 05:14:34 -0400
Subject: [PATCH] [AMDGPU][SDAG] Tests for target-specific ISD::PTRADD combines
@@ -2628,6 +2630,87 @@ SDValue DAGCombiner::foldSubToAvg(SDNode *N, const SDLoc
&DL) {
return SDValue();
}
+/// Try to fold a pointer arithmetic node.
+/// This needs to be done separately from normal addition, because pointer
+/// addition is not commutative.
+SDValue DAGC
@@ -14944,6 +14945,51 @@ SDValue SITargetLowering::performAddCombine(SDNode *N,
return SDValue();
}
+SDValue SITargetLowering::performPtrAddCombine(SDNode *N,
+ DAGCombinerInfo &DCI) const {
+ SelectionDAG &DAG = DCI.DAG;
+ SDL
@@ -14944,6 +14945,51 @@ SDValue SITargetLowering::performAddCombine(SDNode *N,
return SDValue();
}
+SDValue SITargetLowering::performPtrAddCombine(SDNode *N,
+ DAGCombinerInfo &DCI) const {
+ SelectionDAG &DAG = DCI.DAG;
+ SDL
@@ -2628,6 +2630,87 @@ SDValue DAGCombiner::foldSubToAvg(SDNode *N, const SDLoc
&DL) {
return SDValue();
}
+/// Try to fold a pointer arithmetic node.
+/// This needs to be done separately from normal addition, because pointer
+/// addition is not commutative.
+SDValue DAGC
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143881
>From 46090a8031fde937a76268ce7adbbdc6f42911ad Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 07:44:37 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns
This patc
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143880
>From 3f69917b67760c64fdafcb42b5783b8aaafb1406 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 06:13:26 -0400
Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns
Pr
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143673
>From 10494be4478143e69a6116653228170195c00dc2 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 11 Jun 2025 05:48:45 -0400
Subject: [PATCH] [AMDGPU][SDAG] Add target-specific ISD::PTRADD combines
This
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143672
>From ac6d5eb285b1f56b5c32133279224feb2b8bd8a9 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 11 Jun 2025 05:14:34 -0400
Subject: [PATCH] [AMDGPU][SDAG] Tests for target-specific ISD::PTRADD combines
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142778
>From af2d3ea3a17b2d7eec54fcf030ff89a1a0422e5a Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:48:02 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in
SelectionDAGAddressAnaly
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142777
>From e8eccce3f9221dd52f15341873b03f220ef84739 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:30:34 -0400
Subject: [PATCH] [AMDGPU][SDAG] Add test for ISD::PTRADD handling in
Selection
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142739
>From 6ea714e83e4714d9fe025e5e9fee48b41f223cb8 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 03:32:32 -0400
Subject: [PATCH 1/6] [AMDGPU][SDAG] Add ISD::PTRADD DAG combines
This patch fo
@@ -2628,6 +2630,87 @@ SDValue DAGCombiner::foldSubToAvg(SDNode *N, const SDLoc
&DL) {
return SDValue();
}
+/// Try to fold a pointer arithmetic node.
+/// This needs to be done separately from normal addition, because pointer
+/// addition is not commutative.
+SDValue DAGC
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142738
>From 5c8ab8ccceedf0d864e9ba8b839b779d0f408f7b Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Tue, 3 Jun 2025 09:49:19 -0400
Subject: [PATCH 1/2] [AMDGPU][SDAG] Add tests for ISD::PTRADD DAG combines
Pre
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143673
>From 7eb2283f214e29022a5d580fb1bfa6d2effc9c4c Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 11 Jun 2025 05:48:45 -0400
Subject: [PATCH] [AMDGPU][SDAG] Add target-specific ISD::PTRADD combines
This
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143880
>From 69fddba7ea92c1dc4542dafaad1ea72ba4ce592c Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 06:13:26 -0400
Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns
Pr
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143673
>From 7eb2283f214e29022a5d580fb1bfa6d2effc9c4c Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 11 Jun 2025 05:48:45 -0400
Subject: [PATCH] [AMDGPU][SDAG] Add target-specific ISD::PTRADD combines
This
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142777
>From 5df6cfa5619d18767ed610fb594882804b09d59c Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:30:34 -0400
Subject: [PATCH] [AMDGPU][SDAG] Add test for ISD::PTRADD handling in
Selection
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142739
>From c7aea91592109a305725bfd6cf0d60f939c5433e Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 03:32:32 -0400
Subject: [PATCH 1/5] [AMDGPU][SDAG] Add ISD::PTRADD DAG combines
This patch fo
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142738
>From d38f4e6bbd8894cdfd0b84b2f677cc8a6d742c6a Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Tue, 3 Jun 2025 09:49:19 -0400
Subject: [PATCH 1/2] [AMDGPU][SDAG] Add tests for ISD::PTRADD DAG combines
Pre
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142739
>From c7aea91592109a305725bfd6cf0d60f939c5433e Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 03:32:32 -0400
Subject: [PATCH 1/5] [AMDGPU][SDAG] Add ISD::PTRADD DAG combines
This patch fo
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143672
>From a448f7ed1c303cf5878d975f2bbe6cb1f7b175fc Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 11 Jun 2025 05:14:34 -0400
Subject: [PATCH] [AMDGPU][SDAG] Tests for target-specific ISD::PTRADD combines
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143880
>From 69fddba7ea92c1dc4542dafaad1ea72ba4ce592c Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 06:13:26 -0400
Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns
Pr
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142778
>From 9e215a2d5b7411bd77b6745734b316c7306924af Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:48:02 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in
SelectionDAGAddressAnaly
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143881
>From 860123fb50e6b9d4a772c350873507e7faaa1f71 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 07:44:37 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns
This patc
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143881
>From 860123fb50e6b9d4a772c350873507e7faaa1f71 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 07:44:37 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns
This patc
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142777
>From 5df6cfa5619d18767ed610fb594882804b09d59c Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:30:34 -0400
Subject: [PATCH] [AMDGPU][SDAG] Add test for ISD::PTRADD handling in
Selection
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142738
>From d38f4e6bbd8894cdfd0b84b2f677cc8a6d742c6a Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Tue, 3 Jun 2025 09:49:19 -0400
Subject: [PATCH 1/2] [AMDGPU][SDAG] Add tests for ISD::PTRADD DAG combines
Pre
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142778
>From 9e215a2d5b7411bd77b6745734b316c7306924af Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:48:02 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in
SelectionDAGAddressAnaly
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143672
>From a448f7ed1c303cf5878d975f2bbe6cb1f7b175fc Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 11 Jun 2025 05:14:34 -0400
Subject: [PATCH] [AMDGPU][SDAG] Tests for target-specific ISD::PTRADD combines
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143880
>From 78abf559c52c400cbd651fc8aa9fc39262a3eb32 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 06:13:26 -0400
Subject: [PATCH] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns
Pr
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142778
>From 988d35661fa027271d55cc95131ece66f53c90f0 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:48:02 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in
SelectionDAGAddressAnaly
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142778
>From 988d35661fa027271d55cc95131ece66f53c90f0 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:48:02 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in
SelectionDAGAddressAnaly
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143881
>From b919098ad59718c1b5e642b458705e765c525d48 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Thu, 12 Jun 2025 07:44:37 -0400
Subject: [PATCH] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns
This patc
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142777
>From c0eab936e1cab87636ae7c676d7232948cc35aef Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:30:34 -0400
Subject: [PATCH] [AMDGPU][SDAG] Add test for ISD::PTRADD handling in
Selection
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143672
>From 37747657c81cc49feb345810b792f01e35d28511 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 11 Jun 2025 05:14:34 -0400
Subject: [PATCH] [AMDGPU][SDAG] Tests for target-specific ISD::PTRADD combines
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142777
>From c0eab936e1cab87636ae7c676d7232948cc35aef Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:30:34 -0400
Subject: [PATCH] [AMDGPU][SDAG] Add test for ISD::PTRADD handling in
Selection
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/143673
>From 50de6e085242ce975af812088f4ef48896444fb6 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 11 Jun 2025 05:48:45 -0400
Subject: [PATCH] [AMDGPU][SDAG] Add target-specific ISD::PTRADD combines
This
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142739
>From 3002da1befde734af1904d3424abd72b65f1377b Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 03:32:32 -0400
Subject: [PATCH 1/5] [AMDGPU][SDAG] Add ISD::PTRADD DAG combines
This patch fo
1 - 100 of 319 matches
Mail list logo
