[llvm-branch-commits] [llvm] 4bf07e1 - BOLT Release Notes

Author: Amir Ayupov Date: 2023-08-10T09:14:47+02:00 New Revision: 4bf07e1365e1c727b8125f2e55644e8a96a84208 URL: https://github.com/llvm/llvm-project/commit/4bf07e1365e1c727b8125f2e55644e8a96a84208 DIFF: https://github.com/llvm/llvm-project/commit/4bf07e1365e1c727b8125f2e55644e8a96a84208.diff L

[llvm-branch-commits] [mlir] 2c5ed2d - [mlir][gpu] NFC - Fail gracefully when type conversion fails instead of crashing

Author: Nicolas Vasilache Date: 2023-08-10T09:06:20+02:00 New Revision: 2c5ed2da4fb464e144e580ea294049db630b64ea URL: https://github.com/llvm/llvm-project/commit/2c5ed2da4fb464e144e580ea294049db630b64ea DIFF: https://github.com/llvm/llvm-project/commit/2c5ed2da4fb464e144e580ea294049db630b64ea.d

[llvm-branch-commits] [mlir] 3e62997 - [mlir] Fix arith verifier for tensor with encoding

Author: Thomas Raoux Date: 2023-08-10T09:06:20+02:00 New Revision: 3e62997c4c0fb48ce43496be80013dbf98b96a6e URL: https://github.com/llvm/llvm-project/commit/3e62997c4c0fb48ce43496be80013dbf98b96a6e DIFF: https://github.com/llvm/llvm-project/commit/3e62997c4c0fb48ce43496be80013dbf98b96a6e.diff

[llvm-branch-commits] [mlir] 6664b6e - [mlir][LLVMIR] Fix identified structs with same name

Author: Alexis Engelke Date: 2023-08-10T09:06:20+02:00 New Revision: 6664b6e980fdfcb594e4f3745601b61cc58e07ae URL: https://github.com/llvm/llvm-project/commit/6664b6e980fdfcb594e4f3745601b61cc58e07ae DIFF: https://github.com/llvm/llvm-project/commit/6664b6e980fdfcb594e4f3745601b61cc58e07ae.diff

[llvm-branch-commits] [mlir] fc209e4 - [mlir-lsp] Guard writing output to JSONTransport with mutex

Author: River Riddle Date: 2023-08-10T09:06:20+02:00 New Revision: fc209e4158ccbe383baf7cd6bcba1605e4d3d01b URL: https://github.com/llvm/llvm-project/commit/fc209e4158ccbe383baf7cd6bcba1605e4d3d01b DIFF: https://github.com/llvm/llvm-project/commit/fc209e4158ccbe383baf7cd6bcba1605e4d3d01b.diff

[llvm-branch-commits] [mlir] 685bcc1 - [mlir:bytecode] Only visit the all regions path if the op has regions

Author: River Riddle Date: 2023-08-10T09:06:20+02:00 New Revision: 685bcc1d732a929e6ad92d63f5f3368726e7830c URL: https://github.com/llvm/llvm-project/commit/685bcc1d732a929e6ad92d63f5f3368726e7830c DIFF: https://github.com/llvm/llvm-project/commit/685bcc1d732a929e6ad92d63f5f3368726e7830c.diff

[llvm-branch-commits] [mlir] 99b39d7 - [mlir:bytecode] Support lazy loading dynamically isolated regions

Author: River Riddle Date: 2023-08-10T09:06:20+02:00 New Revision: 99b39d7df62365d5c0c1fad776b4fd3b0e452277 URL: https://github.com/llvm/llvm-project/commit/99b39d7df62365d5c0c1fad776b4fd3b0e452277 DIFF: https://github.com/llvm/llvm-project/commit/99b39d7df62365d5c0c1fad776b4fd3b0e452277.diff

[llvm-branch-commits] [mlir] 45a4a13 - [mlir:bytecode] Fix bytecode lazy loading for ops with multiple regions

Author: River Riddle Date: 2023-08-10T09:06:20+02:00 New Revision: 45a4a1371b7e0c17532a856c6112a8f4e4b288f2 URL: https://github.com/llvm/llvm-project/commit/45a4a1371b7e0c17532a856c6112a8f4e4b288f2 DIFF: https://github.com/llvm/llvm-project/commit/45a4a1371b7e0c17532a856c6112a8f4e4b288f2.diff

[llvm-branch-commits] [mlir] 6b3e6a9 - Add release notes for MLIR

Author: Mehdi Amini Date: 2023-08-10T09:06:20+02:00 New Revision: 6b3e6a9db7c3f04e9199caad340a094ab21e67b2 URL: https://github.com/llvm/llvm-project/commit/6b3e6a9db7c3f04e9199caad340a094ab21e67b2 DIFF: https://github.com/llvm/llvm-project/commit/6b3e6a9db7c3f04e9199caad340a094ab21e67b2.diff L

[llvm-branch-commits] [mlir] a50e3a6 - [mlir] Fix assembly format parser generator after 9ea6b30ac20f8223fb6aeae853e5c73691850a8d.

Author: Oleg Shyshkov Date: 2023-08-10T09:06:20+02:00 New Revision: a50e3a66b991130824ebcbb86f5225be36eb62fe URL: https://github.com/llvm/llvm-project/commit/a50e3a66b991130824ebcbb86f5225be36eb62fe DIFF: https://github.com/llvm/llvm-project/commit/a50e3a66b991130824ebcbb86f5225be36eb62fe.diff

[llvm-branch-commits] [mlir] f71f8c9 - [mlir][spirv] Do not introduce vector<1xT> in UnifyAliasedResource

Author: Jakub Kuderski Date: 2023-08-10T09:06:20+02:00 New Revision: f71f8c923ae985abfddcc7e9feba1d3002431e5e URL: https://github.com/llvm/llvm-project/commit/f71f8c923ae985abfddcc7e9feba1d3002431e5e DIFF: https://github.com/llvm/llvm-project/commit/f71f8c923ae985abfddcc7e9feba1d3002431e5e.diff

[llvm-branch-commits] [llvm] f9e9adf - [CodeGen] Fix incorrect pattern FMLA_* pseudo instructions

Author: Igor Kirillov Date: 2023-08-10T09:04:50+02:00 New Revision: f9e9adf9b90db8a646fc67154a33e0edf0b37e10 URL: https://github.com/llvm/llvm-project/commit/f9e9adf9b90db8a646fc67154a33e0edf0b37e10 DIFF: https://github.com/llvm/llvm-project/commit/f9e9adf9b90db8a646fc67154a33e0edf0b37e10.diff

[llvm-branch-commits] [llvm] 7832b42 - [CodeGen] Disable FP LD1RX instructions generation for Neoverse-V1

Author: Igor Kirillov Date: 2023-08-10T09:05:30+02:00 New Revision: 7832b42073d61d598be98b43d5896f578bfc3950 URL: https://github.com/llvm/llvm-project/commit/7832b42073d61d598be98b43d5896f578bfc3950 DIFF: https://github.com/llvm/llvm-project/commit/7832b42073d61d598be98b43d5896f578bfc3950.diff

[llvm-branch-commits] [clang] 8fb604f - Reland "Try to implement lambdas with inalloca parameters by forwarding without use of inallocas."t

Author: Amy Huang Date: 2023-08-10T09:05:22+02:00 New Revision: 8fb604fcd36019dc2982fea86a14efe7b3a71773 URL: https://github.com/llvm/llvm-project/commit/8fb604fcd36019dc2982fea86a14efe7b3a71773 DIFF: https://github.com/llvm/llvm-project/commit/8fb604fcd36019dc2982fea86a14efe7b3a71773.diff LOG

[llvm-branch-commits] [llvm] e69c715 - [llvm-exegesis] Don't try to use SYS_rseq if it's not defined.

Author: Guillaume Chatelet Date: 2023-08-10T09:05:06+02:00 New Revision: e69c715c39f05ed2d9ceedaf71feeb61e0c142ef URL: https://github.com/llvm/llvm-project/commit/e69c715c39f05ed2d9ceedaf71feeb61e0c142ef DIFF: https://github.com/llvm/llvm-project/commit/e69c715c39f05ed2d9ceedaf71feeb61e0c142ef.

[llvm-branch-commits] [llvm] 9206f9e - [CodeGen] Precommit tests for D157095

Author: Igor Kirillov Date: 2023-08-10T09:04:50+02:00 New Revision: 9206f9ed9cd5a0ce1bee73d80010da20c2807559 URL: https://github.com/llvm/llvm-project/commit/9206f9ed9cd5a0ce1bee73d80010da20c2807559 DIFF: https://github.com/llvm/llvm-project/commit/9206f9ed9cd5a0ce1bee73d80010da20c2807559.diff

[llvm-branch-commits] [llvm] 67bb3ea - [CodeGen] Pre-commit tests showing incorrect pattern FMLA_* pseudo instructions

Author: Igor Kirillov Date: 2023-08-10T09:04:50+02:00 New Revision: 67bb3ea8b81704635196e3d351d37cd6be1890c6 URL: https://github.com/llvm/llvm-project/commit/67bb3ea8b81704635196e3d351d37cd6be1890c6 DIFF: https://github.com/llvm/llvm-project/commit/67bb3ea8b81704635196e3d351d37cd6be1890c6.diff

[llvm-branch-commits] [lldb] bc0a7de - [lldb][AArch64] Save/restore TLS registers around expressions

Author: David Spickett Date: 2023-08-10T09:04:42+02:00 New Revision: bc0a7de379e6c2540a551d7ca6ba2cf733347a3f URL: https://github.com/llvm/llvm-project/commit/bc0a7de379e6c2540a551d7ca6ba2cf733347a3f DIFF: https://github.com/llvm/llvm-project/commit/bc0a7de379e6c2540a551d7ca6ba2cf733347a3f.diff

[llvm-branch-commits] [llvm] 0103143 - [lldb][AArch64] Add reading of TLS tpidr register from core files

Author: David Spickett Date: 2023-08-10T09:04:42+02:00 New Revision: 010314325a1469911d4be2b5b7cdb8931b984861 URL: https://github.com/llvm/llvm-project/commit/010314325a1469911d4be2b5b7cdb8931b984861 DIFF: https://github.com/llvm/llvm-project/commit/010314325a1469911d4be2b5b7cdb8931b984861.diff