Just a small update. I did create the class AddressBase. Class Address
inherits from it. When I compare it with my first implementation, it's
cleaner than the additional argument in API. I also implemented all
operators to the class AddressBase, so it behaves like addr_t if you're
not intereste
As an FYI - this is another way of looking at Address spaces.. I like the word
“Route” to the memory space, i think it defines the problem better.
All Armv8 chips effectively have - multiple address available to the debugger
For instance, a JTAG debugger halts an ARMV8 cpu core, and the core hal
You can conceptually take this a step further. I used to work at Freescale, and
supported SoCs with multiple heterogeneous cores. I provided memory spaces that
let the user access these memory views:
- DCSR (debug memory, a separate bus) through the SoC
- CCSR (memory mapped config registers) th
>> cache view
Debugging cache problems is always fun, being able to do this is very helpful.
>> You can conceptually take this a step further.
This is exactly my point, these would be in a “target specific” range of prefix
names
When specifying an address, there should be some set of “
