Re: [lldb-dev] Layout of FXSAVE struct for x86 Architectures in LLDB

2015-09-24 Thread Todd Fiala via lldb-dev
I'm using this doc: http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf In table 10-2, and again in 13-1, it does appear to call out the most significant byte as reserved (byte 5). As do the instruction details. Looking

[lldb-dev] Layout of FXSAVE struct for x86 Architectures in LLDB

2015-09-24 Thread Abhishek Aggarwal via lldb-dev
Hi all I was looking into the file "source/Plugins/Process/Utility/RegisterContext_x86.h" and I noticed one thing in FXSAVE structure. The 'ftag' is defined as a 16 bit field. However, on referring to Architecture Software Developer Manual for x86 architectures, one can see that the memory layout