omjavaid updated this revision to Diff 75103.
omjavaid added a comment.
Sorry I was on Holiday so couldnt get back to this earlier.
I ll get back to your comments about GDB packet sequence in a separate thread
after collecting further information.
I have made the suggested corrections in above
This revision was automatically updated to reflect the committed changes.
Closed by commit rL284706: Fix ARM/AArch64 Step-Over watchpoint issue remove
provision for duplicate… (authored by omjavaid).
Changed prior to commit:
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omjavaid added a comment.
Although this patch fixes the test case in question but in theory EphemeralMode
watchpoint enable/disable cycles should be independent of step-over watchpoint
enable disable cycle.
On gdb-remote type targets we only update hardware_watch_id when a watchpoint
is hit so
omjavaid abandoned this revision.
omjavaid added a comment.
There is not exact solution that satisfies all corner cases. Abandoning for now
until I come up with a solution that covers us from all corners.
https://reviews.llvm.org/D24610
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omjavaid updated this revision to Diff 37748.
omjavaid added a comment.
This patch fixes unexpected behaviour of watchpoint code on Nexus 9 (AArch64).
http://reviews.llvm.org/D12522
Files:
source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
Index: source/Plugins/Process/Linux/N
This revision was automatically updated to reflect the committed changes.
Closed by commit rL250700: Fix for random watchpoint testsuite failures on
AArch64 targets. (authored by omjavaid).
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Arm watchpoint handlers incorrectly updates watchpoint cache incase we have a
ptrace failures.
This patch fixes this issue by
This revision was automatically updated to reflect the committed changes.
Closed by commit rL251386: Fix for Arm watchpoint cache corruption in case of
ptrace failure (authored by omjavaid).
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ht
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This patch disables forcing -marm (A32 instruction set) while running lldb
testsuite on arm targets.
gcc uses -marm and -mthum
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omjavaid added a comment.
-mthumb will force T32 instruction set while -marm will force A32.
Best is not to use any of these flags to let the compiler decide best
possible instruction set combination.
http://reviews.llvm.org/D14816
_
omjavaid added a comment.
-mthumb and -marm are compiler flags so we can put these into our CXX or CFLAGS
if we need to run those configurations.
http://reviews.llvm.org/D14823
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omjavaid added a comment.
I agree with you on having multiple configuration options to help identify
failures in different configurations.
What I mean is that we should keep clarity on architecture that is to use arm
or aarch32 for 32bit and aarch64 for 64bit. With that we should run tests in
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running testsuite on arm… (authored by omjavaid).
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omjavaid added a comment.
Some minor typos inline comments.
I havnt applied nd tested this patch. Are you able to read these registers, i
guess you need to generate neon or vfp code to test all registers properly.
There no arm register test to my knowledge currently in testsuite we can put
thi
omjavaid accepted this revision.
omjavaid added a comment.
LGTM
http://reviews.llvm.org/D14985
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This patch adds required correction in TestFrames.py for arm targets in thumb
mode.
On arm hardware thumb mode is identified by setting
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This patch updates GetAsUnsigned(), GetAsSigned(), and GetAsDouble() JSONNumber
functions to add failure check.
The previous code was generating compiler warnings for not being able
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Following changes remove conditions where an unsigned integer is being tested
to be greater or equal to zero.
These conditions will alw
omjavaid requested changes to this revision.
omjavaid added a comment.
This revision now requires changes to proceed.
Please see inline comments.
Comment at: source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp:149
@@ +148,3 @@
+{
+spec.SetTr
omjavaid added a comment.
@sas
Ideally it should be thumb-* if an environment is thumb only but lldb right now
has some areas where we need to handle this case.
Either you put arm-* and leave it for someone else to correct the problems or
put thumb-* and fix the issues that come up after that.
omjavaid added a comment.
In case of ELF .arm attributes contains tags providing information on
underlying CPU specification used. Thats only for the inferior being debugged
but actually knowing which target we are running on, like for example if we
want to figure out if we are running on a arm
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This patch makes sure that we are using correct target specific ar and objcopy
executables.
I have added
omjavaid accepted this revision.
omjavaid added a comment.
Seems to be causing no regressions on arm-linux.
http://reviews.llvm.org/D20368
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This patch takes a few corrective measures to make sure we display meaningful
reason against a watchpoint creation failure.
This
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This patch adds logic to make sure we can install watchpoints at 1,2 and 4 byte
alligned addresses.
ptrace
omjavaid added a comment.
In http://reviews.llvm.org/D21280#457196, @labath wrote:
> The overall change looks good, but please also add a test which specifically
> tests for watchpoints at unaligned addresses. Last time I checked, we all
> watchpoint tests were passing (at least on android) eve
omjavaid updated this revision to Diff 60942.
omjavaid added a comment.
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I have added a test cases that tests all possibilities supported by current
configuration.
Tests pass on Nexus 9 and aarch64-linux-gnu (hikey board).
LGTM?
http://reviews.llvm.org/D2128
omjavaid marked 3 inline comments as done.
Comment at:
packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/TestWatchpointSizes.py:104
@@ +103,3 @@
+self.expect("watchpoint list -v",
+substrs = ['hit_count = 2'])
+
This revision was automatically updated to reflect the committed changes.
Closed by commit rL272916: Allow installing watchpoints at less than 8-byte
alligned addresses for… (authored by omjavaid).
Changed prior to commit:
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omjavaid added a comment.
@clayborg
Any comments about this change? Thanks!
http://reviews.llvm.org/D21164
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We recently committed a patch for AArch64 targets that allows us to watch any
byte address individually in a
This revision was automatically updated to reflect the committed changes.
Closed by commit rL273863: Allow unaligned byte/word selection watchpoints for
arm- linux/android targets. (authored by omjavaid).
Changed prior to commit:
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Repository:
omjavaid added inline comments.
Comment at: source/Target/Target.cpp:714
@@ -713,2 +713,3 @@
{
uint32_t num_current_watchpoints =
target->GetWatchpointList().GetSize();
+if (num_supported_hardware_watchpoints == 0)
clayborg wrote:
> This log
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Closed by commit rL273869: Improve watchpoint error reporting specially for
arm/aarch64 targets (authored by omjavaid).
Changed prior to commit:
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This patch allows correct selection of CMAKE_LIBRARY_ARCHITECTURE instead of
previously hard-coded value.
All cross builds for 64bit t
omjavaid added a comment.
I am going ahead and committing this patch. If it breaks any build please
revert it.
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https://reviews.llvm.org/D22771
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Closed by commit rL276814: Fix LLDBConfig.cmake to enable python enabled build
for all 64 bit lldb targets (authored by omjavaid).
Changed prior to commit:
https://reviews.llvm.org/D22771?vs=65397&id=65612#toc
Repository
omjavaid updated this revision to Diff 66258.
omjavaid added a comment.
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Sorry about the delay updating this. I lost track of this rev earlier.
Have updated diff to use macro already present within Android specific block
for all cases.
Tested with no regress
This revision was automatically updated to reflect the committed changes.
Closed by commit rL277429: Correct makefile.rules to use toolchain specific AR
and OBJCOPY (authored by omjavaid).
Changed prior to commit:
https://reviews.llvm.org/D20386?vs=66258&id=66438#toc
Repository:
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omjavaid removed rL LLVM as the repository for this revision.
omjavaid updated this revision to Diff 67228.
omjavaid added a comment.
I have updated previous patch which handles compiler binaries which have
version string appended at the end like gcc-4.9 or clang-3.5.
Kindly give it a review and
omjavaid reopened this revision.
omjavaid added a comment.
reopening this for new review.
https://reviews.llvm.org/D20386
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omjavaid updated this revision to Diff 67229.
omjavaid added a comment.
Adding context.
https://reviews.llvm.org/D20386
Files:
packages/Python/lldbsuite/test/make/Makefile.rules
Index: packages/Python/lldbsuite/test/make/Makefile.rules
omjavaid added inline comments.
Comment at: packages/Python/lldbsuite/test/make/Makefile.rules:304
@@ +303,3 @@
+ $(subst $(3),$(1),$(2)), \
+ $(if $(findstring ar,$(1)), \
+$(if $(findstring gcc,$(3)), \
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LldbGdbServerTestCase.test_software_breakpoint_set* are failing when breakpoint
target address is an thumb16 instruction.
Test ri
omjavaid updated this revision to Diff 67669.
omjavaid added a comment.
Herald added a subscriber: srhines.
Updated with suggestion incorporated.
Here's what I am getting on different inputs:
Testing make clean CC=gcc
ar
objcopy
Testing make clean CC=clang
ar
objcopy
Testing make clean CC=gcc-
This revision was automatically updated to reflect the committed changes.
Closed by commit rL278326: Make sure LldbGdbServerTestCase is built in arm mode
to avoid failures due… (authored by omjavaid).
Changed prior to commit:
https://reviews.llvm.org/D23395?vs=67663&id=67670#toc
Repository:
omjavaid added a comment.
I like your suggestions and I dont think we have any other way but to use
preset environment variable to detect what kind of TOOLCHAIN we want to use
apart from some standard cases where we have the ability to detect through
proposed hack logic.
I agree we should have
omjavaid updated this revision to Diff 68339.
omjavaid added a comment.
so I have used ?= now with following new changes
OBJCOPY ?= $(call replace_cc_with,objcopy)
ARCHIVER ?= $(call replace_cc_with,ar)
override AR = $(ARCHIVER)
https://reviews.llvm.org/D20386
Files:
packages/Python/ll
This revision was automatically updated to reflect the committed changes.
Closed by commit rL278947: Correct makefile.rules to use arm/aarch64 target
specific AR and OBJCOPY (authored by omjavaid).
Changed prior to commit:
https://reviews.llvm.org/D20386?vs=68339&id=68374#toc
Repository:
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omjavaid added a comment.
comments inline.
Comment at:
packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/TestWatchpointSizes.py:43
@@ -42,2 +42,3 @@
"""Test to selectively watch different bytes in a 8-byte array."""
-self.run_watchpoint_
omjavaid updated this revision to Diff 71633.
omjavaid added a comment.
Herald added subscribers: srhines, danalbert, tberghammer.
I have added a new test case that tests suggested scnario without changing any
previous test cases.
Also I have made sure we re validate all watchpoint installed on
omjavaid added a comment.
Answers to comments. I will upload a updated patch after corrections and
updates.
Comment at:
packages/Python/lldbsuite/test/functionalities/watchpoint/multi_watchpoint_slots/main.c:23
@@ +22,3 @@
+{
+printf("About to write byteArray[%d] .
omjavaid updated this revision to Diff 72589.
omjavaid added a comment.
This is a new version of what seems to me fully implementing functionality we
intend to have here.
On a second thought nuking ClearHardwareWatchpoint function seems to be the
wrong approach here. I spent some time taking di
omjavaid updated this revision to Diff 72723.
omjavaid added a comment.
Give this approach a rethink I dont see a lot of problems with this final
implementation unless it fails on other architectures.
We are already hacking our way to have these byte selection watchpoints working
in existing cod
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On ARM Linux targets watchpoints are reported by PTrace before the instruction
causing watchpoi
omjavaid added a comment.
@labath Referring to your email on the mailing list.
Thanks for helping out with this work.
I think we should push this fix, as you suggested this does not fix everything
in a holistic way but it corrects the functionality that is currently available
right now with li
omjavaid abandoned this revision.
omjavaid added a comment.
Correction made upstream by @tberghammer.
http://reviews.llvm.org/D15355
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omjavaid added a comment.
Let the warnings stay for now.
http://reviews.llvm.org/D15357
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omjavaid updated this revision to Diff 42706.
omjavaid added a comment.
Sorry @tberghammer there was corruption in my setup showing changes which i
just made internally.
I have updated this diff as per suggestions.
LGTM?
http://reviews.llvm.org/D15355
Files:
include/lldb/Utility/JSON.h
s
This revision was automatically updated to reflect the committed changes.
Closed by commit rL255499: Add failure paths to a few JSONNumber members
(authored by omjavaid).
Changed prior to commit:
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http://reviews.llvm.or
This revision was automatically updated to reflect the committed changes.
Closed by commit rL255547: Correction in TestFrames.py test for arm targets in
thumb mode (authored by omjavaid).
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Repository:
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http:
omjavaid added a comment.
I am wondering whats the reason of replacing arm ptrace calls with aarch64
specific calls that use iovec parameters.
If arm calls can work then may be dont use aarch64 specific calls at all. If
they dont work kindly make relevant changes to
NativeRegisterContextLinux_
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This patch provides fix for the cases where an expression or jump tries to
update the value of PC in thumb mode.
As precaution
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Closed by commit rL256847: Fix for undefined behavior while updating PC value
on arm-linux (authored by omjavaid).
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http
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This patch adds a new expectedFailureArmLinux which marks arm-linux tests as
xfails.
Also marked a couple of failing tests to use expected
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omjavaid added a comment.
LGTM.
I think we should submit this patch as tberghammer explained.
http://reviews.llvm.org/D15533
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omjavaid updated this revision to Diff 44550.
omjavaid added a comment.
Removed expectedFailureArmLinux and updated expectedFailureLinux decorator to
reflect architecture if needed.
Marked some triaged failures as xfails on arm with updated expectedFailureLinux
decorator.
LGTM?
http://review
This revision was automatically updated to reflect the committed changes.
Closed by commit rL257405: Xfail some Arm-Linux specific failures (authored by
omjavaid).
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http://reviews.llvm.org/D1589
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This patch adds logic to detect if underlying binary is using arm hard float
abi and use that information while handling return
omjavaid accepted this revision.
omjavaid added a comment.
Looks good. Was there a test failing in testsuite due to this?
http://reviews.llvm.org/D16772
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omjavaid updated this revision to Diff 46620.
omjavaid marked 4 inline comments as done.
omjavaid added a comment.
Updated after addressing concerns.
LGTM?
http://reviews.llvm.org/D16627
Files:
include/lldb/Core/ArchSpec.h
source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp
source/Plugins/ABI/Sy
This revision was automatically updated to reflect the committed changes.
Closed by commit rL259885: Add support to detect arm hard float ABI based
binaries for ABISysV_arm (authored by omjavaid).
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Arm hard float ABI can use floating point registers for returning structures
containing all 4 or 8 byte floating point elements
omjavaid added inline comments.
Comment at: source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp:581-591
@@ -580,10 +580,13 @@
{
size_t byte_size = compiler_type.GetByteSize(&thread);
if (byte_size <= 4)
{
RegisterValue r0_reg_value;
omjavaid updated this revision to Diff 47191.
omjavaid added a comment.
updated diff after incorporating suggested corrections.
http://reviews.llvm.org/D16975
Files:
source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp
Index: source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp
===
omjavaid updated this revision to Diff 47198.
omjavaid added a comment.
Updated adding float_count check.
http://reviews.llvm.org/D16975
Files:
source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp
Index: source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp
=
omjavaid added a comment.
GDB doesnt use bkpt instruction for user debugging for the reason that it
interferes with jtag debug probes. I am not sure if LLDB will be ever used with
a jtag probe in near future but still a jtag prob might be connected to the
same hardware which is using LLDB to de
omjavaid added a comment.
Is this good to go ?
http://reviews.llvm.org/D16975
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omjavaid updated this revision to Diff 47625.
omjavaid added a comment.
I have added an else case for unhandled or error cases.
I have added to Todo for handling complex and vector types. ABI document doesnt
say much about how complex will be returned so I am doing a bit investigation
with how t
omjavaid added inline comments.
Comment at: source/Plugins/ABI/SysV-arm/ABISysV_arm.cpp:658
@@ -582,2 +657,3 @@
+
if (byte_size <= 4)
{
Homogenous types with elements more than 4 will fall through and will be
handled by this even in case of hard
This revision was automatically updated to reflect the committed changes.
Closed by commit rL260512: Handle floating-point type homogeneous aggregate
return values in ABISysV_arm (authored by omjavaid).
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This patch ClangASTContext::IsHomogeneousAggregate test for homogeneity in
light of Arm procedure call standard definition of a homogeneous aggregat
omjavaid added a comment.
Just to mention this simplifies vector return type handling for ARM. A patch
implementing that is following up if this gets approves.
http://reviews.llvm.org/D17501
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This patch adds code to SysV ARM ABI for handling complex and aggregates
containing complex return types.
It also improves support for
This revision was automatically updated to reflect the committed changes.
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handling for SysV ARM… (authored by omjavaid).
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This patch adds tests to test complex return types and aggregate return types
with vector elements.
http://reviews.llvm.org/D17716
Files:
packages/Python/lldbsuite/test/functiona
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omjavaid added a comment.
I dont have a lot of background in this area of the code. Can you kindly take a
look.
http://reviews.llvm.org/D18059
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omjavaid added a comment.
Seems legit but One cosmetic comment inline.
Also have you tested this patch by running LLDB testsuite on arm in both little
and big endian modes?
Comment at: source/Plugins/Instruction/ARM/EmulationStateARM.cpp:157
@@ -149,12 +156,3 @@
{
-if (s
omjavaid accepted this revision.
omjavaid added a comment.
LGTM
http://reviews.llvm.org/D18984
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This patch provides a fix for wrong plt entry size generated for binaries built
with gcc and
This revision was automatically updated to reflect the committed changes.
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linker (authored by omjavaid).
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rL267291 introduces a lot of regression on arm-linux by fixing module
architecture to thumb if it finds thumb32 tag set.
Tag_THU
This revision was automatically updated to reflect the committed changes.
Closed by commit rL267550: rL267291: Architecture change to thumb on parsing
arm.attributes causes… (authored by omjavaid).
Changed prior to commit:
http://reviews.llvm.org/D19520?vs=54961&id=54993#toc
Repository:
rL L
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There were some bugs that needed to be fixed in watchpoint handling code on
arm64.
Watchpoints were being written to all watch
omjavaid created this revision.
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LLGS was forcing lldb to use only write or read+write type watchpoints.
This patch fixes this behavior to enable read, write and read+write types of
watchpoints.
Note: On
omjavaid updated this revision to Diff 31934.
omjavaid added a comment.
I have updated this patch after incorporating suggestions.
Is it good for commit now?
http://reviews.llvm.org/D11899
Files:
source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
source/Plugins/Process/Linux
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LLDB needs to know whether a watchpoint instruction is executed before or after
the watchpoint exception is delivered.
This pa
omjavaid updated this revision to Diff 33075.
omjavaid added a comment.
This updated patches correct problems in arm hardware watchpoint support patch
posted earlier.
This patch has been tested on samsung chromebook (ARM - Linux) and PandaBoard
using basic watchpoint test application.
Also it
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This patch fixes a few areas where AArch64 hardware watchpoints were not
emitting errors correctly.
This makes sure any ptrace
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