[Lldb-commits] [lldb] [llvm] [AArch64] move extension information into tablgen (PR #90987)

https://github.com/ilinpv edited https://github.com/llvm/llvm-project/pull/90987 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[Lldb-commits] [lldb] [llvm] [AArch64] move extension information into tablgen (PR #90987)

@@ -426,30 +532,40 @@ def FeatureSpecRestrict : SubtargetFeature<"specrestrict", "HasSpecRestrict", "true", "Enable architectural speculation restriction (FEAT_CSV2_2)">; def FeatureSB : Extension<"sb", "SB", - "Enable v8.5 Speculation Barrier (FEAT_SB)" >; + "Enable v8.5

[Lldb-commits] [lldb] [llvm] [AArch64] move extension information into tablgen (PR #90987)

@@ -426,30 +532,40 @@ def FeatureSpecRestrict : SubtargetFeature<"specrestrict", "HasSpecRestrict", "true", "Enable architectural speculation restriction (FEAT_CSV2_2)">; def FeatureSB : Extension<"sb", "SB", - "Enable v8.5 Speculation Barrier (FEAT_SB)" >; + "Enable v8.5

[Lldb-commits] [clang-tools-extra] [clang] [llvm] [mlir] [lldb] [compiler-rt] [lld] [flang] [libcxx] [builtins][arm64] Implement __init_cpu_features_resolver on Apple platforms (PR #75636)

@@ -0,0 +1,69 @@ +#include +#if TARGET_OS_OSX || TARGET_OS_IPHONE +#include +#include + +static bool isKnownAndSupported(const char *name) { + int32_t val = 0; + size_t size = sizeof(val); + if (sysctlbyname(name, &val, &size, NULL, 0)) +return false; + return val; +} +

[Lldb-commits] [clang] [lldb] [compiler-rt] [flang] [mlir] [libcxx] [lld] [llvm] [builtins] Refactor cpu_model support to reduce #if nesting. NFCI (PR #75635)

https://github.com/ilinpv commented: Thanks a lot for refactoring! It indeed becomes necessary and looks well-structured now, small nit - rename lse_atomics/fucsia.inc and fmv/fucsia.inc files as well. https://github.com/llvm/llvm-project/pull/75635