[Lldb-commits] [clang-tools-extra] [libcxxabi] [lldb] [libcxx] [clang] [libc] [lld] [flang] [compiler-rt] [llvm] [TTI][RISCV]Improve costs for fixed vector whole reg extract/insert. (PR #80164)

2024-02-04 Thread Luke Lau via lldb-commits
@@ -326,6 +326,48 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, switch (Kind) { default: break; +case TTI::SK_ExtractSubvector: + if (isa(SubTp) && + LT.second.getVectorElementType() != MVT::i1) { +unsigned TpReg

[Lldb-commits] [lldb] [libcxxabi] [flang] [compiler-rt] [lld] [libc] [llvm] [libcxx] [clang] [clang-tools-extra] [TTI][RISCV]Improve costs for fixed vector whole reg extract/insert. (PR #80164)

2024-02-04 Thread Luke Lau via lldb-commits
@@ -326,6 +326,48 @@ InstructionCost RISCVTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, switch (Kind) { default: break; +case TTI::SK_ExtractSubvector: + if (isa(SubTp) && + LT.second.getVectorElementType() != MVT::i1) { +unsigned TpReg