@@ -0,0 +1,108 @@
+//=== wasmRegisterContext.cpp
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,76 @@
+//===-- UnwindWasm.cpp
===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -2595,6 +2604,37 @@ bool DWARFExpression::Evaluate(
break;
}
+case DW_OP_WASM_location: {
+ uint8_t wasm_op = opcodes.GetU8(&offset);
+ uint32_t index;
+
+ /* LLDB doesn't have an address space to represents WebAssembly locals,
+ * globals
@@ -0,0 +1,108 @@
+//=== wasmRegisterContext.cpp
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,108 @@
+//=== wasmRegisterContext.cpp
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -2595,6 +2604,37 @@ bool DWARFExpression::Evaluate(
break;
}
+case DW_OP_WASM_location: {
+ uint8_t wasm_op = opcodes.GetU8(&offset);
+ uint32_t index;
+
+ /* LLDB doesn't have an address space to represents WebAssembly locals,
+ * globals
@@ -346,6 +346,15 @@ static offset_t GetOpcodeDataSize(const DataExtractor
&data,
return (offset - data_offset) + subexpr_len;
}
+ case DW_OP_WASM_location: {
+uint8_t wasm_op = data.GetU8(&offset);
+if (wasm_op == 3)
clayborg wrote:
It would
@@ -0,0 +1,108 @@
+//=== wasmRegisterContext.cpp
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -1450,6 +1450,14 @@ class Process : public
std::enable_shared_from_this,
/// platforms where there is a difference (only Arm Thumb at this time).
lldb::addr_t FixAnyAddress(lldb::addr_t pc);
+ /// Some targets might use bits in a code address to represent additional
+
@@ -2595,6 +2604,37 @@ bool DWARFExpression::Evaluate(
break;
}
+case DW_OP_WASM_location: {
+ uint8_t wasm_op = opcodes.GetU8(&offset);
+ uint32_t index;
+
+ /* LLDB doesn't have an address space to represents WebAssembly locals,
+ * globals
@@ -2595,6 +2604,37 @@ bool DWARFExpression::Evaluate(
break;
}
+case DW_OP_WASM_location: {
+ uint8_t wasm_op = opcodes.GetU8(&offset);
+ uint32_t index;
+
+ /* LLDB doesn't have an address space to represents WebAssembly locals,
+ * globals
xwang98 wrote:
There is a strong need for this capability of LLDB from the WebAssembly Micro
Runtime community. It will be awesome to have it in the LLDB.
https://github.com/llvm/llvm-project/pull/77949
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rupprecht wrote:
Thanks! Nice cleanup.
https://github.com/llvm/llvm-project/pull/82073
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@@ -24,17 +24,33 @@ def format_register_value(val):
return result
+def make_code_address(module_id, offset):
+return 0x4000 | (module_id << 32) | offset
+
xujuntwt95329 wrote:
@paolosevMSFT Seems the rule require two empty lines before cl
https://github.com/clayborg closed
https://github.com/llvm/llvm-project/pull/81067
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Author: Greg Clayton
Date: 2024-02-20T18:17:01-08:00
New Revision: 5a45d32b5b42dc4ed4852b0045391a1c2be41b48
URL:
https://github.com/llvm/llvm-project/commit/5a45d32b5b42dc4ed4852b0045391a1c2be41b48
DIFF:
https://github.com/llvm/llvm-project/commit/5a45d32b5b42dc4ed4852b0045391a1c2be41b48.diff
xujuntwt95329 wrote:
Hi @JDevlieghere Could you please give us some suggestions about the next steps
for this PR and https://github.com/llvm/llvm-project/pull/77949?
Thanks a lot!
https://github.com/llvm/llvm-project/pull/78977
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llvmbot wrote:
@llvm/pr-subscribers-lldb
Author: None (jimingham)
Changes
For reasons that are not clear to me, on arm64, the alias registers are listed
in list of register info's we do completion against, but for x86_64 they are
not. Maybe this is a difference in how the dynamic regist
https://github.com/jimingham closed
https://github.com/llvm/llvm-project/pull/82445
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Author: jimingham
Date: 2024-02-20T16:28:48-08:00
New Revision: dc672d2f6a48fb3d502c260eb353f389723ec417
URL:
https://github.com/llvm/llvm-project/commit/dc672d2f6a48fb3d502c260eb353f389723ec417
DIFF:
https://github.com/llvm/llvm-project/commit/dc672d2f6a48fb3d502c260eb353f389723ec417.diff
LOG
https://github.com/jimingham created
https://github.com/llvm/llvm-project/pull/82445
For reasons that are not clear to me, on arm64, the alias registers are listed
in list of register info's we do completion against, but for x86_64 they are
not. Maybe this is a difference in how the dynamic r
bulbazord wrote:
> > > This LGTM!
> > > I don't think I can see far enough ahead on what you are planning here,
> > > but I was just wondering if the ultimate goal is to have the
> > > `option_arg.getAsT` return an `Expected`. In this case, wouldn't all
> > > these arguments (short option, lon
https://github.com/jeffreytan81 updated
https://github.com/llvm/llvm-project/pull/81564
>From d65900f5e6169062fc0988b57fb5be2474789025 Mon Sep 17 00:00:00 2001
From: jeffreytan81
Date: Mon, 12 Feb 2024 18:08:23 -0800
Subject: [PATCH 1/5] Fix lldb crash while handling concurrent vfork()
---
..
https://github.com/jeffreytan81 edited
https://github.com/llvm/llvm-project/pull/81564
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@@ -301,7 +301,8 @@ class ProcessGDBRemote : public Process,
using FlashRange = FlashRangeVector::Entry;
FlashRangeVector m_erased_flash_ranges;
- bool m_vfork_in_progress;
+ // Number of vfork in process.
jeffreytan81 wrote:
This is only used by vfork(
https://github.com/jeffreytan81 approved this pull request.
https://github.com/llvm/llvm-project/pull/81067
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jeffreytan81 wrote:
I believe the concern regarding standardizing the methods for locating debug
information files is valid. Based on my experience, the only reliable approach
to achieving this is either documenting it in a well-agreed spec, document, or
website, or enforcing all symbolication
https://github.com/jimingham closed
https://github.com/llvm/llvm-project/pull/82428
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Author: jimingham
Date: 2024-02-20T14:18:03-08:00
New Revision: 563ef306017a47d387f1c36dd562b172c1ad0626
URL:
https://github.com/llvm/llvm-project/commit/563ef306017a47d387f1c36dd562b172c1ad0626
DIFF:
https://github.com/llvm/llvm-project/commit/563ef306017a47d387f1c36dd562b172c1ad0626.diff
LOG
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 5a20a208037d32d52f0c626ea3b199278ff0df0a
9a430ce7c8065f21abef474d233a6b41937563ac --
felipepiovezan wrote:
> > This LGTM!
> > I don't think I can see far enough ahead on what you are planning here, but
> > I was just wondering if the ultimate goal is to have the
> > `option_arg.getAsT` return an `Expected`. In this case, wouldn't all
> > these arguments (short option, long opt
llvmbot wrote:
@llvm/pr-subscribers-lldb
Author: None (jimingham)
Changes
This is a follow-on to:
https://github.com/llvm/llvm-project/pull/82085
The completer for register names was missing from the argument table. I
somehow missed that the only register completer test was x86_64, so
https://github.com/jimingham created
https://github.com/llvm/llvm-project/pull/82428
This is a follow-on to:
https://github.com/llvm/llvm-project/pull/82085
The completer for register names was missing from the argument table. I
somehow missed that the only register completer test was x86_64
bulbazord wrote:
> This LGTM!
>
> I don't think I can see far enough ahead on what you are planning here, but I
> was just wondering if the ultimate goal is to have the `option_arg.getAsT`
> return an `Expected`. In this case, wouldn't all these arguments (short
> option, long option, additio
https://github.com/paolosevMSFT updated
https://github.com/llvm/llvm-project/pull/77949
>From 30d932bb0988e1c78c3e023be2270259df5e6664 Mon Sep 17 00:00:00 2001
From: Paolo Severini
Date: Fri, 12 Jan 2024 09:10:59 -0800
Subject: [PATCH 1/5] Add support for source-level debugging of WebAssembly
paolosevMSFT wrote:
Hi @JDevlieghere, could you take a look at the latest changes and unit tests?
https://github.com/llvm/llvm-project/pull/78977
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https://github.com/clayborg edited
https://github.com/llvm/llvm-project/pull/81564
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@@ -301,7 +301,8 @@ class ProcessGDBRemote : public Process,
using FlashRange = FlashRangeVector::Entry;
FlashRangeVector m_erased_flash_ranges;
- bool m_vfork_in_progress;
+ // Number of vfork in process.
clayborg wrote:
```
// Number of fork() or vfor
@@ -120,15 +120,23 @@ bool NativeThreadLinux::GetStopReason(ThreadStopInfo
&stop_info,
case eStateCrashed:
case eStateExited:
case eStateSuspended:
- case eStateUnloaded:
+ case eStateUnloaded: {
if (log)
LogThreadStopInfo(*log, m_stop_info, "m_stop_info in
https://github.com/clayborg requested changes to this pull request.
https://github.com/llvm/llvm-project/pull/81564
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https://github.com/ashgti closed https://github.com/llvm/llvm-project/pull/82051
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Author: John Harrison
Date: 2024-02-20T09:35:15-08:00
New Revision: ae8facc1f8e8a2d04b5a3519fc1901db110fe452
URL:
https://github.com/llvm/llvm-project/commit/ae8facc1f8e8a2d04b5a3519fc1901db110fe452
DIFF:
https://github.com/llvm/llvm-project/commit/ae8facc1f8e8a2d04b5a3519fc1901db110fe452.diff
llvmbot wrote:
@llvm/pr-subscribers-lldb
Author: Daniil Kovalev (kovdan01)
Changes
Currently, for x86 and x86_64 triples, "+sse" and "+sse2" are appended to
`Features` vector of `TargetOptions` unconditionally. This vector is later
reset in `TargetInfo::CreateTargetInfo` and filled using
https://github.com/kovdan01 ready_for_review
https://github.com/llvm/llvm-project/pull/82364
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https://github.com/kovdan01 created
https://github.com/llvm/llvm-project/pull/82364
Currently, for x86 and x86_64 triples, "+sse" and "+sse2" are appended to
`Features` vector of `TargetOptions` unconditionally. This vector is later
reset in `TargetInfo::CreateTargetInfo` and filled using info
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