Re: [PATCH 2/2] ARC: mm: fix new code about cache aliasing

2024-03-28 Thread Mathieu Desnoyers
list rather than CC about 50 additional people/mailing lists. Of course, if VIPT aliasing is removed from ARC, removing the config ARCH_HAS_CPU_CACHE_ALIASING and using the generic cpu_dcache_is_aliasing() is the way to go. Feel free to add my: Acked-by: Mathieu Desnoyers Thanks, M

Re: [PATCH v3 1/2] Introduce cpu_icache_is_aliasing() across all architectures

2024-12-07 Thread Mathieu Desnoyers
() to make MM code query special clear_user_(high)page() easier. This will be used by the following commit. Suggested-by: Mathieu Desnoyers Signed-off-by: Zi Yan Reviewed-by: Mathieu Desnoyers --- arch/arc/Kconfig | 1 + arch/arc/include/asm/cachetype.h | 8 inc

Re: [PATCH v3 2/2] mm: use clear_user_(high)page() for arch with special user folio handling

2024-12-07 Thread Mathieu Desnoyers
*/ - if (!alloc_zeroed()) + if (alloc_need_zeroing()) folio_zero_user(folio, vmf->address); return folio; } -- Mathieu Desnoyers EfficiOS Inc. https://www.efficios.com ___

Re: [PATCH v3 1/2] Introduce cpu_icache_is_aliasing() across all architectures

2024-12-07 Thread Mathieu Desnoyers
On 2024-12-07 12:01, Mathieu Desnoyers wrote: On 2024-12-07 11:55, Zi Yan wrote: In commit eacd0e950dc2 ("ARC: [mm] Lazy D-cache flush (non aliasing VIPT)"), arc adds the need to flush dcache to make icache see the code page change. This also requires special handling for clear_user_