On Thu, 2018-07-26 at 11:17 +0200, Christoph Hellwig wrote:
> On Tue, Jul 24, 2018 at 01:10:00PM +0300, Eugeniy Paltsev wrote:
> > Refactoring, no functional change intended.
> >
[snip]
> >
> > *dma_handle = paddr;
> >
> > + /*
> > +* - A coherent buffer needs MMU mapping to enforce
Some proxy DNS servers might not resolve IPv6 names to addresses.
Instead they reply with NOERROR while passing no real data.
That combination of NOERROR and EAI_NODATA happen because the DNS
server has a recored for requested name (example.net in our case)
but that record is not of type which
On ARC HSDK board even though it operates @ 1GHz this test runs
~7 seconds which gives us failures all the time.
That's what happens now:
| # time .../build/timezone/tst-tzset
| Timed out: killed the child process
| Command exited with non-zero status 1
| real0m 5.11s
| user0m 3.59s
| sys
On Mon, 30 Jul 2018, Alexey Brodkin wrote:
> diff --git a/timezone/tst-tzset.c b/timezone/tst-tzset.c
> index 27f986b56dab..534f7acdf75f 100644
> --- a/timezone/tst-tzset.c
> +++ b/timezone/tst-tzset.c
> @@ -25,7 +25,7 @@
> #include
> #include
>
> -#define TIMEOUT 5
> +#define TIMEOUT 10
Th
On Jul 30 2018, Joseph Myers wrote:
> On Mon, 30 Jul 2018, Alexey Brodkin wrote:
>
>> diff --git a/timezone/tst-tzset.c b/timezone/tst-tzset.c
>> index 27f986b56dab..534f7acdf75f 100644
>> --- a/timezone/tst-tzset.c
>> +++ b/timezone/tst-tzset.c
>> @@ -25,7 +25,7 @@
>> #include
>> #include
>>
The timeout was set to 5 seconds in commit
112f28e88c4e ("tst-tzset: raise timeout to 5 seconds") to increase it
from a default 2 seconds.
That was before the default timeout was changed to 20 seconds in commit
a28605b22946 (" test-skeleton: increase default TIMEOUT to 20 seconds").
If there's no
The ARC HS processor provides an IOC port (I/O coherency bus
interface) that allows external devices such as DMA devices
to access memory through the cache hierarchy, providing
coherency between I/O transactions and the complete memory
hierarchy.
Some recent SoC with ARC HS (like HSDK) allow to se
Mark DMA devices on AXS103 and HSDK boards connected through IOC
port as dma-coherent.
Signed-off-by: Eugeniy Paltsev
---
Changes v1->v2:
* None.
arch/arc/boot/dts/axc003.dtsi | 26 ++
arch/arc/boot/dts/axc003_idu.dtsi | 26 ++
arch/arc/boot/
The ARC HS processor provides an IOC port (I/O coherency bus
interface) that allows external devices such as DMA devices
to access memory through the cache hierarchy, providing
coherency between I/O transactions and the complete memory
hierarchy.
Some recent SoC with ARC HS (like HSDK) allow to se
Signed-off-by: Eugeniy Paltsev
---
Changes v1->v2:
* None.
arch/arc/mm/cache.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arc/mm/cache.c b/arch/arc/mm/cache.c
index dac12afbb93a..389602cf1594 100644
--- a/arch/arc/mm/cache.c
+++ b/arch/arc/mm/cache.c
@@ -1143,6 +114
__GFP_HIGHMEM flag is cleared by upper layer functions
(in include/linux/dma-mapping.h) so we'll never get a
__GFP_HIGHMEM flag in arch_dma_alloc gfp argument.
That's why alloc_pages will never return highmem page
here.
Get rid of highmem pages handling and cleanup arch_dma_alloc
and arch_dma_free
On 07/30/2018 06:07 PM, Andreas Schwab wrote:
On Jul 30 2018, Joseph Myers wrote:
On Mon, 30 Jul 2018, Alexey Brodkin wrote:
diff --git a/timezone/tst-tzset.c b/timezone/tst-tzset.c
index 27f986b56dab..534f7acdf75f 100644
--- a/timezone/tst-tzset.c
+++ b/timezone/tst-tzset.c
@@ -25,7 +25,7 @
On Mon, 30 Jul 2018, Florian Weimer wrote:
> > There are a lot of tests that set TIMEOUT to less than 20.
>
> We should fix all of them.
It's conceivable some are deliberately less than 20 (if e.g. the test
sleeps for a certain number of seconds and does nothing else that should
take a signifi
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