From: Vineet Gupta
3.12-stable review patch. If anyone has any objections, please let me know.
===
commit a524c218bc94c705886a0e0fedeee45d1931da32 upstream.
Reported-by: Jo-Philipp Wich
Fixes: 9aed02feae57bf7 ("ARC: [arcompact] handle unaligned access delay slot")
Cc: linux-ker..
On Fri, Mar 03, 2017 at 06:05:15PM +, Jose Abreu wrote:
> Hi Alexey,
>
>
> On 03-03-2017 13:27, Alexey Brodkin wrote:
> >
> > So if I understood you correct here what I really need is just to get rid
> > of existing check,
> > right? I.e. the following is to be in v2 respin:
> >
Hi Alexey,
On 03-03-2017 19:24, Alexey Brodkin wrote:
>
> Correct. Otherwise we'll get some modes and devices that
> don't work.
>
> Remember our saga with 74.25 vs 74.40 MHz?
>
> With our PLLs on AXS and HSDK boards we may generate 74.25 MHz clock
> which satisfy some monitors especially those w
