commit d65283f7b695b5 added mod->arch.secstr under
CONFIG_ARC_DW2_UNWIND, but used it unconditionally which broke builds
when the option was disabled. Fix that by adjusting the #ifdef guard.
And while at it add a missing guard (for unwinder) in module.c as well
Reported-by: Waldemar Brodkorb
Cc:
This was really usefull when doing initial bringup and also for
occassional debug of software and hardware bugs. However in the new
smp-boot regime, non masters will "self" halt even for run-on-reset
configs. This will misinteract with the debug feature as in even master
will get halted when the no
Currently for halt-on-reset, non masters spin on a shared memory which
is wiggled by Master at right time. This is not efficient when hardware
support exists to stop and resume them from Master (using an external IP
block). More importantly Master might be setting up SLC or IO-Coherency
aperutes in
For run-on-reset SMP configs, non master cores call a routine which
waits until Master gives it a "go" signal (currently using a shared
mem flag). The same routine then jumps off the well known entry point of
all non Master cores i.e. @first_lines_of_secondary
This patch moves the last part out wa
This essentially converts a run-on-reset to halt-on-reset - so non
masters self halt in early boot code. And later they are resumed from
halted PC using MCIP ICD assist.
As mentioned in prev commits, this paves way for radio silence on
coherency unit, while master is setting up IOC and such.
Sign
ARC SMP supports halt-on-reset and run-on-reset for non master cores.
run-on-reset is applicable for internal bitfiles as well as debugger
assisted boots (where all cores are started together)
run-on-reset uses a poll-shared-flag-in-mem-n-spin approach which is not
efficient and moreover is wrong