On 10/19/2016 01:16 PM, Eugeniy Paltsev wrote:
> ARC PGU driver starts crashing on initialization after
> 'commit e12c2f645557 ("drm/i2c: adv7511: Convert to drm_bridge")'
> This happenes because in "arcpgu_drm_hdmi_init" function we get pointer
> of "drm_i2c_encoder_driver" structure, which doesn'
On Thu, 2016-10-20 at 13:16 +, Eugeniy Paltsev wrote:
> On Thu, 2016-10-20 at 13:48 +0300, Andy Shevchenko wrote:
> > On Thu, 2016-09-15 at 16:14 +0300, Eugeniy Paltsev wrote:
> > >
> > > This patch is to address a proposal by Andy in this thread:
> > > http://www.spinics.net/lists/dmaengine/m
This is because some old ARC750 cores lack these instructions.
We now rely on the default for the toolchain driver:
-mcpu=A7 won't enable those, while -mcpu=archs will as these
instructions are baseline (and thus is not impacted with this change).
If some arc700 based cpu does have them, it can o
Originally an initial distribution mode (its value resides in Device Tree)
for each common interrupt is set in idu_irq_xlate. This leads to the
following problems. idu_irq_xlate may be called several times during parsing
of the Device Tree and it is semantically wrong to configure an initial
distri
This function takes a cpu number and a virq number and registers an
appropriate handler per cpu. However smp_ipi_irq_setup is incorrectly
used in several places of ARC platform code - hwirq is passed instead
of virq. This patch is intended to clarify declaration of virq argument
to prevent passing
This function takes a cpu number and a virq number and registers an
appropriate handler per cpu. However smp_ipi_irq_setup is incorrectly
used in several places of ARC platform code - hwirq is passed instead of
virq. There is a code with an example of inccorect usage of smp_ipi_irq_setup:
smp_
ARC linux uses 2 distribution modes for common interrupts: round robin
mode (IDU_M_DISTRI_RR) and a simple destination mode (IDU_M_DISTRI_DEST).
The first one is used when more than 1 cores may handle a common interrupt
and the second one is used when only 1 core may handle a common interrupt.
How
Multicore ARC configurations use IDU (Interrupt Distribution Unit) for
distributing of common interrupts. In fact IDU is a interrupt controller
on top of main per core interrupt controller.
All common IRQs are physically and linearly mapped to per core
interrupts. E.g. <0, 1, 2, 3> common IDU inte
