Re: Unaligned flush_dcache_range in axs101.c

2016-05-27 Thread Marek Vasut
On 05/26/2016 01:39 PM, Alexey Brodkin wrote: > Hi Marek, Hi! > On Fri, 2016-04-15 at 15:49 +0200, Marek Vasut wrote: >> On 04/15/2016 03:00 PM, Alexey Brodkin wrote: >>> Cache management functions should be implemented per arch or platform and so >>> that they match requirements of underlying ha

Re: Unaligned flush_dcache_range in axs101.c

2016-05-26 Thread Vineet Gupta
On Thursday 26 May 2016 05:09 PM, Alexey Brodkin wrote: > In the code you were referring what I wanted to modify reset vector of the > slave core. > And while we were living without IOC it was all OK. My code above wrote-back > (or as we used to call it within ARC "flushed") L1 data cache with mo

Re: Unaligned flush_dcache_range in axs101.c

2016-05-26 Thread Alexey Brodkin
Hi Marek, On Fri, 2016-04-15 at 15:49 +0200, Marek Vasut wrote: > On 04/15/2016 03:00 PM, Alexey Brodkin wrote: > > Cache management functions should be implemented per arch or platform and so > > that they match requirements of underlying hardware. If hardware may only > > work on > > whole cach