Re: [PATCH 1/3] CLK: HSDK: CGU: check if PLL is bypassed first

Quoting Eugeniy Paltsev (2020-03-11 06:41:13) > If PLL is bypassed the EN (enable) bit has no effect on > output clock. > > Signed-off-by: Eugeniy Paltsev > --- Applied to clk-next ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org htt

[PATCH 1/3] CLK: HSDK: CGU: check if PLL is bypassed first

If PLL is bypassed the EN (enable) bit has no effect on output clock. Signed-off-by: Eugeniy Paltsev --- drivers/clk/clk-hsdk-pll.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/clk-hsdk-pll.c b/drivers/clk/clk-hsdk-pll.c index 97d1e8c35b71..b47a559f3528