> if ((unsigned)ipinr < NR_IPI)
> > - trace_ipi_exit_rcuidle(ipi_types[ipinr]);
> > + trace_ipi_exit(ipi_types[ipinr]);
> > }
> >
> > static irqreturn_t ipi_handler(int irq, void *data)
Acked-by: Marc Zyngier
M.
--
Without deviation from the norm, progress is not possible.
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On Thu, 5 Nov 2020 13:22:07 -0800, Vineet Gupta wrote:
> This series removes any drivers associated with EZChip NPS platform
> which was removed from ARC in 5.10-rc1.
>
> Vineet Gupta (3):
> drivers/clocksource: Remove EZChip NPS clocksource driver
> drivers/irqchip: Remove EZChip NPS interrup
ell the yaml keep the "newline" character.
>2) add "..." to mark the end of the yaml file.
>3) Change the name list of maintainers to the author of
> "snps,dw-apb-ictl.txt"
>maintainers:
> - - Marc Zyngier
> + -
[crazy Cc list, not sure it'll go anywhere]
On Tue, 10 Sep 2019 14:47:11 +0100,
Claudiu Beznea wrote:
>
> Change timer registration macros (TIMER_OF_DECLARE() and
> CLOCKSOURCE_OF_DECLARE()) by adding a new argument. This new argument
> is a pointer to an object of type struct timer_of and is us
On Thu, 29 Mar 2018 18:32:47 +0100,
Russell King - ARM Linux wrote:
>
> On Thu, Mar 29, 2018 at 05:53:14PM +0100, Marc Zyngier wrote:
> > On Thu, 29 Mar 2018 16:58:27 +0100,
> > Russell King - ARM Linux wrote:
[...]
> > > I'm not aware of there being an emul
On Thu, 29 Mar 2018 16:58:27 +0100,
Russell King - ARM Linux wrote:
>
> On Thu, Mar 29, 2018 at 05:43:47PM +0200, Geert Uytterhoeven wrote:
> > On Thu, Mar 29, 2018 at 5:27 PM, Russell King - ARM Linux
> > wrote:
> > > On Thu, Mar 29, 2018 at 09:37:52AM +1100, Oliver wrote:
> > >> On Thu, Mar 29,
On 25/04/17 13:51, Daniel Lezcano wrote:
> On Tue, Apr 25, 2017 at 11:21:21AM +0100, Marc Zyngier wrote:
>> On 25/04/17 10:49, Daniel Lezcano wrote:
>>> On Tue, Apr 25, 2017 at 10:10:12AM +0100, Marc Zyngier wrote:
>>
>> [...]
>>
>>>>> +sta
On 25/04/17 10:49, Daniel Lezcano wrote:
> On Tue, Apr 25, 2017 at 10:10:12AM +0100, Marc Zyngier wrote:
[...]
>>> +static inline void setup_timings(struct irq_desc *desc, struct irqaction
>>> *act)
>>> +{
>>> + /*
>>> +* We don'
On 25/04/17 09:34, Daniel Lezcano wrote:
> On Tue, Apr 25, 2017 at 08:38:56AM +0100, Marc Zyngier wrote:
>> On 24/04/17 20:59, Daniel Lezcano wrote:
>>> On Mon, Apr 24, 2017 at 08:14:54PM +0100, Marc Zyngier wrote:
>>>> On 24/04/17 19:59, Daniel Lezcano wrote:
>&
On 24/04/17 20:59, Daniel Lezcano wrote:
> On Mon, Apr 24, 2017 at 08:14:54PM +0100, Marc Zyngier wrote:
>> On 24/04/17 19:59, Daniel Lezcano wrote:
>>> On Mon, Apr 24, 2017 at 07:46:43PM +0100, Marc Zyngier wrote:
>>>> On 24/04/17 15:01, Daniel Lezcano wrote:
>&
On 24/04/17 19:59, Daniel Lezcano wrote:
> On Mon, Apr 24, 2017 at 07:46:43PM +0100, Marc Zyngier wrote:
>> On 24/04/17 15:01, Daniel Lezcano wrote:
>>> In the next changes, we track when the interrupts occur in order to
>>> statistically compute when is supposed t
On 24/04/17 15:01, Daniel Lezcano wrote:
> In the next changes, we track when the interrupts occur in order to
> statistically compute when is supposed to happen the next interrupt.
>
> In all the interruptions, it does not make sense to store the timer interrupt
> occurences and try to predict th
Hi Yuriy,
On 14/11/16 14:35, Yuriy Kolerov wrote:
> Hi Marc,
>
>> -Original Message-----
>> From: Marc Zyngier [mailto:marc.zyng...@arm.com]
>> Sent: Friday, November 11, 2016 6:29 PM
>> To: Yuriy Kolerov ; linux-snps-
>> a...@lists.infradead.o
Hi Yuriy,
On 11/11/16 14:38, Yuriy Kolerov wrote:
> Ignore value of interrupt distribution mode for common interrupts in
> IDU since setting of affinity using value from Device Tree is deprecated
> in ARC. Originally it is done in idu_irq_xlate() function and it is
> semantically wrong and does no
Hi Vineet,
On 08/11/16 20:57, Vineet Gupta wrote:
> +CC MarcZ
>
> Hi Marc,
>
> I have a question below
>
[...]
> So as discussed in a prior thread, we no longer support setting the default
> affinity via DT (so removed from xlate function). However we are now using the
> domain map function t
On Wed, Oct 26 2016 at 05:17:34 PM, Vineet Gupta
wrote:
> On 10/26/2016 07:05 AM, Marc Zyngier wrote:
>> It definitely feels weird to encode the interrupt affinity in the DT
>> (the kernel and possible userspace usually know much better than the
>> firmware). What is
On 25/10/16 19:28, Vineet Gupta wrote:
> On 10/24/2016 05:46 AM, Yuriy Kolerov wrote:
>> Originally an initial distribution mode (its value resides in Device Tree)
>> for each common interrupt is set in idu_irq_xlate. This leads to the
>> following problems. idu_irq_xlate may be called several time
On 13/05/16 10:51, Arnd Bergmann wrote:
> On Friday 13 May 2016 14:05:41 Vineet Gupta wrote:
>> On Friday 13 May 2016 01:54 PM, Marc Zyngier wrote:
>>> On 12/05/16 22:03, Arnd Bergmann wrote:
>> ...
>>>>
>>>> config EZNPS_GIC
>
On 13/05/16 09:35, Vineet Gupta wrote:
> On Friday 13 May 2016 01:54 PM, Marc Zyngier wrote:
>> On 12/05/16 22:03, Arnd Bergmann wrote:
> ...
>>>
>>> config EZNPS_GIC
>>> bool "NPS400 Global Interrupt Manager (GIM)"
>>> +
>
> config EZNPS_GIC
> bool "NPS400 Global Interrupt Manager (GIM)"
> + depends on ARC || (COMPILE_TEST && !64BIT)
> select IRQ_DOMAIN
> help
> Support the EZchip NPS400 global interrupt controller
>
Acked-by: Marc Zyngier
As
>> +root_domain = irq_domain_add_linear(intc, NR_CPU_IRQS,
>> &arc_intc_domain_ops, NULL);
>> if (!root_domain)
>> panic("root irq domain not avail\n");
>>
>
> Does this patch look ok to you ? Do you want to see any other improvements
> here.
Decoupling HW irqs from Linux irqs is a major progress, so for that:
Acked-by: Marc Zyngier
Thanks,
M.
--
Jazz is not dead. It just smells funny...
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On 14/04/16 10:26, Vineet Gupta wrote:
> On Wednesday 13 April 2016 09:52 PM, Marc Zyngier wrote:
>>> -int arc_counter_setup(void)
>>>> +static void __init arc_cs_setup_rtc(struct device_node *node)
>>>> {
>>>> - write_aux_reg(ARC_REG_TIM
On 13/04/16 12:40, Vineet Gupta wrote:
> - Remove explicit clocksource setup and let it be done by OF framework
> by defining CLOCKSOURCE_OF_DECLARE() for various timers
>
> - This allows multiple clocksources to be potentially registered
> simultaneouly: previously we could only do one - as a
Hi Vineet,
On 11/04/16 15:09, Vineet Gupta wrote:
> On Monday 11 April 2016 06:41 PM, Marc Zyngier wrote:
>>>>> It doesn't mean I really approve of it. The default domain thing is
>>>>> going to end-up biting you in the rear. But hey, better having this
>&
well as at Global Interrupt
> Controller (GIC) e.g. serial and network devices.
>
> Signed-off-by: Noam Camus
> Cc: Thomas Gleixner
> Cc: Jason Cooper
> Cc: Marc Zyngier
> Cc: Daniel Lezcano
Acked-by: Marc Zyngier
M.
--
On 12/01/16 09:12, Vineet Gupta wrote:
[...]
>> HANDLE_DOMAIN_IRQ is not mandatory at all - a number of architectures
>> had something open-coded in the past (with some drawbacks and/or bugs),
>> and this config option is just one of the ways to get it right.
>>
>> MIPS/PPC perform the reverse lo
ember 2015 10:01 PM, Marc Zyngier wrote:
>>> On 18/12/15 14:29, Noam Camus wrote:
>>>>> From: Marc Zyngier [mailto:marc.zyng...@arm.com]
>>>>> Sent: Friday, December 18, 2015 1:21 PM
>>>>
>>>>>> I need this for my per CPU irqs such tim
On 18/12/15 14:29, Noam Camus wrote:
>> From: Marc Zyngier [mailto:marc.zyng...@arm.com]
>> Sent: Friday, December 18, 2015 1:21 PM
>
>>> I need this for my per CPU irqs such timer and IPI which do not come
>>> from some external device but from CPUs. Fo
On 18/12/15 10:37, Noam Camus wrote:
> From: Marc Zyngier [mailto:marc.zyng...@arm.com]
> Sent: Wednesday, December 16, 2015 11:31 AM
>
>>> +static int __init nps400_of_init(struct device_node *node,
>>> +struct device_node *parent
upt
> Controller (GIC) e.g. serial and network devices.
>
> Signed-off-by: Noam Camus
> Cc: Thomas Gleixner
> Cc: Jason Cooper
> Cc: Marc Zyngier
> ---
> .../interrupt-controller/ezchip,nps400-ic.txt | 17 +++
> drivers/irqchip/Makefile
Vineet,
On 11/12/15 12:20, Vineet Gupta wrote:
> Hi Marc,
>
> On Friday 11 December 2015 04:53 PM, Marc Zyngier wrote:
>> On Fri, 11 Dec 2015 05:26:02 +
>>> I think we can make percpu irq API a bit easier to use.
>>>
>>> (1) First thing wh
On Fri, 11 Dec 2015 05:26:02 +
Vineet Gupta wrote:
Hi Vineet,
> Hi Marc,
>
> On Thursday 10 December 2015 03:26 PM, Marc Zyngier wrote:
> > Hi Vinnet,
> >
> > On 10/12/15 09:25, Vineet Gupta wrote:
> >> Hi Marc / Daniel / Jason,
> >>
> >
Hi Vinnet,
On 10/12/15 09:25, Vineet Gupta wrote:
> Hi Marc / Daniel / Jason,
>
> I had a couple of questions about percpu irq API, hopefully you can help
> answer.
>
> On ARM, how do u handle requesting per cpu IRQs - specifically usage
> of request_percpu_irq() / enable_percpu_irq() API.
> It
Hi Noam,
On 02/12/15 15:08, Noam Camus wrote:
>> From: Marc Zyngier [mailto:marc.zyng...@arm.com]
>> Sent: Tuesday, December 01, 2015 3:29 PM
>
>> + interrupt source. The value shall be 1.
>
>> So you never have to encode the interrupt trigger type? Do you only
upt
> Controller (GIC) e.g. serial and network devices.
>
> Signed-off-by: Noam Camus
> Cc: Thomas Gleixner
> Cc: Jason Cooper
> Cc: Marc Zyngier
> ---
> .../interrupt-controller/ezchip,nps400-ic.txt | 17 ++
> drivers/irqchip/Makefile
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