Hi Richard
> Why would you be maintaining another description? Your approach below
> with the simple recursive algorithm appears to be no different.
We initially considered to drop our tables completely replacing it by
decodetree.
>
>> Also that decodetree alone would not allow us to properly
Hi Richard,
Last few weeks I have been working on cleaning up ARC port for further
reviewing.
In the context of the decoder, if I recall well, your observation was
that a linear search was not Ok.
Your suggestion was not to reinvent the wheel and generate decodetree to
create the decoder.
We sta
Hi Richard,
I totally understand your position with a new scripting language and the
unclean code produced by the auto generated tools.
In order to ease out the review process, I propose to drop the idea of
the generated code and cleanup by hand all of the semfunc.c functions.
What is you opinio
Hi Richard,
Thanks for your quick reply.
For the time, ARCv3 is an under development architecture and
unfortunately, for the time being, there is no public documentation
available.
Please notice that this should be all available once ARCv3 gets released.
QEMU ARCv3 port is really an early stag
Ok, enter and leave will officially get to be TCG code.
To be honest initially we thought that helper code would be preferable
to TCG one. Apparently we were wrong. :-)
Thanks for your quick feedback.
On 1/15/21 9:53 PM, Richard Henderson wrote:
> On 1/15/21 11:48 AM, Cupertino Miranda wr
On 1/15/21 8:31 PM, Richard Henderson wrote:
> On 1/15/21 7:11 AM, Cupertino Miranda wrote:
>>> Similarly. I think that both of these could be implemented entirely in
>>> translate, which is what
>>>
>>>> +bool restore_fp= u7 &am
Thanks for your quick reply.
On 1/15/21 8:17 PM, Richard Henderson wrote:
> On 1/15/21 7:11 AM, Cupertino Miranda wrote:
>>> On 11/11/20 10:17 AM, cupertinomira...@gmail.com wrote:
>>>> +/*
>>>> + * The macro to add boiler plate code for conditional execution
>> +
>> +assert(ctx->insn.limm_p == 0 && !in_delay_slot);
>> +
>> +if (ctx->insn.limm_p == 0 && !in_delay_slot) {
>> +in_delay_slot = true;
>> +uint32_t cpc = ctx->cpc;
>> +uint32_t pcl = ctx->pcl;
>> +insn_t insn = ctx->insn;
>> +
>> +ctx->cpc = ctx-
> On 11/11/20 10:17 AM, cupertinomira...@gmail.com wrote:
>> +/*
>> + * The macro to add boiler plate code for conditional execution.
>> + * It will add tcg_gen codes only if there is a condition to
>> + * be checked (ctx->insn.cc != 0). This macro assumes that there
>> + * is a "ctx" variable of t
>> +void QEMU_NORETURN helper_halt(CPUARCState *env, uint32_t npc)
>> +{
>> +CPUState *cs = env_cpu(env);
>> +if (env->stat.Uf) {
>> +cs->exception_index = EXCP_PRIVILEGEV;
>> +env->causecode = 0;
>> +env->param = 0;
>> + /* Restore PC such that we point at t
Hi Richard,
Sorry to take so long to get through the changes after your review.
I am still going through the improving process and waiting for some
internal company approval to publish the generator of the TCG
instruction definitions, as we have discussed.
Nevertheless, there are some questions
patches. No pressure though ;-)
Very valuable comments, lots of improvements happening here.
On Thu, Dec 3, 2020 at 7:34 PM Richard Henderson
wrote:
>
> On 12/3/20 10:54 AM, Cupertino Miranda wrote:
> > Our generation tool has different levels of verbosity, expressing
> > instructio
development one, such that Ruby does not become a
requirement to build QEmu.
Thanks,
Cupertino
On Thu, Dec 3, 2020 at 4:08 PM Richard Henderson
wrote:
>
> On 12/2/20 6:55 AM, Cupertino Miranda wrote:
> > I totally understand your concerns with generated code.
> >
> > To explain
Ctxt *ctx, TCGv reg)
> > +{
> > +int i;
> > +for (i = 0; i < 64; i += 2) {
> > + if (reg == cpu_r[i]) {
> > +return cpu_r[i + 1];
> > +}
> > +}
> > +/* Check if REG is an odd register. */
> > +for (i = 1;
Hi Philippe,
On Wed, Oct 7, 2020 at 5:31 AM Philippe Mathieu-Daudé wrote:
>
> Hi Cupertino, Claudiu,
>
> On 9/30/20 10:46 PM, cupertinomira...@gmail.com wrote:
> > From: Claudiu Zissulescu
> >
> > Add the Synopsys ARC boards, arc_sim for testing, sim-hs main emulation
> > board using standard UA
ds,
Cupertino
On Wed, Oct 7, 2020 at 5:09 AM Philippe Mathieu-Daudé wrote:
>
> Hi Cupertino,
>
> On 9/30/20 10:45 PM, cupertinomira...@gmail.com wrote:
> > From: Cupertino Miranda
> >
> > Signed-off-by: Cupertino Miranda
> > ---
> ...
>
> > diff
testing
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Hi Eugeniy,
If I understand well what this optimization would do is ... this
optimization would replace conditional code by fixed jumps that would
turn out to be always happening. Like fixed ARC build aux registers
based conditional jumps.
I don't understand several things:
1st. Can't we invalid
Inner loop was using same counter variable (i) as the outer loop, therefore
making outer loop terminate before it visited all of the ELF program segments.
Surrounding code in this inner loop clearly shows the intention that this loop
should not affect the outer one, therefore leading me to the conc
Hi Waldemar,
I have looked into the OpenADK uclibc-tests segmentation fault at hand.
Although, I haven't fully tested the patch I think it is a fix for the
issue.
Considering how long I took to look into this problem, I decided to
provide you a patch immediately for you to try it.
BTW, in my case
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